STARGO ====== Assembly listing generated by TurboMASM from the modified Acorn source. Source: https://www.4corn.co.uk/articles/65hostandmos/ Source: http://regregex.bbcmicro.net/#prog.os126 Source: https://github.com/regregex/OS126 Branch slack calculated by Greg Cook with slack.pl (attached), 3 May 2024 Columns, left to right: (1) Filename, (2) line number and (3) hex address of limiting branch instruction (4) Direction of limiting branch: ^=backwards, v=forwards, Space=N/A (5) Hex number of bytes that may be inserted at this address, or between the branch instruction and the target SYMBOL at this address (NB: a more generous limit than shown may apply on the far side of the symbol.) --=no limit. (6) Current source filename, (7) line of assembly listing which typically starts with source line number, hex address and optional hex equate. *emulateturbo Acorn 6502 Tube 6502 Emulator OS 0.64 (19 Oct 1988) HIBASIC >*turmasm TURBOMASM Acorn Macro assembler 1.15 Action : width 127 Action : length 127 Action : stop on Action : print on Action : asm SgoHdr SgoHdr SgoHdr Macro library : SgoHdr SgoHdr SgoHdr SgoHdr Acorn macro assembler Page 1 SgoHdr SgoHdr SgoHdr Pass 1 SgoHdr Pass 2 -- SgoHdr 0001 0000 ; > SgoHdr -- SgoHdr 0002 0000 -- SgoHdr 0003 0000 GBLL $Tutu -- SgoHdr 0004 0000 $Tutu SETL 1=0 -- SgoHdr 0005 0000 -- SgoHdr 0006 0000 ; conditional assembly flags -- SgoHdr 0007 0000 007F MOS125 * &7F -- SgoHdr 0008 0000 0000 STARGO * &00 -- SgoHdr 0009 0000 00FF NOSP * &FF -- SgoHdr 0010 0000 ; ($00 => TRUE, $FF => FALSE) -- SgoHdr 0011 0000 -- SgoHdr 0012 0000 ; special labels for STARGO -- SgoHdr 0013 0000 00DC SEAL * &DC -- SgoHdr 0014 0000 ;The value to be returned in A by OSARGS A=1, Y=0 -- SgoHdr 0015 0000 ;when trapped by MOS/CFS/RFS. -- SgoHdr 0016 0000 ;MSRM says to preserve A (p. H.3-5), i.e. A=1 -- SgoHdr 0017 0000 ;however MOS 3.20 breaks the spec and returns A=&DC, mainly. -- SgoHdr 0018 0000 ;This is just a copy of the 3MSB of the pointer at X+1. -- SgoHdr 0019 0000 ;NAUG says A is undefined (p.253); other unofficial sources -- SgoHdr 0020 0000 ;suggest that implemented OSARGS calls *should not* -- SgoHdr 0021 0000 ;preserve A. -- SgoHdr 0022 0000 -- SgoHdr 0023 0000 02D0 TAILLO * &02D0 -- SgoHdr 0024 0000 02D1 TAILHI * &02D1 -- SgoHdr 0025 0000 ;Locations to store the command line tail pointer from *GO -- SgoHdr 0026 0000 ;and *RUN. Need not be adjacent. Formerly buffer activity -- SgoHdr 0027 0000 ;flags that are free in OS 1.26. -- SgoHdr 0028 0000 -- SgoHdr 0029 0000 LNK MOS00 -- MOS00 0001 0000 -- MOS00 0002 0000 TTL VDU File -> MOS00 -- MOS00 0003 0000 OPT &01 -- MOS00 0004 0000 -- MOS00 0005 0000 ; -- MOS00 0006 0000 ; MASM options -- MOS00 0007 0000 ; -- MOS00 0008 0000 0004 OPNEWP * &04 ;new page -- MOS00 0009 0000 0001 OPPON * &01 ;print on -- MOS00 0010 0000 0002 OPPOFF * &02 ;print off -- MOS00 0011 0000 ; -- MOS00 0012 0000 ; module print selections -- MOS00 0013 0000 ; -- MOS00 0014 0000 0005 DEFOPT * OPPON:OR:OPNEWP ;default option for MOS code -- MOS00 0015 0000 0005 MOS00 * DEFOPT -- MOS00 0016 0000 0005 MOS01 * DEFOPT -- MOS00 0017 0000 0005 MOS02 * DEFOPT -- MOS00 0018 0000 0005 MOS03 * DEFOPT -- MOS00 0019 0000 0005 MOS04 * DEFOPT -- MOS00 0020 0000 0005 MOS05 * DEFOPT -- MOS00 0021 0000 0005 MOS06 * DEFOPT -- MOS00 0022 0000 0005 MOS07 * DEFOPT -- MOS00 0023 0000 0005 MOS08 * DEFOPT -- MOS00 0024 0000 -- MOS00 0025 0000 0005 MOS10 * DEFOPT -- MOS00 0026 0000 0005 MOS11 * DEFOPT -- MOS00 0027 0000 -- MOS00 0028 0000 OPT MOS00 MOS00 MOS00 MOS00 MOS00 Acorn macro assembler Page 2 MOS00 VDU File -> MOS00 MOS00 -- MOS00 0029 0000 -- MOS00 0030 0000 00F0 WARGS * &00F0 -- MOS00 0031 0000 00FA SEIWKA * &00FA -- MOS00 0032 0000 00FB SEIWKB * &00FB -- MOS00 0033 0000 -- MOS00 0034 0000 ;Last updated 01/08/82 -- MOS00 0035 0000 -- MOS00 0036 0000 ;01/08/82 Intro of SEIWKA and SEIWKB to fix palette IRQ problem -- MOS00 0037 0000 ;01/05/82 Order of variables changed. Pseudo op # used. -- MOS00 0038 0000 ;21/04/82 QPOSN removed completely -- MOS00 0039 0000 ;25/03/82 Low byte of BEGSCN replaced with BYTCH (it was always zero) -- MOS00 0040 0000 ;04/02/82 QPOSN moved to MOS -- MOS00 0041 0000 ;07/01/82 VDUVEC removed (to $222 in MOS) -- MOS00 0042 0000 ;14/11/81 DOTS removed -- MOS00 0043 0000 -- MOS00 0044 0000 ;VARIABLES, NOT ZERO PAGE -- MOS00 0045 0000 -- MOS00 0046 0000 ;CHARACTER FONTS -- MOS00 0047 0000 -- MOS00 0048 0000 BF00 HFONT * &BF00 -- MOS00 0049 0000 00BF HFMSB * /(HFONT ) ;MSB of HFONT -- MOS00 0050 0000 -- MOS00 0051 0000 ;VARIABLES PROPER -- MOS00 0052 0000 -- MOS00 0053 0000 -- MOS00 0054 0000 0300 VARBLE * &0300 -- MOS00 0055 0000 0300 V * VARBLE ;An abbreviation -- MOS00 0056 0000 -- MOS00 0057 0000 -- MOS00 0058 0000 ^ VARBLE -- MOS00 0059 0000 -- MOS00 0060 0000 0300 GWLCOL # &02 ;Row no. of LH margin of graphics window (internal repn.) -- MOS00 0061 0000 0302 GWBROW # &02 ;Row no. of bottom margin of graphics window (internal repn.) -- MOS00 0062 0000 0304 GWRCOL # &02 ;Col no. of RH margin of graphics window (internal repn.) -- MOS00 0063 0000 0306 GWTROW # &02 ;Row no. of top margin of graphics window (internal repn.) -- MOS00 0064 0000 0308 TWLCOL # &01 ;Column number of left margin of text window -- MOS00 0065 0000 0309 TWBROW # &01 ;Row number of bottom margin of text window -- MOS00 0066 0000 030A TWRCOL # &01 ;Column number of right margin of text window -- MOS00 0067 0000 030B TWTROW # &01 ;Row number of top margin of text window -- MOS00 0068 0000 030C ORGX # &02 ;Screen origin (external represntation) -- MOS00 0069 0000 030E ORGY # &02 -- MOS00 0070 0000 0310 GCSX # &02 ;Graphics cursor (external representation) -- MOS00 0071 0000 0312 GCSY # &02 -- MOS00 0072 0000 0314 OLDCS # &04 ;Old graphics cursor -- MOS00 0073 0000 0318 CSX # &01 ;Text cursor posn (screen relative) -- MOS00 0074 0000 0319 CSY # &01 -- MOS00 0075 0000 031A YLINE # &01 ;Offset from ZMEMG for current graphics point -- MOS00 0076 0000 031B QQ # &08 ;Queue -- MOS00 0077 0000 0323 QEND # &01 ;Last byte in queue -- MOS00 0078 0000 0324 GCSIX # &02 ;Graphics cursor (internal representation) -- MOS00 0079 0000 0326 GCSIY # &02 -- MOS00 0080 0000 0328 VDUWS # &22 ;Workspace for VDU -- MOS00 0081 0000 034A CSPOSN # &02 ;Memory of top byte of character at cursor -- MOS00 0082 0000 034C PWWDTH # &02 ;Text window width in bytes -- MOS00 0083 0000 034E BEGSCN # &01 ;MSByte of Lowest byte address displayed -- MOS00 0084 0000 034F BYTCH # &01 ;No bytes per character displayed -- MOS00 0085 0000 0350 TOPSCN # &02 ;Address of top left byte on screen -- MOS00 0086 0000 0352 BYTROW # &02 ;Bytes per row -- MOS00 0087 0000 0354 BYTSCN # &01 ;Bytes used for screen display -- MOS00 0088 0000 0355 MODE # &01 ;Current VDU mode (0..7) -- MOS00 0089 0000 0356 MEMODE # &01 ;Memory map type (0..4) -- MOS00 0090 0000 ;STATS # $01 ;Individual bits used for various things - see docn. for details -- MOS00 0091 0000 0357 FTCOLF # &01 ;Next four must be in this order Foreground text colour -- MOS00 0092 0000 0358 BTCOLF # &01 ;Background text colour -- MOS00 0093 0000 0359 FGCOLF # &01 ;Foreground graphics colour -- MOS00 0094 0000 035A BGCOLF # &01 ;Background graphics colour -- MOS00 0095 0000 035B GPLFMD # &01 ;Current graphics foreground plot colour -- MOS00 0096 0000 035C GPLBMD # &01 ;Current graphics background plot colour -- MOS00 0097 0000 035D JVEC # &02 ;Jump vector for JMIs -- MOS00 0098 0000 035F CSTEMP # &01 ;Cursor start register of 6845 -- MOS00 0099 0000 0360 NCOLOR # &01 ;No. colours available (=0 for TTX) -- MOS00 0100 0000 0361 NPIX # &01 ;No. pixels per byte (=0 for non-graphics mode) -- MOS00 0101 0000 0362 MASKL # &01 ;Mask for left most pixel in byte -- MOS00 0102 0000 0363 MASKR # &01 ;Mask for right most pixel in byte -- MOS00 0103 0000 0364 PCSX # &01 ;Print cursor x position -- MOS00 0104 0000 0365 PCSY # &01 ;Print cursor y position -- MOS00 0105 0000 0366 CHCSR # &01 ;Character which is the displayed cursor on print line -- MOS00 0106 0000 0367 FNTFLG # &01 ;Default font flags, 0 for hard font, p.1=b6 .. p.7=b0 -- MOS00 0107 0000 0368 PGSFNT # &07 ;Page addresses for the soft font $20 - $3F & etc. -- MOS00 0108 0000 036F PARROT # &10 ;Storage of 16 physical colours -- MOS00 0109 0000 037F VEND # &00 ;End of the variables -- MOS00 0110 0000 -- MOS00 0111 0000 ; ************************** MANIFESTS **************************** -- MOS00 0112 0000 -- MOS00 0113 0000 -- MOS00 0114 0000 ^ VDUWS -- MOS00 0115 0000 0328 DLEWS # &08 ;Workspace for DLE -- MOS00 0116 0000 0330 DLENLN # &01 -- MOS00 0117 0000 -- MOS00 0118 0000 ^ VDUWS -- MOS00 0119 0000 0328 CANWS # &04 ;Workspace for CAN -- MOS00 0120 0000 032C CDELTA # &04 -- MOS00 0121 0000 -- MOS00 0122 0000 ^ VDUWS -- MOS00 0123 0000 0328 USWS # &02 ;Workspace for US -- MOS00 0124 0000 -- MOS00 0125 0000 ^ VDUWS -- MOS00 0126 0000 0328 SSWS # &02 ;Workspace for soft scrolling -- MOS00 0127 0000 -- MOS00 0128 0000 ^ VDUWS -- MOS00 0129 0000 0328 APCS1 # &04 ;Workspace for anomalous printing -- MOS00 0130 0000 -- MOS00 0131 0000 ^ VDUWS -- MOS00 0132 0000 0328 READWS # &08 ;Intermediate bit pattern formed during READCH -- MOS00 0133 0000 -- MOS00 0134 0000 ^ VDUWS -- MOS00 0135 0000 0328 RPXLWS # &04 ;Workspace for read pixel -- MOS00 0136 0000 -- MOS00 0137 0000 ;For graphics in general -- MOS00 0138 0000 -- MOS00 0139 0000 030C ORG * ORGX ;Graphics origin -- MOS00 0140 0000 0310 GCSR * GCSX ;Graphics external cursor -- MOS00 0141 0000 0324 GCSIR * GCSIX ;Graphics internal cursor -- MOS00 0142 0000 0320 NEWPT * QEND-&03 ;New point introduced by call to routine. Multiple of 8 ! -- MOS00 0143 0000 031F PLMODE * QEND-&04 ;Plot mode -- MOS00 0144 0000 -- MOS00 0145 0000 ;Plotting lines -- MOS00 0146 0000 -- MOS00 0147 0000 ^ VDUWS -- MOS00 0148 0000 0328 LDELTA # &04 ;DeltaX & DeltaY -- MOS00 0149 0000 032C LSTART # &04 ;Start point for line MOS00 MOS00 MOS00 MOS00 Acorn macro assembler Page 3 MOS00 VDU File -> MOS00 MOS00 -- MOS00 0150 0000 0330 HEND # &02 ;Horizontal end point -- MOS00 0151 0000 0332 D2JVEC # &02 ;Jump vector for D2 -- MOS00 0152 0000 0334 DOTFLG # &01 ;Dotted line flag -- MOS00 0153 0000 0335 LPARMS # &06 ;Parameters for line drawing -- MOS00 0154 0000 -- MOS00 0155 0000 ;Plotting triangles -- MOS00 0156 0000 -- MOS00 0157 0000 ^ VDUWS -- MOS00 0158 0000 0328 HPARMS # &06 -- MOS00 0159 0000 032E HSTART # &04 -- MOS00 0160 0000 0332 HDIREC # &01 -- MOS00 0161 0000 0333 SPARMS # &06 -- MOS00 0162 0000 0339 SSTART # &04 -- MOS00 0163 0000 033D SDIREC # &01 -- MOS00 0164 0000 033E GCSTMP # &08 -- MOS00 0165 0000 -- MOS00 0166 0000 032A HDELTA * HPARMS+&02 -- MOS00 0167 0000 0335 SDELTA * SPARMS+&02 -- MOS00 0168 0000 031B TRINLN * QQ -- MOS00 0169 0000 -- MOS00 0170 0000 ;Teletext temp variable for byte hidden by input cursor -- MOS00 0171 0000 -- MOS00 0172 0000 0338 TTXTMP * VDUWS+&10 ;as nothing available in TTX uses this much storage -- MOS00 0173 0000 -- MOS00 0174 0000 LNK MOS01 -- MOS01 0001 0000 -- MOS01 0002 0000 TTL VDU File - MOS01 -- MOS01 0003 0000 OPT MOS01 MOS01 MOS01 MOS01 MOS01 Acorn macro assembler Page 4 MOS01 VDU File - MOS01 MOS01 -- MOS01 0004 0000 -- MOS01 0005 0000 < &0001 -- MOS01 0006 0000 > &0002 -- MOS01 0007 0000 -- MOS01 0008 0000 ;Last revision 02/06/82 -- MOS01 0009 0000 -- MOS01 0010 0000 ;02/06/82 Remove HWMOFS -- MOS01 0011 0000 ;26/05/82 Concatenate TBZGOE & FCOLTB -- MOS01 0012 0000 ;05/05/82 Reverse bytes of multiplication tables TXTTB & HRGTB -- MOS01 0013 0000 ; Delete LRGTB -- MOS01 0014 0000 ;02/05/82 Concatenate TBZGxx tables -- MOS01 0015 0000 ; Change order of D1 & D2 jump tables & EWTBA -- MOS01 0016 0000 ;21/04/82 Colour mode #5 (which gives no change) included in TBZGxx. -- MOS01 0017 0000 ; External entry points provided -- MOS01 0018 0000 ;15/04/82 NPCOL declared -- MOS01 0019 0000 ;24/03/82 Delete DFSFPG as these are calculated at run time -- MOS01 0020 0000 ;22/01/82 Delete PDIVTB, it wasn't referenced -- MOS01 0021 0000 ; Delete READVP entry point & asssociated jump table -- MOS01 0022 0000 ; Change VDUVEC to VDUVEC, prefix all MOS names with m -- MOS01 0023 0000 ; TRMCH fixed as $0D -- MOS01 0024 0000 ; Soft font default now the exploded default -- MOS01 0025 0000 ;07/01/82 Change MODEL & VDUVEC -- MOS01 0026 0000 ;09/11/81 Change to one entry point for read VDU parameters -- MOS01 0027 0000 ;28/10/81 ETB msb changed from $49 to $59 -- MOS01 0028 0000 ; Chars $C0-$DF taken from $10 (was $0C) -- MOS01 0029 0000 ; Chars $E0-$FF taken from $0C (was $10) -- MOS01 0030 0000 -- MOS01 0031 0000 ; conditional assembly flags -- MOS01 0032 0000 00FF STARTP * &FF ;assume end points plotted twice -- MOS01 0033 0000 0000 PAGEFX * &00 ;Fix bug in page mode (I hope) -- MOS01 0034 0000 ; ($00 => TRUE, $FF => FALSE) -- MOS01 0035 0000 -- MOS01 0036 0000 ;ZERO PAGE VARIABLES -- MOS01 0037 0000 -- MOS01 0038 0000 ^ &00D0 -- MOS01 0039 0000 00D0 STATS # &01 -- MOS01 0040 0000 -- MOS01 0041 0000 ; -- MOS01 0042 0000 00D1 ZMASK # &01 -- MOS01 0043 0000 00D2 ZORA # &01 ;Next four must be in this order -- MOS01 0044 0000 00D3 ZEOR # &01 -- MOS01 0045 0000 00D4 ZGORA # &01 -- MOS01 0046 0000 00D5 ZGEOR # &01 -- MOS01 0047 0000 ; -- MOS01 0048 0000 00D6 ZMEMG # &02 -- MOS01 0049 0000 00D8 ZMEMT # &02 ;Immediately before ZTEMP (SSCRS) -- MOS01 0050 0000 00DA ZTEMP # &02 -- MOS01 0051 0000 00DC ZTEMPB # &02 -- MOS01 0052 0000 00DE ZTEMPC # &02 -- MOS01 0053 0000 00E0 ZTBL # &02 -- MOS01 0054 0000 -- MOS01 0055 0000 ;EQUATE TABLE -- MOS01 0056 0000 -- MOS01 0057 0000 0006 ACKASC * &06 ;Ascii value of acknowledge -- MOS01 0058 0000 00FE INBYTE * &FE ;Dummy colour to indicate invert (illegal colour) -- MOS01 0059 0000 -- MOS01 0060 0000 0020 TTXBCL * &20 ;Byte to clear screen with in TTX -- MOS01 0061 0000 000D TRMCH * &0D ;Byte to terminate edit mode -- MOS01 0062 0000 000C SFPAGE * &0C ;Page of first definable set of characters -- MOS01 0063 0000 003F INVSXT * &3F ;Used to invert logical colour of mode 2 without touching flash -- MOS01 0064 0000 000F NPCOL * &0F ;number of physical colours - 1 -- MOS01 0065 0000 -- MOS01 0066 0000 ;MACHINE CONSTANTS -- MOS01 0067 0000 -- MOS01 0068 0000 FE00 CRTCA * &FE00 ;6845 address reg. -- MOS01 0069 0000 FE01 CRTCD * &FE01 ;6845 data register -- MOS01 0070 0000 -- MOS01 0071 0000 ;ENTRY POINTS -- MOS01 0072 0000 -- MOS01 0073 0000 C300 CODE * &C300 -- MOS01 0074 0000 00C3 CODORG * /CODE -- MOS01 0075 0000 -- MOS01 0076 0000 ORG CODE -- MOS01 0077 C300 -- MOS01 0078 C300 4C FA CA JMP RESET ;Reset VDU to mode (A) -- MOS01 0079 C303 ; JMP GADDR -- MOS01 0080 C303 ; JMP WIND -- MOS01 0081 C303 ; JMP EIGABS -- MOS01 0082 C303 ; JMP IEG -- MOS01 0083 C303 ; JMP PLOT -- MOS01 0084 C303 ; JMP HPLOT -- MOS01 0085 C303 ; JMP SETZG -- MOS01 0086 C303 ; JMP RPXLD -- MOS01 0087 C303 -- MOS01 0088 C303 ; MOS messages to be written by WRSTR -- MOS01 0089 C303 MSG -- MOS01 0090 C303 MSGBBC ;BBC Computer -- MOS01 0091 C303 0D 42 42 = MCR,"BBC Computer ",0 -- MOS01 0092 C312 -- MOS01 0093 C312 MSG16K ;16K -- MOS01 0094 C312 31 36 4B = "16K",BEL,0 -- MOS01 0095 C317 -- MOS01 0096 C317 MSG32K ;32K -- MOS01 0097 C317 33 32 4B = "32K",BEL,0 -- MOS01 0098 C31C -- MOS01 0099 C31C MSG2CR -- MOS01 0100 C31C 08 = &08 -- MOS01 0101 C31D 0D = &0D -- MOS01 0102 C31E 0D = &0D ;uses the next $00 -- MOS01 0103 C31F -- MOS01 0104 C31F ;EXPANDED BIT PATTERN TABLES - must be contiguous -- MOS01 0105 C31F -- MOS01 0106 C31F ;FOUR COLOUR MODE -- MOS01 0107 C31F -- MOS01 0108 C31F 00 BPFTB = &00 -- MOS01 0109 C320 11 = &11 -- MOS01 0110 C321 22 = &22 -- MOS01 0111 C322 33 = &33 -- MOS01 0112 C323 44 = &44 -- MOS01 0113 C324 55 = &55 -- MOS01 0114 C325 66 = &66 -- MOS01 0115 C326 77 = &77 -- MOS01 0116 C327 88 = &88 -- MOS01 0117 C328 99 = &99 -- MOS01 0118 C329 AA = &AA -- MOS01 0119 C32A BB = &BB -- MOS01 0120 C32B CC = &CC -- MOS01 0121 C32C DD = &DD -- MOS01 0122 C32D EE = &EE -- MOS01 0123 C32E FF = &FF -- MOS01 0124 C32F MOS01 MOS01 MOS01 MOS01 Acorn macro assembler Page 5 MOS01 VDU File - MOS01 MOS01 -- MOS01 0125 C32F ;SIXTEEN COLOUR MODE -- MOS01 0126 C32F -- MOS01 0127 C32F 00 BPSTB = &00 -- MOS01 0128 C330 55 = &55 -- MOS01 0129 C331 AA = &AA -- MOS01 0130 C332 FF = &FF -- MOS01 0131 C333 -- MOS01 0132 C333 -- MOS01 0133 C333 ;JUMP TABLES Lower byte -- MOS01 0134 C333 -- MOS01 0135 C333 12 JTBLO = ACK ;Points to an RTS -- MOS01 0136 C334 3C = SOH -- MOS01 0137 C335 95 = STX -- MOS01 0138 C336 A0 = ETX -- MOS01 0139 C337 AC = EOT -- MOS01 0140 C338 B8 = ENQ -- MOS01 0141 C339 12 = ACK -- MOS01 0142 C33A 95 = BELL -- MOS01 0143 C33B C4 = BS -- MOS01 0144 C33C 63 = HT -- MOS01 0145 C33D EF = LF -- MOS01 0146 C33E 5A = VT -- MOS01 0147 C33F 47 = FF -- MOS01 0148 C340 B9 = CR -- MOS01 0149 C341 8C = SO -- MOS01 0150 C342 A5 = SI -- MOS01 0151 C343 C7 = DLE -- MOS01 0152 C344 00 = DCA -- MOS01 0153 C345 04 = DCB -- MOS01 0154 C346 82 = DCC -- MOS01 0155 C347 3F = DCD -- MOS01 0156 C348 9A = NAK -- MOS01 0157 C349 D0 = SYN -- MOS01 0158 C34A D6 = ETB -- MOS01 0159 C34B 0D = CAN -- MOS01 0160 C34C 62 = EM -- MOS01 0161 C34D 93 = SUB -- MOS01 0162 C34E 12 = ACK ;Points to an RTS -- MOS01 0163 C34F F9 = FS -- MOS01 0164 C350 76 = GS -- MOS01 0165 C351 64 = RS -- MOS01 0166 C352 91 = US -- MOS01 0167 C353 D8 = DEL -- MOS01 0168 C354 -- MOS01 0169 C354 ;Higher byte unless bytes to be queued, in which case, lower nibble -- MOS01 0170 C354 ;gives number of bytes to be queued, upper offset of higher byte -- MOS01 0171 C354 ;of routine address from code origin as specified by CODORG. Note -- MOS01 0172 C354 ;that this must be <8, i.e. biy 7 of whole byte is clear. -- MOS01 0173 C354 -- MOS01 0174 C354 C5 JTBHI = /(ACK ) ;Points to an RTS -- MOS01 0175 C355 2F = SOH:SHR:&8-CODORG:SHL:&4+&10-&1 ;Queue 1 byte (SOH) -- MOS01 0176 C356 C5 = /(STX ) -- MOS01 0177 C357 C5 = /(ETX ) -- MOS01 0178 C358 C5 = /(EOT ) -- MOS01 0179 C359 C5 = /(ENQ ) -- MOS01 0180 C35A C5 = /(ACK ) -- MOS01 0181 C35B E8 = /(BELL ) -- MOS01 0182 C35C C5 = /(BS ) -- MOS01 0183 C35D C6 = /(HT ) -- MOS01 0184 C35E C6 = /(LF ) -- MOS01 0185 C35F C6 = /(VT ) -- MOS01 0186 C360 C7 = /(FF ) -- MOS01 0187 C361 C7 = /(CR ) -- MOS01 0188 C362 C5 = /(SO ) -- MOS01 0189 C363 C5 = /(SI ) -- MOS01 0190 C364 C7 = /(DLE ) -- MOS01 0191 C365 5F = DCA:SHR:&8-CODORG:SHL:&4+&10-&1 ;Queue 1 byte (DCA) -- MOS01 0192 C366 5E = DCB:SHR:&8-CODORG:SHL:&4+&10-&2 ;Queue 2 bytes (DCB) -- MOS01 0193 C367 5B = DCC:SHR:&8-CODORG:SHL:&4+&10-&5 ;Queue 5 bytes (DCC) -- MOS01 0194 C368 C8 = /(DCD ) -- MOS01 0195 C369 C5 = /(NAK ) -- MOS01 0196 C36A 5F = SYN:SHR:&8-CODORG:SHL:&4+&10-&1 ;Queue 1 byte (SYN) -- MOS01 0197 C36B 57 = ETB:SHR:&8-CODORG:SHL:&4+&10-&9 ;Queue 9 bytes (ETB) -- MOS01 0198 C36C 78 = CAN:SHR:&8-CODORG:SHL:&4+&10-&8 ;Queue 8 bytes (CAN) -- MOS01 0199 C36D 6B = EM:SHR:&8-CODORG:SHL:&4+&10-&5 ;Queue 5 bytes (EM) -- MOS01 0200 C36E C9 = /(SUB ) -- MOS01 0201 C36F C5 = /(ACK ) ;Points to an RTS -- MOS01 0202 C370 3C = FS:SHR:&8-CODORG:SHL:&4+&10-&4 ;Queue 4 bytes (FS) -- MOS01 0203 C371 7C = GS:SHR:&8-CODORG:SHL:&4+&10-&4 ;Queue 4 bytes (GS) -- MOS01 0204 C372 C7 = /(RS ) -- MOS01 0205 C373 4E = US:SHR:&8-CODORG:SHL:&4+&10-&2 ;Queue 2 bytes (US) -- MOS01 0206 C374 CF = /(DEL ) -- MOS01 0207 C375 -- MOS01 0208 C375 ;ROW OFFSETS FOR H.R.G. -- MOS01 0209 C375 -- MOS01 0210 C375 00 HRGTB = &00 -- MOS01 0211 C376 00 = &00 -- MOS01 0212 C377 02 = &02 -- MOS01 0213 C378 80 = &80 -- MOS01 0214 C379 05 = &05 -- MOS01 0215 C37A 00 = &00 -- MOS01 0216 C37B 07 = &07 -- MOS01 0217 C37C 80 = &80 -- MOS01 0218 C37D 0A = &0A -- MOS01 0219 C37E 00 = &00 -- MOS01 0220 C37F 0C = &0C -- MOS01 0221 C380 80 = &80 -- MOS01 0222 C381 0F = &0F -- MOS01 0223 C382 00 = &00 -- MOS01 0224 C383 11 = &11 -- MOS01 0225 C384 80 = &80 -- MOS01 0226 C385 14 = &14 -- MOS01 0227 C386 00 = &00 -- MOS01 0228 C387 16 = &16 -- MOS01 0229 C388 80 = &80 -- MOS01 0230 C389 19 = &19 -- MOS01 0231 C38A 00 = &00 -- MOS01 0232 C38B 1B = &1B -- MOS01 0233 C38C 80 = &80 -- MOS01 0234 C38D 1E = &1E -- MOS01 0235 C38E 00 = &00 -- MOS01 0236 C38F 20 = &20 -- MOS01 0237 C390 80 = &80 -- MOS01 0238 C391 23 = &23 -- MOS01 0239 C392 00 = &00 -- MOS01 0240 C393 25 = &25 -- MOS01 0241 C394 80 = &80 -- MOS01 0242 C395 28 = &28 -- MOS01 0243 C396 00 = &00 -- MOS01 0244 C397 2A = &2A -- MOS01 0245 C398 80 = &80 MOS01 MOS01 MOS01 MOS01 Acorn macro assembler Page 6 MOS01 VDU File - MOS01 MOS01 -- MOS01 0246 C399 2D = &2D -- MOS01 0247 C39A 00 = &00 -- MOS01 0248 C39B 2F = &2F -- MOS01 0249 C39C 80 = &80 -- MOS01 0250 C39D 32 = &32 -- MOS01 0251 C39E 00 = &00 -- MOS01 0252 C39F 34 = &34 -- MOS01 0253 C3A0 80 = &80 -- MOS01 0254 C3A1 37 = &37 -- MOS01 0255 C3A2 00 = &00 -- MOS01 0256 C3A3 39 = &39 -- MOS01 0257 C3A4 80 = &80 -- MOS01 0258 C3A5 3C = &3C -- MOS01 0259 C3A6 00 = &00 -- MOS01 0260 C3A7 3E = &3E -- MOS01 0261 C3A8 80 = &80 -- MOS01 0262 C3A9 41 = &41 -- MOS01 0263 C3AA 00 = &00 -- MOS01 0264 C3AB 43 = &43 -- MOS01 0265 C3AC 80 = &80 -- MOS01 0266 C3AD 46 = &46 -- MOS01 0267 C3AE 00 = &00 -- MOS01 0268 C3AF 48 = &48 -- MOS01 0269 C3B0 80 = &80 -- MOS01 0270 C3B1 4B = &4B -- MOS01 0271 C3B2 00 = &00 -- MOS01 0272 C3B3 4D = &4D -- MOS01 0273 C3B4 80 = &80 -- MOS01 0274 C3B5 -- MOS01 0275 C3B5 ;ROW OFFSET TABLE FOR TELETEXT -- MOS01 0276 C3B5 -- MOS01 0277 C3B5 00 TXTTB = &00 -- MOS01 0278 C3B6 00 = &00 -- MOS01 0279 C3B7 00 = &00 -- MOS01 0280 C3B8 28 = &28 -- MOS01 0281 C3B9 00 = &00 -- MOS01 0282 C3BA 50 = &50 -- MOS01 0283 C3BB 00 = &00 -- MOS01 0284 C3BC 78 = &78 -- MOS01 0285 C3BD 00 = &00 -- MOS01 0286 C3BE A0 = &A0 -- MOS01 0287 C3BF 00 = &00 -- MOS01 0288 C3C0 C8 = &C8 -- MOS01 0289 C3C1 00 = &00 -- MOS01 0290 C3C2 F0 = &F0 -- MOS01 0291 C3C3 01 = &01 -- MOS01 0292 C3C4 18 = &18 -- MOS01 0293 C3C5 01 = &01 -- MOS01 0294 C3C6 40 = &40 -- MOS01 0295 C3C7 01 = &01 -- MOS01 0296 C3C8 68 = &68 -- MOS01 0297 C3C9 01 = &01 -- MOS01 0298 C3CA 90 = &90 -- MOS01 0299 C3CB 01 = &01 -- MOS01 0300 C3CC B8 = &B8 -- MOS01 0301 C3CD 01 = &01 -- MOS01 0302 C3CE E0 = &E0 -- MOS01 0303 C3CF 02 = &02 -- MOS01 0304 C3D0 08 = &08 -- MOS01 0305 C3D1 02 = &02 -- MOS01 0306 C3D2 30 = &30 -- MOS01 0307 C3D3 02 = &02 -- MOS01 0308 C3D4 58 = &58 -- MOS01 0309 C3D5 02 = &02 -- MOS01 0310 C3D6 80 = &80 -- MOS01 0311 C3D7 02 = &02 -- MOS01 0312 C3D8 A8 = &A8 -- MOS01 0313 C3D9 02 = &02 -- MOS01 0314 C3DA D0 = &D0 -- MOS01 0315 C3DB 02 = &02 -- MOS01 0316 C3DC F8 = &F8 -- MOS01 0317 C3DD 03 = &03 -- MOS01 0318 C3DE 20 = &20 -- MOS01 0319 C3DF 03 = &03 -- MOS01 0320 C3E0 48 = &48 -- MOS01 0321 C3E1 03 = &03 -- MOS01 0322 C3E2 70 = &70 -- MOS01 0323 C3E3 03 = &03 -- MOS01 0324 C3E4 98 = &98 -- MOS01 0325 C3E5 03 = &03 -- MOS01 0326 C3E6 C0 = &C0 -- MOS01 0327 C3E7 -- MOS01 0328 C3E7 ;NO. ROWS IN EACH MEMORY MODE -- MOS01 0329 C3E7 -- MOS01 0330 C3E7 1F PROWS = &1F -- MOS01 0331 C3E8 1F = &1F -- MOS01 0332 C3E9 1F = &1F -- MOS01 0333 C3EA 18 = &18 -- MOS01 0334 C3EB 1F = &1F -- MOS01 0335 C3EC 1F = &1F -- MOS01 0336 C3ED 18 = &18 -- MOS01 0337 C3EE 18 = &18 -- MOS01 0338 C3EF -- MOS01 0339 C3EF ;NO. COLS. IN EACH MEMORY MODE -- MOS01 0340 C3EF -- MOS01 0341 C3EF 4F PCOLS = &4F -- MOS01 0342 C3F0 27 = &27 -- MOS01 0343 C3F1 13 = &13 -- MOS01 0344 C3F2 4F = &4F -- MOS01 0345 C3F3 27 = &27 -- MOS01 0346 C3F4 13 = &13 -- MOS01 0347 C3F5 27 = &27 -- MOS01 0348 C3F6 27 = &27 -- MOS01 0349 C3F7 -- MOS01 0350 C3F7 ;BYTES TO BE LOADED INTO mMODREG FOR DIFFERENT MODES -- MOS01 0351 C3F7 -- MOS01 0352 C3F7 9C INDMOD = &9C -- MOS01 0353 C3F8 D8 = &D8 -- MOS01 0354 C3F9 F4 = &F4 -- MOS01 0355 C3FA 9C = &9C -- MOS01 0356 C3FB 88 = &88 -- MOS01 0357 C3FC C4 = &C4 -- MOS01 0358 C3FD 88 = &88 -- MOS01 0359 C3FE 4B = &4B -- MOS01 0360 C3FF -- MOS01 0361 C3FF ;BYTES PER CHARACTER -- MOS01 0362 C3FF ;IN EACH MODE -- MOS01 0363 C3FF -- MOS01 0364 C3FF 08 BYTCHT = &08 -- MOS01 0365 C400 10 = &10 -- MOS01 0366 C401 20 = &20 MOS01 MOS01 MOS01 MOS01 Acorn macro assembler Page 7 MOS01 VDU File - MOS01 MOS01 -- MOS01 0367 C402 08 = &08 -- MOS01 0368 C403 08 = &08 -- MOS01 0369 C404 10 = &10 -- MOS01 0370 C405 08 = &08 -- MOS01 0371 C406 01 = &01 -- MOS01 0372 C407 -- MOS01 0373 C407 ;MASK TABLES - must be contiguous -- MOS01 0374 C407 -- MOS01 0375 C407 ;For each mode, the masks of each pixel, MS first -- MOS01 0376 C407 ;Note that it is now assumed that adjacent masks may be generated -- MOS01 0377 C407 ;by either ASL or LSR. -- MOS01 0378 C407 -- MOS01 0379 C407 ;SIXTEEN colour mode -- MOS01 0380 C407 -- MOS01 0381 C407 AA MASKTB = &AA -- MOS01 0382 C408 55 = &55 -- MOS01 0383 C409 -- MOS01 0384 C409 ;FOUR colour mode -- MOS01 0385 C409 88 = &88 -- MOS01 0386 C40A 44 = &44 -- MOS01 0387 C40B 22 = &22 -- MOS01 0388 C40C 11 = &11 -- MOS01 0389 C40D -- MOS01 0390 C40D ;TWO colour mode -- MOS01 0391 C40D -- MOS01 0392 C40D 80 BITTBL = &80 -- MOS01 0393 C40E 40 = &40 -- MOS01 0394 C40F 20 = &20 -- MOS01 0395 C410 10 = &10 -- MOS01 0396 C411 08 = &08 -- MOS01 0397 C412 04 = &04 -- MOS01 0398 C413 -- MOS01 0399 C413 02 = &02 ;**** NEXT 3 BYTES USED BY CFS **** -- MOS01 0400 C414 ;Uses $01 of next table -- MOS01 0401 C414 -- MOS01 0402 C414 ;COLOURS AVAILABLE FOR MODES -- MOS01 0403 C414 -- MOS01 0404 C414 01 COLMOD = &01 -- MOS01 0405 C415 03 = &03 -- MOS01 0406 C416 0F = &0F -- MOS01 0407 C417 -- MOS01 0408 C417 01 = &01 ;**** NEXT 3 BYTES USED BY CFS **** -- MOS01 0409 C418 01 = &01 -- MOS01 0410 C419 03 = &03 -- MOS01 0411 C41A 01 = &01 -- MOS01 0412 C41B ;TTX - must be 0 - uses 1st byte of next table -- MOS01 0413 C41B -- MOS01 0414 C41B ;Bytes for forming ZGORA & ZGEOR -- MOS01 0415 C41B ;Tables have been run into each other to save bytes. -- MOS01 0416 C41B ;They should be as follows -- MOS01 0417 C41B -- MOS01 0418 C41B ;TBZGOO OR the OR :- $FF,$00,$00,$FF,$FF,$FF -- MOS01 0419 C41B ;TBZGEO EOR the OR :- $00,$00,$FF,$FF,$FF,$FF -- MOS01 0420 C41B ;TBZGOE OR the EOR :- $00,$FF,$00,$00,$FF,$FF -- MOS01 0421 C41B ;TBZGEE EOR the EOR :- $FF,$FF,$FF,$00,$00,$FF -- MOS01 0422 C41B -- MOS01 0423 C41B ;These are for the colour modes 0 to 5, being -- MOS01 0424 C41B ;0=Store,1=OR,2=AND,3=EOR,4=Invert,5=No change -- MOS01 0425 C41B -- MOS01 0426 C41B 00 TBZGOE = &00 -- MOS01 0427 C41C FF TBZGOO = &FF -- MOS01 0428 C41D 00 TBZGEO = &00 -- MOS01 0429 C41E 00 = &00 -- MOS01 0430 C41F FF = &FF -- MOS01 0431 C420 FF TBZGEE = &FF -- MOS01 0432 C421 FF = &FF -- MOS01 0433 C422 FF = &FF -- MOS01 0434 C423 00 = &00 ;Uses next $00, $FF -- MOS01 0435 C424 -- MOS01 0436 C424 ;~~~ COLOUR TABLES ~~~ -- MOS01 0437 C424 -- MOS01 0438 C424 ;FULL COLOUR TABLES -- MOS01 0439 C424 ;Tables of 'full colours', -- MOS01 0440 C424 ;i.e. of bytes with all bits -- MOS01 0441 C424 ;set to 1 colour, in ascending -- MOS01 0442 C424 ;colour order -- MOS01 0443 C424 -- MOS01 0444 C424 00 FCOLTB = &00 ;Two colour table -- MOS01 0445 C425 FF = &FF -- MOS01 0446 C426 -- MOS01 0447 C426 ;Four colour table -- MOS01 0448 C426 -- MOS01 0449 C426 00 = &00 -- MOS01 0450 C427 0F = &0F -- MOS01 0451 C428 F0 = &F0 -- MOS01 0452 C429 FF = &FF -- MOS01 0453 C42A -- MOS01 0454 C42A ;Sixteen colour table -- MOS01 0455 C42A -- MOS01 0456 C42A 00 = &00 -- MOS01 0457 C42B 03 = &03 -- MOS01 0458 C42C 0C = &0C -- MOS01 0459 C42D 0F = &0F -- MOS01 0460 C42E 30 = &30 -- MOS01 0461 C42F 33 = &33 -- MOS01 0462 C430 3C = &3C -- MOS01 0463 C431 3F = &3F ;INVSXT This byte used to invert graphics pixels -- MOS01 0464 C432 C0 = &C0 -- MOS01 0465 C433 C3 = &C3 -- MOS01 0466 C434 CC = &CC -- MOS01 0467 C435 CF = &CF -- MOS01 0468 C436 F0 = &F0 -- MOS01 0469 C437 F3 = &F3 -- MOS01 0470 C438 FC = &FC -- MOS01 0471 C439 FF = &FF -- MOS01 0472 C43A -- MOS01 0473 C43A ;TABLE FOR NPIX -- MOS01 0474 C43A -- MOS01 0475 C43A ;No. pixles per byte in each graphics mode -- MOS01 0476 C43A ;(0 if not graphics) -- MOS01 0477 C43A -- MOS01 0478 C43A 07 NPIXTB = &07 -- MOS01 0479 C43B 03 = &03 -- MOS01 0480 C43C 01 = &01 -- MOS01 0481 C43D 00 = &00 ;(Non graphics) -- MOS01 0482 C43E 07 = &07 -- MOS01 0483 C43F 03 = &03 -- MOS01 0484 C440 ;Non-graphics modes - use next 2 $00s -- MOS01 0485 C440 -- MOS01 0486 C440 ;MEMORY MAP TYPES -- MOS01 0487 C440 ;Index from MODE (0..7), to MOS01 MOS01 MOS01 MOS01 Acorn macro assembler Page 8 MOS01 VDU File - MOS01 MOS01 -- MOS01 0488 C440 ;the following 5 element tables -- MOS01 0489 C440 -- MOS01 0490 C440 MODETB -- MOS01 0491 C440 00 = &00 -- MOS01 0492 C441 SOUNDV ;channel dependent period offset -- MOS01 0493 C441 C43D SCHOFF * SOUNDV -&04 -- MOS01 0494 C441 -- MOS01 0495 C441 00 = &00 -- MOS01 0496 C442 00 = &00 -- MOS01 0497 C443 01 = &01 -- MOS01 0498 C444 02 = &02 -- MOS01 0499 C445 02 = &02 -- MOS01 0500 C446 03 = &03 -- MOS01 0501 C447 ;Uses $04 of next table -- MOS01 0502 C447 -- MOS01 0503 C447 -- MOS01 0504 C447 ;EXIT WINDOW OFFSET TABLE -- MOS01 0505 C447 -- MOS01 0506 C447 04 EWTBA = &04 -- MOS01 0507 C448 00 = &00 -- MOS01 0508 C449 06 = &06 -- MOS01 0509 C44A 02 = &02 -- MOS01 0510 C44B -- MOS01 0511 C44B -- MOS01 0512 C44B ;C0 control table -- MOS01 0513 C44B ;C1 control table -- MOS01 0514 C44B -- MOS01 0515 C44B 0D CONE = &0D -- MOS01 0516 C44C 05 = &05 -- MOS01 0517 C44D 0D = &0D -- MOS01 0518 C44E 05 = &05 ;Uses next $04 -- MOS01 0519 C44F 04 CZERO = &04 -- MOS01 0520 C450 04 = &04 -- MOS01 0521 C451 0C = &0C -- MOS01 0522 C452 0C = &0C -- MOS01 0523 C453 04 = &04 -- MOS01 0524 C454 -- MOS01 0525 C454 ;TABLES OF JUMP VECTORS -- MOS01 0526 C454 ;FOR CLEAR SCREEN -- MOS01 0527 C454 -- MOS01 0528 C454 07 CLSCTA = CLASCA ;(LSB) -- MOS01 0529 C455 37 = CLASCB -- MOS01 0530 C456 7F = CLASCC -- MOS01 0531 C457 97 = CLASCD -- MOS01 0532 C458 EB = CLASCE -- MOS01 0533 C459 -- MOS01 0534 C459 ;CLSCTB = CLASCA / ;(MSB) -- MOS01 0535 C459 ; = CLASCB / -- MOS01 0536 C459 ; = CLASCC / -- MOS01 0537 C459 ; = CLASCD / -- MOS01 0538 C459 ; = CLASCE / -- MOS01 0539 C459 -- MOS01 0540 C459 ;NO. BYTES PER SCREEN (MSB) -- MOS01 0541 C459 -- MOS01 0542 C459 50 BYTSTA = &50 -- MOS01 0543 C45A 40 = &40 -- MOS01 0544 C45B 28 = &28 -- MOS01 0545 C45C 20 = &20 -- MOS01 0546 C45D 04 = &04 -- MOS01 0547 C45E -- MOS01 0548 C45E ;MSB OF SCREEN START -- MOS01 0549 C45E -- MOS01 0550 C45E 30 STSCTB = &30 -- MOS01 0551 C45F 40 = &40 -- MOS01 0552 C460 58 = &58 -- MOS01 0553 C461 60 = &60 -- MOS01 0554 C462 7C = &7C -- MOS01 0555 C463 -- MOS01 0556 C463 ;BYTE WIDTH TYPES -- MOS01 0557 C463 ;Index from MEMODE (0..4), to -- MOS01 0558 C463 ;the following 3 element tables -- MOS01 0559 C463 -- MOS01 0560 C463 ;Now replaced with LSRA -- MOS01 0561 C463 -- MOS01 0562 C463 ;LSB OF NO. BYTES PER ROW -- MOS01 0563 C463 -- MOS01 0564 C463 28 BYTRTA = &28 -- MOS01 0565 C464 40 = &40 -- MOS01 0566 C465 80 = &80 -- MOS01 0567 C466 -- MOS01 0568 C466 ;LSB OF SCREEN OFFSET TABLES -- MOS01 0569 C466 -- MOS01 0570 C466 B5 TBZTBA = TXTTB -- MOS01 0571 C467 75 = HRGTB -- MOS01 0572 C468 75 = HRGTB -- MOS01 0573 C469 -- MOS01 0574 C469 -- MOS01 0575 C469 ;CRTC TABLES -- MOS01 0576 C469 -- MOS01 0577 C469 ;INDEX FOR CRTC TABLES -- MOS01 0578 C469 -- MOS01 0579 C469 0B CRTCX = &0B -- MOS01 0580 C46A 17 = &17 -- MOS01 0581 C46B 23 = &23 -- MOS01 0582 C46C 2F = &2F -- MOS01 0583 C46D 3B = &3B -- MOS01 0584 C46E -- MOS01 0585 C46E ;CRTC TABLE FOR MODES 0-2 -- MOS01 0586 C46E -- MOS01 0587 C46E 7F CRTCTB = &7F -- MOS01 0588 C46F 50 = &50 -- MOS01 0589 C470 62 = &62 -- MOS01 0590 C471 28 = &28 ;VS=2 -- MOS01 0591 C472 26 = &26 -- MOS01 0592 C473 00 = &00 -- MOS01 0593 C474 20 = &20 -- MOS01 0594 C475 22 = &22 ;was $22 & then it was $23 -- MOS01 0595 C476 01 = &01 -- MOS01 0596 C477 07 = &07 -- MOS01 0597 C478 67 = &67 -- MOS01 0598 C479 08 = &08 -- MOS01 0599 C47A -- MOS01 0600 C47A ;CRTC TABLE FOR MODE 3 -- MOS01 0601 C47A -- MOS01 0602 C47A 7F = &7F -- MOS01 0603 C47B 50 = &50 -- MOS01 0604 C47C 62 = &62 -- MOS01 0605 C47D 28 = &28 ;VS=2 -- MOS01 0606 C47E 1E = &1E -- MOS01 0607 C47F 02 = &02 -- MOS01 0608 C480 19 = &19 MOS01 MOS01 MOS01 MOS01 Acorn macro assembler Page 9 MOS01 VDU File - MOS01 MOS01 -- MOS01 0609 C481 1B = &1B ;was $1B & then it was $1C -- MOS01 0610 C482 01 = &01 -- MOS01 0611 C483 09 = &09 -- MOS01 0612 C484 67 = &67 -- MOS01 0613 C485 09 = &09 -- MOS01 0614 C486 -- MOS01 0615 C486 ;CRTC TABLE FOR MODES 4-5 -- MOS01 0616 C486 -- MOS01 0617 C486 3F = &3F -- MOS01 0618 C487 28 = &28 -- MOS01 0619 C488 31 = &31 -- MOS01 0620 C489 24 = &24 ;VS=2 -- MOS01 0621 C48A 26 = &26 -- MOS01 0622 C48B 00 = &00 -- MOS01 0623 C48C 20 = &20 -- MOS01 0624 C48D 22 = &22 ;was $22 & then it was $23 -- MOS01 0625 C48E 01 = &01 -- MOS01 0626 C48F 07 = &07 -- MOS01 0627 C490 67 = &67 -- MOS01 0628 C491 08 = &08 -- MOS01 0629 C492 -- MOS01 0630 C492 ;CRTC TABLE FOR MODE 6 -- MOS01 0631 C492 -- MOS01 0632 C492 3F = &3F -- MOS01 0633 C493 28 = &28 -- MOS01 0634 C494 31 = &31 -- MOS01 0635 C495 24 = &24 ;VS=2 -- MOS01 0636 C496 1E = &1E -- MOS01 0637 C497 02 = &02 -- MOS01 0638 C498 19 = &19 -- MOS01 0639 C499 1B = &1B ;was $1B & then it was $1C -- MOS01 0640 C49A 01 = &01 -- MOS01 0641 C49B 09 = &09 -- MOS01 0642 C49C 67 = &67 -- MOS01 0643 C49D 09 = &09 -- MOS01 0644 C49E -- MOS01 0645 C49E ;CRTC TABLE FOR MODE 7 -- MOS01 0646 C49E -- MOS01 0647 C49E 3F = &3F -- MOS01 0648 C49F 28 = &28 -- MOS01 0649 C4A0 33 = &33 -- MOS01 0650 C4A1 24 = &24 ;VS=2 -- MOS01 0651 C4A2 1E = &1E -- MOS01 0652 C4A3 02 = &02 -- MOS01 0653 C4A4 19 = &19 -- MOS01 0654 C4A5 1B = &1B ;was $1B & then it was $1C -- MOS01 0655 C4A6 93 = &93 -- MOS01 0656 C4A7 12 = &12 -- MOS01 0657 C4A8 72 = &72 -- MOS01 0658 C4A9 13 = &13 -- MOS01 0659 C4AA -- MOS01 0660 C4AA ;JUMP TABLES FOR PLOTTING ROUTINES -- MOS01 0661 C4AA -- MOS01 0662 C4AA 57 D1JTB = EA -- MOS01 0663 C4AB D3 = /(EA ) -- MOS01 0664 C4AC 4F = NA -- MOS01 0665 C4AD D3 = /(NA ) -- MOS01 0666 C4AE -- MOS01 0667 C4AE 3B D2JTBL = EB -- MOS01 0668 C4AF 45 = WB -- MOS01 0669 C4B0 13 = NB -- MOS01 0670 C4B1 1C = SB -- MOS01 0671 C4B2 -- MOS01 0672 C4B2 D3 D2JTBH = /(EB ) -- MOS01 0673 C4B3 D3 = /(WB ) -- MOS01 0674 C4B4 D3 = /(NB ) -- MOS01 0675 C4B5 D3 = /(SB ) -- MOS01 0676 C4B6 -- MOS01 0677 C4B6 -- MOS01 0678 C4B6 ;TELETEXT CONVERSION TABLE -- MOS01 0679 C4B6 -- MOS01 0680 C4B6 23 TTXTB = &23 -- MOS01 0681 C4B7 5F = &5F -- MOS01 0682 C4B8 60 = &60 -- MOS01 0683 C4B9 23 = &23 -- MOS01 0684 C4BA -- MOS01 0685 C4BA -- MOS01 0686 C4BA ; font table -- MOS01 0687 C4BA -- MOS01 0688 C4BA FFSZOT ;Four,Five,Six,Zero,One,Two -- MOS01 0689 C4BA 04 = &04 -- MOS01 0690 C4BB 05 = &05 -- MOS01 0691 C4BC 06 = &06 -- MOS01 0692 C4BD 00 = &00 -- MOS01 0693 C4BE 01 = &01 -- MOS01 0694 C4BF 02 = &02 -- MOS01 0695 C4C0 -- MOS01 0696 C4C0 -- MOS01 0697 C4C0 LNK MOS02 -- MOS02 0001 C4C0 -- MOS02 0002 C4C0 TTL VDU File - MOS02 -- MOS02 0003 C4C0 OPT MOS02 MOS02 MOS02 MOS02 MOS02 Acorn macro assembler Page 10 MOS02 VDU File - MOS02 MOS02 -- MOS02 0004 C4C0 -- MOS02 0005 C4C0 ;Last revision 30/04/82 -- MOS02 0006 C4C0 -- MOS02 0007 C4C0 ;30/04/82 Recoded to allow for reverse queueing -- MOS02 0008 C4C0 ;19/04/82 To put ASCIQ in line, and various other byte savings -- MOS02 0009 C4C0 ;19/11/81 No longer include bell in printer range check -- MOS02 0010 C4C0 -- MOS02 0011 C4C0 -- MOS02 0012 C4C0 ;ENTRY POINT - SELECT ROUTINE -- MOS02 0013 C4C0 -- MOS02 0014 C4C0 -- MOS02 0015 C4C0 VDU -- MOS02 0016 C4C0 AE 6A 02 LDX QPOSN ;Are we Qing ? -- MOS02 0017 C4C3 D0 4E BNE QING ;Yes?, then queue this byte MOS02 0017 C4C3 v31 MOS02 0018 C4C5 24 D0 BIT STATS MOS02 0017 C4C3 v31 MOS02 0019 C4C7 50 0F BVC NOTCEA ;In C.E. mode? MOS02 0017 C4C3 v31 MOS02 0020 C4C9 20 67 C5 JSR CSWAP ;Yes?, then swap cursors MOS02 0017 C4C3 v31 MOS02 0021 C4CC 20 60 CD JSR OCSRDL ;Delete the output cursor MOS02 0017 C4C3 v31 MOS02 0022 C4CF 30 07 BMI NOTCEA ;Are we disabled ? then skip MOS02 0017 C4C3 v31 MOS02 0023 C4D1 C9 0D CMPIM TRMCH ;No?, then is this TRMCH ? MOS02 0017 C4C3 v31 MOS02 0024 C4D3 D0 03 BNE NOTCEA MOS02 0017 C4C3 v31 MOS02 0025 C4D5 20 AA D8 JSR CSEDEX ;Yes?, then exit C.E. mode MOS02 0017 C4C3 v31 MOS02 0026 C4D8 C9 7F NOTCEA CMPIM &7F ;No?, then form vector MOS02 0017 C4C3 v31 MOS02 0027 C4DA F0 13 BEQ ISDEL MOS02 0017 C4C3 v31 MOS02 0028 C4DC C9 20 CMPIM &20 MOS02 0017 C4C3 v31 MOS02 0029 C4DE 90 11 BCC NOTDEL ; Branch if unprintable MOS02 0017 C4C3 v31 MOS02 0030 C4E0 24 D0 BIT STATS ;Printable - are we disabled ? MOS02 0017 C4C3 v31 MOS02 0031 C4E2 30 06 BMI NOTC20 ;Yes, then print it if print module on MOS02 0017 C4C3 v31 MOS02 0032 C4E4 20 A7 CF JSR VDUPR ;No?, then print to VDU MOS02 0017 C4C3 v31 MOS02 0033 C4E7 20 63 C6 JSR HT MOS02 0017 C4C3 v31 MOS02 0034 C4EA [ MOS125 = &FF MOS02 0017 C4C3 v31 MOS02 0036 C4EA | MOS02 0017 C4C3 v31 MOS02 0037 C4EA NOTC20 ;A dead MOS02 0017 C4C3 v31 MOS02 0038 C4EA A5 D0 LDA STATS MOS02 0017 C4C3 v31 MOS02 0039 C4EC 4A LSRA ;C=1 if printer module on MOS02 0017 C4C3 v31 MOS02 0040 C4ED 10 71 BPL CSWDEX ;& ditto MOS02 0040 C4ED v0E MOS02 0041 C4EF ] MOS02 0040 C4ED v0E MOS02 0042 C4EF MOS02 0040 C4ED v0E MOS02 0043 C4EF A9 20 ISDEL LDAIM &20 ;(Form correct index for DEL) MOS02 0040 C4ED v0E MOS02 0044 C4F1 MOS02 0040 C4ED v0E MOS02 0045 C4F1 A8 NOTDEL TAY MOS02 0040 C4ED v0E MOS02 0046 C4F2 B9 33 C3 LDAAY JTBLO ;Get LSByte of jump vector MOS02 0040 C4ED v0E MOS02 0047 C4F5 8D 5D 03 STA JVEC MOS02 0040 C4ED v0E MOS02 0048 C4F8 B9 54 C3 LDAAY JTBHI ;Get MSByte MOS02 0040 C4ED v0E MOS02 0049 C4FB 30 4A BMI REXEC ;No Qing required, so execute routine MOS02 0040 C4ED v0E MOS02 0050 C4FD AA TAX ;b7=0, so Q needed - set it up MOS02 0040 C4ED v0E MOS02 0051 C4FE 09 F0 ORAIM &F0 ;2's comp. of no. of bytes to Q MOS02 0040 C4ED v0E MOS02 0052 C500 8D 6A 02 STA QPOSN MOS02 0040 C4ED v0E MOS02 0053 C503 8A TXA ;Generate MSByte of address - MSNybble, plus CODORG MOS02 0040 C4ED v0E MOS02 0054 C504 4A LSRA MOS02 0040 C4ED v0E MOS02 0055 C505 4A LSRA MOS02 0040 C4ED v0E MOS02 0056 C506 4A LSRA MOS02 0040 C4ED v0E MOS02 0057 C507 4A LSRA MOS02 0040 C4ED v0E MOS02 0058 C508 18 CLC MOS02 0040 C4ED v0E MOS02 0059 C509 69 C3 ADCIM CODORG ;Forms the high byte of the vector MOS02 0040 C4ED v0E MOS02 0060 C50B 8D 5E 03 STA JVEC +&01 MOS02 0040 C4ED v0E MOS02 0061 C50E 24 D0 BIT STATS ;Swap back again if C.E. MOS02 0040 C4ED v0E MOS02 0062 C510 70 1E BVS NOTC10 MOS02 0040 C4ED v0E MOS02 0063 C512 [ MOS125 = &FF MOS02 0040 C4ED v0E MOS02 0065 C512 | MOS02 0040 C4ED v0E MOS02 0066 C512 ;adcim codorg never overflows (here...), C=0 MOS02 0040 C4ED v0E MOS02 0067 C512 ] MOS02 0040 C4ED v0E MOS02 0068 C512 60 ACK RTS ;NUL points at this to save a byte MOS02 0040 C4ED v0E MOS02 0069 C513 MOS02 0040 C4ED v0E MOS02 0070 C513 MOS02 0040 C4ED v0E MOS02 0071 C513 9D 24 02 QING STAAX QEND-&FF ;Q the byte MOS02 0040 C4ED v0E MOS02 0072 C516 E8 INX MOS02 0040 C4ED v0E MOS02 0073 C517 8E 6A 02 STX QPOSN ;(z preserved from INX) MOS02 0040 C4ED v0E MOS02 0074 C51A D0 17 BNE CLCEX ;More to do?, then exit MOS02 0040 C4ED v0E MOS02 0075 C51C 24 D0 BIT STATS ;Disabled?, then go away MOS02 0040 C4ED v0E MOS02 0076 C51E 30 15 BMI DISABL MOS02 0040 C4ED v0E MOS02 0077 C520 70 05 BVS NOTCEB ;C.E. mode, then do swapping MOS02 0040 C4ED v0E MOS02 0078 C522 20 FA CC JSR RUNNER MOS02 0040 C4ED v0E MOS02 0079 C525 18 CLC MOS02 0040 C4ED v0E MOS02 0080 C526 60 RTS MOS02 0040 C4ED v0E MOS02 0081 C527 MOS02 0040 C4ED v0E MOS02 0082 C527 20 67 C5 NOTCEB JSR CSWAP MOS02 0040 C4ED v0E MOS02 0083 C52A 20 60 CD JSR OCSRDL MOS02 0040 C4ED v0E MOS02 0084 C52D 20 FA CC JSR RUNNER MOS02 0040 C4ED v0E MOS02 0085 C530 20 64 C5 NOTC10 JSR REXE10 MOS02 0040 C4ED v0E MOS02 0086 C533 18 CLCEX CLC MOS02 0040 C4ED v0E MOS02 0087 C534 60 RTS MOS02 0040 C4ED v0E MOS02 0088 C535 MOS02 0040 C4ED v0E MOS02 0089 C535 AC 5E 03 DISABL LDY JVEC +&01 ;Was this an SOH ? MOS02 0040 C4ED v0E MOS02 0090 C538 C0 C5 CPYIM /(SOH ) MOS02 0040 C4ED v0E MOS02 0091 C53A D0 F7 BNE CLCEX ;No?, then go home MOS02 0040 C4ED v0E MOS02 0092 C53C MOS02 0040 C4ED v0E MOS02 0093 C53C AA SOH TAX ;Yes, then (A)=Byte to be printed MOS02 0040 C4ED v0E MOS02 0094 C53D A5 D0 LDA STATS ;Is printing enabled ? MOS02 0040 C4ED v0E MOS02 0095 C53F 4A LSRA MOS02 0040 C4ED v0E MOS02 0096 C540 90 D0 BCC ACK MOS02 0040 C4ED v0E MOS02 0097 C542 8A TXA MOS02 0040 C4ED v0E MOS02 0098 C543 [ MOS125 = &FF MOS02 0040 C4ED v0E MOS02 0099 C543 | MOS02 0040 C4ED v0E MOS02 0100 C543 18 CLC ;C=0, prevent second printing; PRINT preserves flags MOS02 0040 C4ED v0E MOS02 0101 C544 ] MOS02 0040 C4ED v0E MOS02 0102 C544 4C 7A E1 JMP PRINT ;print character and return, setting c=0 (done by MOS) MOS02 0040 C4ED v0E MOS02 0103 C547 MOS02 0040 C4ED v0E MOS02 0104 C547 [ MOS125 = &FF MOS02 0040 C4ED v0E MOS02 0127 C547 | MOS02 0040 C4ED v0E MOS02 0128 C547 REXEC ;starting +2 from NOTC20; 1 spare byte MOS02 0040 C4ED v0E MOS02 0129 C547 8D 5E 03 STA JVEC +&01 MOS02 0040 C4ED v0E MOS02 0130 C54A A5 D0 LDA STATS MOS02 0040 C4ED v0E MOS02 0131 C54C 6A RORA ;Is printer module on? MOS02 0040 C4ED v0E MOS02 0132 C54D 98 TYA ;AND Is it range $08 to $0D ? (no longer include bell) MOS02 0040 C4ED v0E MOS02 0133 C54E 6A RORA ;+4 = +6 MOS02 0040 C4ED v0E MOS02 0134 C54F C9 84 CMPIM &84 MOS02 0040 C4ED v0E MOS02 0135 C551 49 FF EORIM &FF MOS02 0040 C4ED v0E MOS02 0136 C553 6A RORA MOS02 0040 C4ED v0E MOS02 0137 C554 69 43 ADCIM &43 MOS02 0040 C4ED v0E MOS02 0138 C556 98 TYA ;-2 = +4 MOS02 0040 C4ED v0E MOS02 0139 C557 ; MOS02 0040 C4ED v0E MOS02 0140 C557 24 D0 BIT STATS ;Execute routine - are we disabled ? MOS02 0040 C4ED v0E MOS02 0141 C559 30 24 BMI ACKQ ;Was it an ACK? (can't be an SOH cos she queues) MOS02 0040 C4ED v0E MOS02 0142 C55B ; MOS02 0040 C4ED v0E MOS02 0143 C55B 08 PHP ;and push c MOS02 0040 C4ED v0E MOS02 0144 C55C 20 FA CC JSR RUNNER ;Do the routine MOS02 0040 C4ED v0E MOS02 0145 C55F 28 PLP MOS02 0040 C4ED v0E MOS02 0146 C560 CSWDEX ;enter with C=printer module on ;-5 = -1; 4 spare bytes MOS02 0040 C4ED v0E MOS02 0147 C560 24 D0 BIT STATS ;Following preserves c MOS02 0148 C562 ^2E MOS02 0148 C562 50 AE BVC ACK ;Not C.E. so exit MOS02 MOS02 MOS02 MOS02 Acorn macro assembler Page 11 MOS02 VDU File - MOS02 MOS02 MOS02 0141 C559 v5B MOS02 0149 C564 20 70 CD REXE10 JSR OCSRWR ;Write output cursor MOS02 0141 C559 v5B MOS02 0150 C567 ] MOS02 0141 C559 v5B MOS02 0151 C567 MOS02 0141 C559 v5B MOS02 0152 C567 ;CSWAP - swap input and output text cursors MOS02 0141 C559 v5B MOS02 0153 C567 ; invert b1 of STATS MOS02 0141 C559 v5B MOS02 0154 C567 MOS02 0141 C559 v5B MOS02 0155 C567 08 CSWAP PHP ;Preserve carry MOS02 0141 C559 v5B MOS02 0156 C568 48 PHA MOS02 0141 C559 v5B MOS02 0157 C569 A2 18 LDXIM CSX-V MOS02 0141 C559 v5B MOS02 0158 C56B A0 64 LDYIM PCSX-V MOS02 0141 C559 v5B MOS02 0159 C56D 20 CC CD JSR SWAP2 MOS02 0141 C559 v5B MOS02 0160 C570 20 09 CF JSR TADDRY ;Address this point MOS02 0141 C559 v5B MOS02 0161 C573 20 D8 C9 JSR CSDSP MOS02 0141 C559 v5B MOS02 0162 C576 A5 D0 LDA STATS MOS02 0141 C559 v5B MOS02 0163 C578 49 02 EORIM &02 ;Invert bit 1 of STATS MOS02 0141 C559 v5B MOS02 0164 C57A 85 D0 STA STATS MOS02 0141 C559 v5B MOS02 0165 C57C 68 PLA MOS02 0141 C559 v5B MOS02 0166 C57D 28 PLP ;Restore c MOS02 0141 C559 v5B MOS02 0167 C57E 60 RTS MOS02 0141 C559 v5B MOS02 0168 C57F MOS02 0141 C559 v5B MOS02 0169 C57F ACKQ MOS02 0141 C559 v5B MOS02 0170 C57F ; C=0 => character not printable, C=1 => printable MOS02 0141 C559 v5B MOS02 0171 C57F 49 06 EORIM ACKASC ;Was it an ACK ? -- MOS02 0172 C581 D0 08 BNE VDURTS ;[not ACK] MOS02 0172 C581 v77 MOS02 0173 C583 ; MOS02 0172 C581 v77 MOS02 0174 C583 ; C=0 cos ACK not printable MOS02 0172 C581 v77 MOS02 0175 C583 A9 7F LDAIM &7F ;Yes?, then clear b7 of STATS MOS02 0172 C581 v77 MOS02 0176 C585 90 20 BCC STTAND ;always jump MOS02 0176 C585 v5F MOS02 0177 C587 MOS02 0176 C585 v5F MOS02 0178 C587 MOS02 0176 C585 v5F MOS02 0179 C587 MOS02 0176 C585 v5F MOS02 0180 C587 ;Test to see if printable ($20-$7E or $80-$FF) MOS02 0176 C585 v5F MOS02 0181 C587 ;Returns c=1 iff printable, c=0 otherwise MOS02 0176 C585 v5F MOS02 0182 C587 MOS02 0176 C585 v5F MOS02 0183 C587 MOS02 0176 C585 v5F MOS02 0184 C587 ;ANOMQ Returns z=0 iff cursors joined MOS02 0176 C585 v5F MOS02 0185 C587 MOS02 0176 C585 v5F MOS02 0186 C587 A5 D0 ANOMQ LDA STATS MOS02 0176 C585 v5F MOS02 0187 C589 29 20 ANDIM &20 ;Is b5 set ? (Answer to z) MOS02 0176 C585 v5F MOS02 0188 C58B VDURTS MOS02 0176 C585 v5F MOS02 0189 C58B 60 RTS ;Returns(A)=0 if b5 clear MOS02 0176 C585 v5F MOS02 0190 C58C MOS02 0176 C585 v5F MOS02 0191 C58C ;INDIVIDUAL ROUTINES MOS02 0176 C585 v5F MOS02 0192 C58C MOS02 0176 C585 v5F MOS02 0193 C58C ;NUL ($00) - do nothing MOS02 0176 C585 v5F MOS02 0194 C58C MOS02 0176 C585 v5F MOS02 0195 C58C ;Jump table points to ACK, an RTS, to save a byte MOS02 0176 C585 v5F MOS02 0196 C58C MOS02 0176 C585 v5F MOS02 0197 C58C ;SOH ($01) - Next char to printer MOS02 0176 C585 v5F MOS02 0198 C58C MOS02 0176 C585 v5F MOS02 0199 C58C ;This is taken care of above MOS02 0176 C585 v5F MOS02 0200 C58C MOS02 0176 C585 v5F MOS02 0201 C58C MOS02 0176 C585 v5F MOS02 0202 C58C ;SO ($0E) - Page mode on MOS02 0176 C585 v5F MOS02 0203 C58C MOS02 0176 C585 v5F MOS02 0204 C58C A0 00 SO LDYIM &00 ;Initialise LINES MOS02 0176 C585 v5F MOS02 0205 C58E 8C 69 02 STY LINES MOS02 0176 C585 v5F MOS02 0206 C591 A9 04 LDAIM &04 ;Set b2 of STATS MOS02 0176 C585 v5F MOS02 0207 C593 D0 07 BNE STTOR MOS02 0176 C585 v5F MOS02 0208 C595 MOS02 0176 C585 v5F MOS02 0209 C595 ;SI ($0F) - Page mode OFF MOS02 0176 C585 v5F MOS02 0210 C595 ; This is frigged below MOS02 0176 C585 v5F MOS02 0211 C595 MOS02 0176 C585 v5F MOS02 0212 C595 ;STX ($02) - Start printer MOS02 0176 C585 v5F MOS02 0213 C595 MOS02 0176 C585 v5F MOS02 0214 C595 20 35 E2 STX JSR mUPT ;inform network (A assumed to contain $02) MOS02 0176 C585 v5F MOS02 0215 C598 A9 94 LDAIM &94 ;Set bit 0 of STATS. This maps to $01 MOS02 0176 C585 v5F MOS02 0216 C59A MOS02 0176 C585 v5F MOS02 0217 C59A ;NAK ($15) - Turn VDU off MOS02 0176 C585 v5F MOS02 0218 C59A MOS02 0176 C585 v5F MOS02 0219 C59A 49 95 NAK EORIM &95 ;Set b7 of STATS. Map $15 to $80 MOS02 0176 C585 v5F MOS02 0220 C59C MOS02 0176 C585 v5F MOS02 0221 C59C 05 D0 STTOR ORA STATS MOS02 0254 C5C2 ^58 MOS02 0222 C59E D0 09 BNE STTEXT ;(branch always taken unless ORed with 0) MOS02 0254 C5C2 ^58 MOS02 0223 C5A0 MOS02 0254 C5C2 ^58 MOS02 0224 C5A0 MOS02 0254 C5C2 ^58 MOS02 0225 C5A0 ;ETX ($03) - Stop printer MOS02 0254 C5C2 ^58 MOS02 0226 C5A0 MOS02 0254 C5C2 ^58 MOS02 0227 C5A0 20 35 E2 ETX JSR mUPT ;inform network (A assumed to contain $03) MOS02 0254 C5C2 ^58 MOS02 0228 C5A3 A9 0A LDAIM &0A ;clear bit 0 of STATS. Maps $0A on to $FE MOS02 0254 C5C2 ^58 MOS02 0229 C5A5 MOS02 0254 C5C2 ^58 MOS02 0230 C5A5 49 F4 SI EORIM &F4 ;Clears b2 of STATS. Maps $0F on to $FB MOS02 0254 C5C2 ^58 MOS02 0231 C5A7 MOS02 0254 C5C2 ^58 MOS02 0232 C5A7 25 D0 STTAND AND STATS MOS02 0254 C5C2 ^58 MOS02 0233 C5A9 85 D0 STTEXT STA STATS MOS02 0254 C5C2 ^58 MOS02 0234 C5AB 60 EOTEXT RTS MOS02 0254 C5C2 ^58 MOS02 0235 C5AC MOS02 0254 C5C2 ^58 MOS02 0236 C5AC MOS02 0254 C5C2 ^58 MOS02 0237 C5AC ;EOT ($04) - Separate cursors MOS02 0254 C5C2 ^58 MOS02 0238 C5AC MOS02 0254 C5C2 ^58 MOS02 0239 C5AC AD 61 03 EOT LDA NPIX ;Is this a graphics mode ? MOS02 0254 C5C2 ^58 MOS02 0240 C5AF F0 FA BEQ EOTEXT ;NO, then return MOS02 0254 C5C2 ^58 MOS02 0241 C5B1 20 27 C9 JSR ETCA ;Redisplay old cursor MOS02 0254 C5C2 ^58 MOS02 0242 C5B4 A9 DF LDAIM &DF ;Clear b5 of STATS MOS02 0254 C5C2 ^58 MOS02 0243 C5B6 D0 EF BNE STTAND ;(branch always taken) MOS02 0254 C5C2 ^58 MOS02 0244 C5B8 MOS02 0254 C5C2 ^58 MOS02 0245 C5B8 ;ENQ ($05) - Join cursors MOS02 0254 C5C2 ^58 MOS02 0246 C5B8 ;Store & hide current cursor MOS02 0254 C5C2 ^58 MOS02 0247 C5B8 ;Set bit 5 of STATS MOS02 0254 C5C2 ^58 MOS02 0248 C5B8 MOS02 0254 C5C2 ^58 MOS02 0249 C5B8 AD 61 03 ENQ LDA NPIX ;Is this a graphics mode ? MOS02 0254 C5C2 ^58 MOS02 0250 C5BB F0 EE BEQ EOTEXT ;NO, then return MOS02 0254 C5C2 ^58 MOS02 0251 C5BD ;Access R10 OF 6845. NB cannot do this through CRTCP. MOS02 0254 C5C2 ^58 MOS02 0252 C5BD A9 20 LDAIM &20 ;Hide cursor MOS02 0254 C5C2 ^58 MOS02 0253 C5BF 20 2A C9 JSR ETCB ; Preserves flags MOS02 0254 C5C2 ^58 MOS02 0254 C5C2 D0 D8 BNE STTOR ;Set bit 5 of STATS, (A) preserved by ETCB -- MOS02 0255 C5C4 -- MOS02 0256 C5C4 ;ACK ($06) - Turn VDU drivers on again -- MOS02 0257 C5C4 ;Clear bit 7 of STATS -- MOS02 0258 C5C4 -- MOS02 0259 C5C4 ;Taken care of above -- MOS02 0260 C5C4 -- MOS02 0261 C5C4 ;BELL ($07) - Ring BELL -- MOS02 0262 C5C4 -- MOS02 0263 C5C4 ;The routine BELL is externally declared in file UADE90 -- MOS02 0264 C5C4 -- MOS02 0265 C5C4 ;Cursor primitives -- MOS02 0266 C5C4 -- MOS02 0267 C5C4 ;BS ($08) - Cursor left 1 character position -- MOS02 0268 C5C4 -- MOS02 0269 C5C4 20 87 C5 BS JSR ANOMQ MOS02 MOS02 MOS02 MOS02 Acorn macro assembler Page 12 MOS02 VDU File - MOS02 MOS02 -- MOS02 0270 C5C7 D0 55 BNE CSAL MOS02 0270 C5C7 v2A MOS02 0271 C5C9 MOS02 0270 C5C7 v2A MOS02 0272 C5C9 ;Cursor left MOS02 0270 C5C7 v2A MOS02 0273 C5C9 MOS02 0270 C5C7 v2A MOS02 0274 C5C9 CE 18 03 CSL DEC CSX MOS02 0270 C5C7 v2A MOS02 0275 C5CC AE 18 03 LDX CSX ;Over LH margin ? MOS02 0270 C5C7 v2A MOS02 0276 C5CF EC 08 03 CPX TWLCOL MOS02 0270 C5C7 v2A MOS02 0277 C5D2 30 19 BMI CSLC ;Yes, then up (see below) a line MOS02 0270 C5C7 v2A MOS02 0278 C5D4 AD 4A 03 LDA CSPOSN ;Move cursor left MOS02 0270 C5C7 v2A MOS02 0279 C5D7 38 SEC MOS02 0270 C5C7 v2A MOS02 0280 C5D8 ED 4F 03 SBC BYTCH MOS02 0270 C5C7 v2A MOS02 0281 C5DB AA TAX MOS02 0270 C5C7 v2A MOS02 0282 C5DC AD 4B 03 LDA CSPOSN +&01 MOS02 0270 C5C7 v2A MOS02 0283 C5DF E9 00 SBCIM &00 MOS02 0270 C5C7 v2A MOS02 0284 C5E1 CD 4E 03 CMP BEGSCN ;Wraparound ? MOS02 0270 C5C7 v2A MOS02 0285 C5E4 B0 03 BCS CSLA MOS02 0270 C5C7 v2A MOS02 0286 C5E6 6D 54 03 ADC BYTSCN ;Yes, then add screen MOS02 0270 C5C7 v2A MOS02 0287 C5E9 A8 CSLA TAY MOS02 0270 C5C7 v2A MOS02 0288 C5EA 4C CC C9 JMP CSDSPA MOS02 0270 C5C7 v2A MOS02 0289 C5ED MOS02 0270 C5C7 v2A MOS02 0290 C5ED AD 0A 03 CSLC LDA TWRCOL ;Put csr = RH edge MOS02 0270 C5C7 v2A MOS02 0291 C5F0 8D 18 03 STA CSX ;& fall through to ... MOS02 0270 C5C7 v2A MOS02 0292 C5F3 MOS02 0270 C5C7 v2A MOS02 0293 C5F3 ;Cursor up MOS02 0270 C5C7 v2A MOS02 0294 C5F3 MOS02 0270 C5C7 v2A MOS02 0295 C5F3 CE 69 02 CSU DEC LINES ;One more line to print before page mode occurs MOS02 0353 C65D ^14 MOS02 0296 C5F6 10 03 BPL CSUC MOS02 0353 C65D ^14 MOS02 0297 C5F8 EE 69 02 INC LINES ;At top of page, so don't go -ve! MOS02 0353 C65D ^14 MOS02 0298 C5FB AE 19 03 CSUC LDX CSY ;Cursor on top row ? MOS02 0353 C65D ^14 MOS02 0299 C5FE EC 0B 03 CPX TWTROW MOS02 0353 C65D ^14 MOS02 0300 C601 F0 06 BEQ CSUA ;Yes, then scroll MOS02 0353 C65D ^14 MOS02 0301 C603 CE 19 03 DEC CSY MOS02 0353 C65D ^14 MOS02 0302 C606 4C AE C6 JMP CSDA MOS02 0353 C65D ^14 MOS02 0303 C609 MOS02 0353 C65D ^14 MOS02 0304 C609 18 CSUA CLC MOS02 0353 C65D ^14 MOS02 0305 C60A 20 35 CD JSR ENSCRL ;Account for scroll disable MOS02 0353 C65D ^14 MOS02 0306 C60D A9 08 LDAIM &08 ;Test hard/soft flag MOS02 0353 C65D ^14 MOS02 0307 C60F 24 D0 BIT STATS MOS02 0353 C65D ^14 MOS02 0308 C611 D0 05 BNE CSUB ;S3 set, soft scroll MOS02 0353 C65D ^14 MOS02 0309 C613 20 6A C9 JSR HSCRDN ;S3 clear, hard scroll MOS02 0353 C65D ^14 MOS02 0310 C616 D0 03 BNE CSUD ; HSCRDN returns zero false MOS02 0353 C65D ^14 MOS02 0311 C618 20 93 CD CSUB JSR SSCRDN MOS02 0353 C65D ^14 MOS02 0312 C61B 4C AB C6 CSUD JMP CSDC MOS02 0353 C65D ^14 MOS02 0313 C61E A2 00 CSAL LDXIM &00 MOS02 0353 C65D ^14 MOS02 0314 C620 ; And fall through to MOS02 0353 C65D ^14 MOS02 0315 C620 MOS02 0353 C65D ^14 MOS02 0316 C620 ;Move graphics cursor 1 character - primitives. MOS02 0353 C65D ^14 MOS02 0317 C620 ;(X) = 0 if X cursor to be moved MOS02 0353 C65D ^14 MOS02 0318 C620 ; 2 if Y cursor to be moved MOS02 0353 C65D ^14 MOS02 0319 C620 ;Iff (X)=0, then if off window, LF/VT occurs MOS02 0353 C65D ^14 MOS02 0320 C620 ;If cursor crosses margin, then goes to opposite margin. MOS02 0353 C65D ^14 MOS02 0321 C620 ;Go down 1 character location MOS02 0353 C65D ^14 MOS02 0322 C620 MOS02 0353 C65D ^14 MOS02 0323 C620 86 DB GCSCHD STX ZTEMP +&01 ;Store offset MOS02 0353 C65D ^14 MOS02 0324 C622 20 1F D1 JSR WINDCS ;Window current cursor (result to ZTEMP) MOS02 0353 C65D ^14 MOS02 0325 C625 A6 DB LDX ZTEMP +&01 ;Subtract 8 from cursor MOS02 0353 C65D ^14 MOS02 0326 C627 38 SEC MOS02 0353 C65D ^14 MOS02 0327 C628 BD 24 03 LDAAX GCSIR MOS02 0353 C65D ^14 MOS02 0328 C62B E9 08 SBCIM &08 MOS02 0353 C65D ^14 MOS02 0329 C62D 9D 24 03 STAAX GCSIR MOS02 0353 C65D ^14 MOS02 0330 C630 B0 03 BCS GCSHDA MOS02 0353 C65D ^14 MOS02 0331 C632 DE 25 03 DECAX GCSIR+&01 MOS02 0353 C65D ^14 MOS02 0332 C635 A5 DA GCSHDA LDA ZTEMP ;Get window MOS02 0353 C65D ^14 MOS02 0333 C637 D0 1E BNE GCSHDB ;Out of window to begin with?, then skip MOS02 0353 C65D ^14 MOS02 0334 C639 20 1F D1 JSR WINDCS ;Window current point MOS02 0353 C65D ^14 MOS02 0335 C63C F0 19 BEQ GCSHDB ;Still inside? , then return MOS02 0353 C65D ^14 MOS02 0336 C63E A6 DB LDX ZTEMP +&01 ;Gone outside?, then go to high margin MOS02 0353 C65D ^14 MOS02 0337 C640 BD 04 03 LDAAX GWRCOL MOS02 0353 C65D ^14 MOS02 0338 C643 E0 01 CPXIM &01 ;Plot by X?, then back up 1 character MOS02 0353 C65D ^14 MOS02 0339 C645 B0 02 BCS GCSHDC MOS02 0353 C65D ^14 MOS02 0340 C647 E9 06 SBCIM &06 ;c=0. so subt. 7 to get char. just on screen MOS02 0353 C65D ^14 MOS02 0341 C649 9D 24 03 GCSHDC STAAX GCSIR MOS02 0353 C65D ^14 MOS02 0342 C64C BD 05 03 LDAAX GWRCOL+&01 MOS02 0353 C65D ^14 MOS02 0343 C64F E9 00 SBCIM &00 MOS02 0353 C65D ^14 MOS02 0344 C651 9D 25 03 STAAX GCSIR+&01 MOS02 0353 C65D ^14 MOS02 0345 C654 8A TXA ;Plot by X?, then go up a line as well MOS02 0353 C65D ^14 MOS02 0346 C655 F0 08 BEQ CSAU MOS02 0353 C65D ^14 MOS02 0347 C657 4C 7D CA GCSHDB JMP IEG MOS02 0419 C6D1 ^04 MOS02 0348 C65A MOS02 0419 C6D1 ^04 MOS02 0349 C65A MOS02 0419 C6D1 ^04 MOS02 0350 C65A ;VT ($0B) - Cursor up 1 character line MOS02 0419 C6D1 ^04 MOS02 0351 C65A MOS02 0419 C6D1 ^04 MOS02 0352 C65A 20 87 C5 VT JSR ANOMQ MOS02 0419 C6D1 ^04 MOS02 0353 C65D F0 94 BEQ CSU MOS02 0419 C6D1 ^04 MOS02 0354 C65F A2 02 CSAU LDXIM &02 MOS02 0419 C6D1 ^04 MOS02 0355 C661 D0 52 BNE GCSCHU ;(branch always taken) MOS02 0419 C6D1 ^04 MOS02 0356 C663 MOS02 0419 C6D1 ^04 MOS02 0357 C663 ;HT ($09) - Cursor right 1 character position MOS02 0419 C6D1 ^04 MOS02 0358 C663 MOS02 0419 C6D1 ^04 MOS02 0359 C663 A5 D0 HT LDA STATS ;Encode ANOMQ because this routine often referenced MOS02 0419 C6D1 ^04 MOS02 0360 C665 29 20 ANDIM &20 MOS02 0419 C6D1 ^04 MOS02 0361 C667 D0 4A BNE CSAR MOS02 0419 C6D1 ^04 MOS02 0362 C669 MOS02 0419 C6D1 ^04 MOS02 0363 C669 ;Cursor right MOS02 0419 C6D1 ^04 MOS02 0364 C669 MOS02 0419 C6D1 ^04 MOS02 0365 C669 AE 18 03 CSR LDX CSX ;Cursor over RH col ? MOS02 0419 C6D1 ^04 MOS02 0366 C66C EC 0A 03 CPX TWRCOL MOS02 0419 C6D1 ^04 MOS02 0367 C66F B0 12 BCS CSRC MOS02 0419 C6D1 ^04 MOS02 0368 C671 EE 18 03 INC CSX MOS02 0419 C6D1 ^04 MOS02 0369 C674 AD 4A 03 LDA CSPOSN MOS02 0419 C6D1 ^04 MOS02 0370 C677 6D 4F 03 ADC BYTCH ;Add no. bytes per char MOS02 0419 C6D1 ^04 MOS02 0371 C67A AA TAX MOS02 0419 C6D1 ^04 MOS02 0372 C67B AD 4B 03 LDA CSPOSN +&01 ;to posn. of csr. MOS02 0419 C6D1 ^04 MOS02 0373 C67E 69 00 ADCIM &00 ;sets n for test in CSDSPA MOS02 0419 C6D1 ^04 MOS02 0374 C680 4C CC C9 JMP CSDSPA MOS02 0419 C6D1 ^04 MOS02 0375 C683 AD 08 03 CSRC LDA TWLCOL ;Put csr = LH edge MOS02 0419 C6D1 ^04 MOS02 0376 C686 8D 18 03 STA CSX ;& fall through to ... MOS02 0419 C6D1 ^04 MOS02 0377 C689 MOS02 0419 C6D1 ^04 MOS02 0378 C689 ;Cursor down MOS02 0419 C6D1 ^04 MOS02 0379 C689 MOS02 0419 C6D1 ^04 MOS02 0380 C689 18 CSD CLC ;do not set LEDs on first test for page wait (MOS requirement) MOS02 0419 C6D1 ^04 MOS02 0381 C68A 20 C0 CA JSR PAGE ;Account for page mode MOS02 0419 C6D1 ^04 MOS02 0382 C68D AE 19 03 LDX CSY ;Is cursor off bottom? MOS02 0419 C6D1 ^04 MOS02 0383 C690 EC 09 03 CPX TWBROW MOS02 0419 C6D1 ^04 MOS02 0384 C693 B0 05 BCS CSDD ;Yes, then scroll MOS02 0419 C6D1 ^04 MOS02 0385 C695 EE 19 03 INC CSY ;No, then move down line MOS02 0419 C6D1 ^04 MOS02 0386 C698 90 14 BCC CSDA ;(branch always taken) MOS02 0419 C6D1 ^04 MOS02 0387 C69A MOS02 0419 C6D1 ^04 MOS02 0388 C69A 20 35 CD CSDD JSR ENSCRL ;Account for scroll disable MOS02 0419 C6D1 ^04 MOS02 0389 C69D A9 08 LDAIM &08 ;Test hard/soft flag MOS02 0419 C6D1 ^04 MOS02 0390 C69F 24 D0 BIT STATS MOS02 MOS02 MOS02 MOS02 Acorn macro assembler Page 13 MOS02 VDU File - MOS02 MOS02 MOS02 0419 C6D1 ^04 MOS02 0391 C6A1 D0 05 BNE CSDB MOS02 0419 C6D1 ^04 MOS02 0392 C6A3 20 7A C9 JSR HSCRUP ;No windows set, so use hard scroll MOS02 0419 C6D1 ^04 MOS02 0393 C6A6 D0 03 BNE CSDC ; HSCRUP unsets zero MOS02 0419 C6D1 ^04 MOS02 0394 C6A8 20 00 CE CSDB JSR SSCRUP ;Windows set, so use soft scroll MOS02 0419 C6D1 ^04 MOS02 0395 C6AB 20 AC CE CSDC JSR CLTLIN ;Clear the line on which CSY lies MOS02 0419 C6D1 ^04 MOS02 0396 C6AE 20 09 CF CSDA JSR TADDRY ;address the cursor, point guaranteed in window MOS02 0419 C6D1 ^04 MOS02 0397 C6B1 90 7E BCC FSD ;and display it (TADDRY returns carry clear) MOS02 0397 C6B1 v01 MOS02 0398 C6B3 A2 00 CSAR LDXIM &00 MOS02 0397 C6B1 v01 MOS02 0399 C6B5 ; And fall through to MOS02 0397 C6B1 v01 MOS02 0400 C6B5 MOS02 0397 C6B1 v01 MOS02 0401 C6B5 ;Move graphics cursor 1 character - primitives. MOS02 0397 C6B1 v01 MOS02 0402 C6B5 ;(X) = 0 if Y cursor to be moved MOS02 0397 C6B1 v01 MOS02 0403 C6B5 ; 2 if X cursor to be moved MOS02 0397 C6B1 v01 MOS02 0404 C6B5 ;Iff (X)=0, then if off window, LF/VT occurs MOS02 0397 C6B1 v01 MOS02 0405 C6B5 ;If cursor crosses margin, then goes to opposite margin. MOS02 0397 C6B1 v01 MOS02 0406 C6B5 MOS02 0397 C6B1 v01 MOS02 0407 C6B5 86 DB GCSCHU STX ZTEMP +&01 ;Store offset MOS02 0397 C6B1 v01 MOS02 0408 C6B7 20 1F D1 JSR WINDCS ;Window current cursor (result to ZTEMP) MOS02 0397 C6B1 v01 MOS02 0409 C6BA A6 DB LDX ZTEMP +&01 ;Add 8 to cursor MOS02 0397 C6B1 v01 MOS02 0410 C6BC 18 CLC MOS02 0397 C6B1 v01 MOS02 0411 C6BD BD 24 03 LDAAX GCSIR MOS02 0397 C6B1 v01 MOS02 0412 C6C0 69 08 ADCIM &08 MOS02 0397 C6B1 v01 MOS02 0413 C6C2 9D 24 03 STAAX GCSIR MOS02 0397 C6B1 v01 MOS02 0414 C6C5 90 03 BCC GCSHUA MOS02 0397 C6B1 v01 MOS02 0415 C6C7 FE 25 03 INCAX GCSIR+&01 MOS02 0397 C6B1 v01 MOS02 0416 C6CA A5 DA GCSHUA LDA ZTEMP ;Get window MOS02 0397 C6B1 v01 MOS02 0417 C6CC D0 89 BNE GCSHDB ;Out of window to begin with?, then skip MOS02 0397 C6B1 v01 MOS02 0418 C6CE 20 1F D1 JSR WINDCS ;Window current point MOS02 0397 C6B1 v01 MOS02 0419 C6D1 F0 84 BEQ GCSHDB ;Still inside? , then return MOS02 0397 C6B1 v01 MOS02 0420 C6D3 A6 DB LDX ZTEMP +&01 ;Gone outside?, then go to low margin MOS02 0397 C6B1 v01 MOS02 0421 C6D5 BD 00 03 LDAAX GWLCOL MOS02 0397 C6B1 v01 MOS02 0422 C6D8 E0 01 CPXIM &01 ;Plot by Y?, then go up a line MOS02 0397 C6B1 v01 MOS02 0423 C6DA 90 02 BCC GCSHUC MOS02 0397 C6B1 v01 MOS02 0424 C6DC 69 06 ADCIM &06 ;c=1, so add 7 to get char. just on screen MOS02 0397 C6B1 v01 MOS02 0425 C6DE 9D 24 03 GCSHUC STAAX GCSIR MOS02 0397 C6B1 v01 MOS02 0426 C6E1 BD 01 03 LDAAX GWLCOL+&01 MOS02 0397 C6B1 v01 MOS02 0427 C6E4 69 00 ADCIM &00 MOS02 0397 C6B1 v01 MOS02 0428 C6E6 9D 25 03 STAAX GCSIR+&01 MOS02 0397 C6B1 v01 MOS02 0429 C6E9 8A TXA ;Plot by X? MOS02 0397 C6B1 v01 MOS02 0430 C6EA F0 08 BEQ CSAD ;Yes?, then go down a line as well MOS02 0397 C6B1 v01 MOS02 0431 C6EC 4C 7D CA JMP IEG ;No?, then exit MOS02 0397 C6B1 v01 MOS02 0432 C6EF MOS02 0397 C6B1 v01 MOS02 0433 C6EF MOS02 0397 C6B1 v01 MOS02 0434 C6EF ;LF ($0A) - Cursor down 1 character line MOS02 0397 C6B1 v01 MOS02 0435 C6EF MOS02 0397 C6B1 v01 MOS02 0436 C6EF 20 87 C5 LF JSR ANOMQ MOS02 0397 C6B1 v01 MOS02 0437 C6F2 F0 95 BEQ CSD MOS02 0397 C6B1 v01 MOS02 0438 C6F4 A2 02 CSAD LDXIM &02 MOS02 0397 C6B1 v01 MOS02 0439 C6F6 4C 20 C6 JMP GCSCHD MOS02 0397 C6B1 v01 MOS02 0440 C6F9 MOS02 0397 C6B1 v01 MOS02 0441 C6F9 ;FS ($1C) Define text area MOS02 0397 C6B1 v01 MOS02 0442 C6F9 MOS02 0397 C6B1 v01 MOS02 0443 C6F9 ;QEND-3 = L.H. margin = TWLCOL MOS02 0397 C6B1 v01 MOS02 0444 C6F9 ;QEND-2 = Bottom row = TWBROW MOS02 0397 C6B1 v01 MOS02 0445 C6F9 ;QEND-1 = R.H. margin = TWRCOL MOS02 0397 C6B1 v01 MOS02 0446 C6F9 ;QEND = Top row = TWTROW MOS02 0397 C6B1 v01 MOS02 0447 C6F9 MOS02 0397 C6B1 v01 MOS02 0448 C6F9 [ MOS125 = &FF MOS02 0397 C6B1 v01 MOS02 0464 C6F9 | MOS02 0397 C6B1 v01 MOS02 0465 C6F9 AE 55 03 FS LDX MODE MOS02 0397 C6B1 v01 MOS02 0466 C6FC AD 21 03 LDA QEND-&02 ;Do y co-ordinates. Get bottom (higher numbered) row MOS02 0397 C6B1 v01 MOS02 0467 C6FF CD 23 03 CMP QEND ;Top row above bottom ? MOS02 0397 C6B1 v01 MOS02 0468 C702 90 16 BCC FSF ;No?, then fail MOS02 0397 C6B1 v01 MOS02 0469 C704 DD E7 C3 CMPAX PROWS ;Is > max. no. rows? MOS02 0397 C6B1 v01 MOS02 0470 C707 F0 02 BEQ FSC MOS02 0397 C6B1 v01 MOS02 0471 C709 B0 09 BCS FSE ;Yes, then fail MOS02 0397 C6B1 v01 MOS02 0472 C70B AD 22 03 FSC LDA QEND-&01 ;Do x co-ordinates. Get RH margin MOS02 0397 C6B1 v01 MOS02 0473 C70E A8 TAY MOS02 0397 C6B1 v01 MOS02 0474 C70F DD EF C3 CMPAX PCOLS ;Is > than max. cols? MOS02 0397 C6B1 v01 MOS02 0475 C712 F0 02 BEQ FSB MOS02 0397 C6B1 v01 MOS02 0476 C714 FSE MOS02 0397 C6B1 v01 MOS02 0477 C714 B0 74 BCS PRACX ;Yes, then fail MOS02 0397 C6B1 v01 MOS02 0478 C716 38 FSB SEC MOS02 0397 C6B1 v01 MOS02 0479 C717 ED 20 03 SBC QEND-&03 ;How many cols. wide ? MOS02 0397 C6B1 v01 MOS02 0480 C71A FSF MOS02 0397 C6B1 v01 MOS02 0481 C71A 90 6E BCC PRACX ;Fail if -ve no. cols. MOS02 0397 C6B1 v01 MOS02 0482 C71C ] MOS02 0397 C6B1 v01 MOS02 0483 C71C A8 TAY MOS02 0397 C6B1 v01 MOS02 0484 C71D 20 5C CA JSR SETPWW ;Set PWWDTH MOS02 0397 C6B1 v01 MOS02 0485 C720 A9 08 LDAIM &08 ;Set bit 3 for soft scrolling MOS02 0397 C6B1 v01 MOS02 0486 C722 20 9C C5 JSR STTOR MOS02 0397 C6B1 v01 MOS02 0487 C725 A2 20 LDXIM QEND-&03-V ;copy Q to TWxxxx MOS02 0397 C6B1 v01 MOS02 0488 C727 A0 08 LDYIM TWLCOL-V MOS02 0397 C6B1 v01 MOS02 0489 C729 20 41 D4 JSR COPYF MOS02 0397 C6B1 v01 MOS02 0490 C72C 20 EB CE JSR TADDR ;Is cursor still inside MOS02 0397 C6B1 v01 MOS02 0491 C72F B0 33 BCS RS ;No, then home cursor MOS02 0397 C6B1 v01 MOS02 0492 C731 4C D8 C9 FSD JMP CSDSP MOS02 0603 C7AD ^02 MOS02 0493 C734 MOS02 0603 C7AD ^02 MOS02 0494 C734 RPXLXY MOS02 0603 C7AD ^02 MOS02 0495 C734 A0 03 LDYIM &03 ;~~~ Read pixel at (x,y) ~~~ MOS02 0603 C7AD ^02 MOS02 0496 C736 B1 F0 PRAAA LDAIY WARGS ;Copy (x,y) to RPXLWS ... MOS02 0603 C7AD ^02 MOS02 0497 C738 99 28 03 STAAY RPXLWS MOS02 0603 C7AD ^02 MOS02 0498 C73B 88 DEY MOS02 0603 C7AD ^02 MOS02 0499 C73C 10 F8 BPL PRAAA MOS02 0603 C7AD ^02 MOS02 0500 C73E A9 28 LDAIM RPXLWS-V ;Convert in internal co-ordinates MOS02 0603 C7AD ^02 MOS02 0501 C740 20 D1 D7 JSR RPXLD ;Read pixel if extant MOS02 0603 C7AD ^02 MOS02 0502 C743 A0 04 LDYIM &04 ;Store in (XY) +4 MOS02 0603 C7AD ^02 MOS02 0503 C745 D0 3B BNE PRACB ;(branch always taken) MOS02 0603 C7AD ^02 MOS02 0504 C747 MOS02 0603 C7AD ^02 MOS02 0505 C747 [ MOS125 = &FF MOS02 0603 C7AD ^02 MOS02 0516 C747 ] MOS02 0603 C7AD ^02 MOS02 0517 C747 MOS02 0603 C7AD ^02 MOS02 0518 C747 ;FF ($0C) Form feed MOS02 0603 C7AD ^02 MOS02 0519 C747 MOS02 0603 C7AD ^02 MOS02 0520 C747 20 87 C5 FF JSR ANOMQ ;Cursors joined ? MOS02 0603 C7AD ^02 MOS02 0521 C74A D0 78 BNE FFANOM ;Yes, then clear graphics area MOS02 0603 C7AD ^02 MOS02 0522 C74C A5 D0 LDA STATS ;Window set ? MOS02 0603 C7AD ^02 MOS02 0523 C74E 29 08 ANDIM &08 ;Test bit 3 of STATS MOS02 0603 C7AD ^02 MOS02 0524 C750 [ MOS125 = &FF MOS02 0603 C7AD ^02 MOS02 0527 C750 | MOS02 0603 C7AD ^02 MOS02 0528 C750 F0 64 BEQ FFC ;Clear?, then fast clear MOS02 0603 C7AD ^02 MOS02 0529 C752 ] MOS02 0603 C7AD ^02 MOS02 0530 C752 AE 0B 03 FFA LDX TWTROW ;Initialise cursor to top row MOS02 0603 C7AD ^02 MOS02 0531 C755 8E 19 03 FFB STX CSY ;Clear this line MOS02 0603 C7AD ^02 MOS02 0532 C758 20 AC CE JSR CLTLIN MOS02 0603 C7AD ^02 MOS02 0533 C75B AE 19 03 LDX CSY ;Move down a line MOS02 0603 C7AD ^02 MOS02 0534 C75E EC 09 03 CPX TWBROW ;On the bottom ? MOS02 0603 C7AD ^02 MOS02 0535 C761 E8 INX MOS02 0603 C7AD ^02 MOS02 0536 C762 90 F1 BCC FFB ;(INX preserves c) MOS02 0603 C7AD ^02 MOS02 0537 C764 MOS02 0603 C7AD ^02 MOS02 0538 C764 ;& fall through to MOS02 MOS02 MOS02 MOS02 Acorn macro assembler Page 14 MOS02 VDU File - MOS02 MOS02 MOS02 0603 C7AD ^02 MOS02 0539 C764 MOS02 0603 C7AD ^02 MOS02 0540 C764 MOS02 0603 C7AD ^02 MOS02 0541 C764 ;RS ($1E) Home character cursor MOS02 0603 C7AD ^02 MOS02 0542 C764 MOS02 0603 C7AD ^02 MOS02 0543 C764 20 87 C5 RS JSR ANOMQ MOS02 0603 C7AD ^02 MOS02 0544 C767 F0 22 BEQ RSA MOS02 0603 C7AD ^02 MOS02 0545 C769 [ MOS125 = &FF MOS02 0603 C7AD ^02 MOS02 0547 C769 | MOS02 0603 C7AD ^02 MOS02 0548 C769 ;RSAN Anomalous cursor home MOS02 0603 C7AD ^02 MOS02 0549 C769 MOS02 0603 C7AD ^02 MOS02 0550 C769 A2 06 RSAN LDXIM GWTROW-V ;Copy GWLCOL to GCSIR MOS02 0603 C7AD ^02 MOS02 0551 C76B A0 26 LDYIM GCSIY-V MOS02 0603 C7AD ^02 MOS02 0552 C76D 20 39 D4 JSR COPY2 ;Copy 4 bytes of RAM saves 2 bytes of ROM MOS02 0603 C7AD ^02 MOS02 0553 C770 MOS02 0603 C7AD ^02 MOS02 0554 C770 ;& fall through to ... MOS02 0603 C7AD ^02 MOS02 0555 C770 MOS02 0603 C7AD ^02 MOS02 0556 C770 MOS02 0603 C7AD ^02 MOS02 0557 C770 ;CRAN Anomalous carriage return MOS02 0603 C7AD ^02 MOS02 0558 C770 MOS02 0603 C7AD ^02 MOS02 0559 C770 A2 00 CRAN LDXIM GWLCOL-V ;Copy GWLCOL to GCSIX MOS02 0603 C7AD ^02 MOS02 0560 C772 A0 24 LDYIM GCSIX-V MOS02 0603 C7AD ^02 MOS02 0561 C774 20 39 D4 JSR COPY2 MOS02 0603 C7AD ^02 MOS02 0562 C777 4C 7D CA JMP IEG MOS02 0603 C7AD ^02 MOS02 0563 C77A MOS02 0603 C7AD ^02 MOS02 0564 C77A RPALET MOS02 0603 C7AD ^02 MOS02 0565 C77A 2D 60 03 AND NCOLOR ;Read parrot MOS02 0603 C7AD ^02 MOS02 0566 C77D AA TAX MOS02 0603 C7AD ^02 MOS02 0567 C77E BD 6F 03 LDAAX PARROT MOS02 0603 C7AD ^02 MOS02 0568 C781 C8 PRACA INY MOS02 0603 C7AD ^02 MOS02 0569 C782 91 F0 PRACB STAIY WARGS MOS02 0603 C7AD ^02 MOS02 0570 C784 A9 00 LDAIM &00 MOS02 0603 C7AD ^02 MOS02 0571 C786 C0 04 CPYIM &04 MOS02 0603 C7AD ^02 MOS02 0572 C788 D0 F7 BNE PRACA MOS02 0603 C7AD ^02 MOS02 0573 C78A 60 PRACX RTS MOS02 0603 C7AD ^02 MOS02 0574 C78B ] MOS02 0603 C7AD ^02 MOS02 0575 C78B MOS02 0603 C7AD ^02 MOS02 0576 C78B 8D 23 03 RSA STA QEND MOS02 0603 C7AD ^02 MOS02 0577 C78E 8D 22 03 STA QEND-&01 MOS02 0603 C7AD ^02 MOS02 0578 C791 MOS02 0603 C7AD ^02 MOS02 0579 C791 ;& fall through to .... MOS02 0603 C7AD ^02 MOS02 0580 C791 MOS02 0603 C7AD ^02 MOS02 0581 C791 ;US ($1F) Move text csr to x,y MOS02 0603 C7AD ^02 MOS02 0582 C791 MOS02 0603 C7AD ^02 MOS02 0583 C791 ;Put cursor to (x,y), where MOS02 0603 C7AD ^02 MOS02 0584 C791 ;x in QEND-1 & y in QEND MOS02 0603 C7AD ^02 MOS02 0585 C791 ;If illegal, leave cursor alone MOS02 0603 C7AD ^02 MOS02 0586 C791 MOS02 0603 C7AD ^02 MOS02 0587 C791 20 87 C5 US JSR ANOMQ ;Cursors joined ? MOS02 0603 C7AD ^02 MOS02 0588 C794 D0 F4 BNE PRACX ;Yes, then skip MOS02 0603 C7AD ^02 MOS02 0589 C796 20 AF C7 JSR USAF ;Remember current cursor MOS02 0603 C7AD ^02 MOS02 0590 C799 18 CLC MOS02 0603 C7AD ^02 MOS02 0591 C79A AD 22 03 LDA QEND-&01 ;Add offset to x posn MOS02 0603 C7AD ^02 MOS02 0592 C79D 6D 08 03 ADC TWLCOL MOS02 0603 C7AD ^02 MOS02 0593 C7A0 8D 18 03 STA CSX MOS02 0603 C7AD ^02 MOS02 0594 C7A3 AD 23 03 LDA QEND ;Add offset to y posn MOS02 0603 C7AD ^02 MOS02 0595 C7A6 18 CLC MOS02 0603 C7AD ^02 MOS02 0596 C7A7 6D 0B 03 ADC TWTROW MOS02 0603 C7AD ^02 MOS02 0597 C7AA [ MOS125 = &FF MOS02 0603 C7AD ^02 MOS02 0600 C7AA | MOS02 0603 C7AD ^02 MOS02 0601 C7AA 20 E8 CE JSR SYTADD ;Attempt to posn. csr MOS02 0603 C7AD ^02 MOS02 0602 C7AD ] MOS02 0603 C7AD ^02 MOS02 0603 C7AD 90 82 BCC FSD ;to a JMP CSDSP MOS02 0521 C74A v07 MOS02 0604 C7AF MOS02 0521 C74A v07 MOS02 0605 C7AF A2 18 USAF LDXIM CSX-V MOS02 0521 C74A v07 MOS02 0606 C7B1 A0 28 LDYIM USWS-V MOS02 0521 C74A v07 MOS02 0607 C7B3 4C CC CD JMP SWAP2 MOS02 0521 C74A v07 MOS02 0608 C7B6 MOS02 0521 C74A v07 MOS02 0609 C7B6 [ MOS125 = &FF MOS02 0521 C74A v07 MOS02 0610 C7B6 | MOS02 0521 C74A v07 MOS02 0611 C7B6 FFC MOS02 0521 C74A v07 MOS02 0612 C7B6 4C 9D CB JMP CLATXT ;Clear?, then fast clear MOS02 0521 C74A v07 MOS02 0613 C7B9 ] MOS02 0521 C74A v07 MOS02 0614 C7B9 MOS02 0521 C74A v07 MOS02 0615 C7B9 ;CR ($0D) Carriage return MOS02 0521 C74A v07 MOS02 0616 C7B9 MOS02 0521 C74A v07 MOS02 0617 C7B9 20 87 C5 CR JSR ANOMQ MOS02 0521 C74A v07 MOS02 0618 C7BC [ MOS125 = &FF MOS02 0521 C74A v07 MOS02 0621 C7BC | MOS02 0521 C74A v07 MOS02 0622 C7BC D0 B2 BNE CRAN MOS02 0521 C74A v07 MOS02 0623 C7BE ] MOS02 0521 C74A v07 MOS02 0624 C7BE 20 6E CE CRA JSR SSCRIM ;Position cursor to LH edge of window MOS02 0521 C74A v07 MOS02 0625 C7C1 4C AE C6 JMP CSDA ;Display cursor & TADDR MOS02 0521 C74A v07 MOS02 0626 C7C4 MOS02 0521 C74A v07 MOS02 0627 C7C4 LNK MOS03 MOS02 0521 C74A v07 MOS03 0001 C7C4 MOS02 0521 C74A v07 MOS03 0002 C7C4 TTL VDU File - MOS03 MOS02 0521 C74A v07 MOS03 0003 C7C4 OPT MOS03 MOS03 MOS03 MOS03 MOS03 Acorn macro assembler Page 15 MOS03 VDU File - MOS03 MOS03 MOS02 0521 C74A v07 MOS03 0004 C7C4 MOS02 0521 C74A v07 MOS03 0005 C7C4 ;Last revision 15/06/82 MOS02 0521 C74A v07 MOS03 0006 C7C4 MOS02 0521 C74A v07 MOS03 0007 C7C4 ;15/06/82 Route ALL unknown plot commands thru VDUVEC, even in text modes MOS02 0521 C74A v07 MOS03 0008 C7C4 ;02/06/82 ETB mod to redef of ASCII MOS02 0521 C74A v07 MOS03 0009 C7C4 ;27/05/82 DCC (programme palette) recoded MOS02 0521 C74A v07 MOS03 0010 C7C4 ;05/05/82 Delete anomalous TAB MOS02 0521 C74A v07 MOS03 0011 C7C4 ; Move NAK to MOS02 MOS02 0521 C74A v07 MOS03 0012 C7C4 ;01/05/82 Recoded to allow for forward queueing & change in variable order MOS02 0521 C74A v07 MOS03 0013 C7C4 ;24/04/82 ETB Function 1 (hide/display cursor) coded MOS02 0521 C74A v07 MOS03 0014 C7C4 ;19/04/82 DCC & DCCB moved for byte saving MOS02 0521 C74A v07 MOS03 0015 C7C4 ;15/04/82 NPCOL used to fix VDU 19,0,20,0,0,0 bug MOS02 0521 C74A v07 MOS03 0016 C7C4 ;24/03/82 DLE leaves graphics cursor alone MOS02 0521 C74A v07 MOS03 0017 C7C4 ; ETB to check if font exploded before reprogramming fonts 1-3 MOS02 0521 C74A v07 MOS03 0018 C7C4 ;21/03/82 DLE to account for non-zero origins MOS02 0521 C74A v07 MOS03 0019 C7C4 ;22/01/82 EIG to EIGABS in graphics window definition MOS02 0521 C74A v07 MOS03 0020 C7C4 ;07/01/82 Catch illegal VDU 23,n,.... commands MOS02 0521 C74A v07 MOS03 0021 C7C4 ;15/11/81 Vertical sync user adjustment (Paul) MOS02 0521 C74A v07 MOS03 0022 C7C4 MOS02 0521 C74A v07 MOS03 0023 C7C4 ;INDIVIDUAL ROUTINES MOS02 0521 C74A v07 MOS03 0024 C7C4 MOS02 0521 C74A v07 MOS03 0025 C7C4 MOS02 0521 C74A v07 MOS03 0026 C7C4 ;DLE ($10) Clear graphics area MOS02 0521 C74A v07 MOS03 0027 C7C4 MOS02 0521 C74A v07 MOS03 0028 C7C4 20 69 C7 FFANOM JSR RSAN -- MOS03 0029 C7C7 AD 61 03 DLE LDA NPIX ;Non-graphics ? -- MOS03 0030 C7CA F0 33 BEQ DLEX MOS03 0030 C7CA v4C MOS03 0031 C7CC AE 5A 03 LDX BGCOLF ;Clear to the background colour MOS03 0030 C7CA v4C MOS03 0032 C7CF AC 5C 03 LDY GPLBMD ;Use the background colour mode MOS03 0030 C7CA v4C MOS03 0033 C7D2 20 C5 D0 JSR SETZG ;Set this up MOS03 0030 C7CA v4C MOS03 0034 C7D5 A2 00 LDXIM GWLCOL-V ;Copy window params from GWTROW ... MOS03 0030 C7CA v4C MOS03 0035 C7D7 A0 28 LDYIM DLEWS-V ;Copy window parameters to DLEWS MOS03 0030 C7CA v4C MOS03 0036 C7D9 20 33 D4 JSR COPY8 MOS03 0030 C7CA v4C MOS03 0037 C7DC 38 SEC ;How many lines to do ? MOS03 0030 C7CA v4C MOS03 0038 C7DD AD 06 03 LDA GWTROW MOS03 0030 C7CA v4C MOS03 0039 C7E0 ED 02 03 SBC GWBROW MOS03 0030 C7CA v4C MOS03 0040 C7E3 A8 TAY MOS03 0030 C7CA v4C MOS03 0041 C7E4 C8 INY ;Increment this to distinguish between 0 & 255 MOS03 0030 C7CA v4C MOS03 0042 C7E5 8C 30 03 STY DLENLN ;Line counter MOS03 0030 C7CA v4C MOS03 0043 C7E8 A2 2C DLEA LDXIM DLEWS+&04-V ;Point to R.H. point, containing valid Y address MOS03 0030 C7CA v4C MOS03 0044 C7EA A0 28 LDYIM DLEWS-V ;Point to L.H. point, with irrelevant Y address MOS03 0030 C7CA v4C MOS03 0045 C7EC 20 43 D6 JSR HPLOTA ;Clear the current line MOS03 0030 C7CA v4C MOS03 0046 C7EF AD 2E 03 LDA DLEWS+&06 ;Decrement the current line number MOS03 0030 C7CA v4C MOS03 0047 C7F2 D0 03 BNE DLEB MOS03 0030 C7CA v4C MOS03 0048 C7F4 CE 2F 03 DEC DLEWS+&07 MOS03 0030 C7CA v4C MOS03 0049 C7F7 CE 2E 03 DLEB DEC DLEWS+&06 MOS03 0030 C7CA v4C MOS03 0050 C7FA CE 30 03 DEC DLENLN MOS03 0030 C7CA v4C MOS03 0051 C7FD D0 E9 BNE DLEA MOS03 0030 C7CA v4C MOS03 0052 C7FF 60 DLEX RTS -- MOS03 0053 C800 -- MOS03 0054 C800 ;DC1 ($11) Programme foreground -- MOS03 0055 C800 ;or background colours for text -- MOS03 0056 C800 -- MOS03 0057 C800 A0 00 DCA LDYIM &00 ;Used for storing -- MOS03 0058 C802 F0 02 BEQ DCABA ;(branch always taken) MOS03 0058 C802 v7D MOS03 0059 C804 MOS03 0058 C802 v7D MOS03 0060 C804 ;DC2 ($12) Programme foreground MOS03 0058 C802 v7D MOS03 0061 C804 ;or background colours for graphics MOS03 0058 C802 v7D MOS03 0062 C804 ;QEND-1=mode MOS03 0058 C802 v7D MOS03 0063 C804 ;QEND =logical colour MOS03 0058 C802 v7D MOS03 0064 C804 MOS03 0058 C802 v7D MOS03 0065 C804 A0 02 DCB LDYIM &02 MOS03 0058 C802 v7D MOS03 0066 C806 AD 23 03 DCABA LDA QEND ;Get logical colour -- MOS03 0067 C809 10 01 BPL DCABB ;Foreground ? MOS03 0067 C809 v7E MOS03 0068 C80B C8 INY ;No, then point to background locations MOS03 0067 C809 v7E MOS03 0069 C80C 2D 60 03 DCABB AND NCOLOR -- MOS03 0070 C80F 85 DA STA ZTEMP -- MOS03 0071 C811 AD 60 03 LDA NCOLOR ;Sneaky offset method -- MOS03 0072 C814 F0 1B BEQ DCABX ;Branch for TTX MOS03 0072 C814 v64 MOS03 0073 C816 29 07 ANDIM &07 ;to FCOLTB. A=table base MOS03 0072 C814 v64 MOS03 0074 C818 18 CLC MOS03 0072 C814 v64 MOS03 0075 C819 65 DA ADC ZTEMP ;(A) = offset +1 MOS03 0072 C814 v64 MOS03 0076 C81B AA TAX MOS03 0072 C814 v64 MOS03 0077 C81C BD 23 C4 LDAAX FCOLTB -&01 MOS03 0072 C814 v64 MOS03 0078 C81F 99 57 03 STAAY FTCOLF ;(Y) set above to 0..3 MOS03 0072 C814 v64 MOS03 0079 C822 [ MOS125 = &FF MOS03 0072 C814 v64 MOS03 0084 C822 | MOS03 0072 C814 v64 MOS03 0085 C822 98 TYA MOS03 0072 C814 v64 MOS03 0086 C823 4A LSRA ;Graphics? MOS03 0072 C814 v64 MOS03 0087 C824 D0 0C BNE DCBAC ;Yes, then set up GPLMDE MOS03 0072 C814 v64 MOS03 0088 C826 18 CLC ;A=0, C=0; SBC takes one's complement MOS03 0072 C814 v64 MOS03 0089 C827 ED 57 03 SBC FTCOLF ;No, then set ZORA and ZEOR MOS03 0072 C814 v64 MOS03 0090 C82A ] MOS03 0072 C814 v64 MOS03 0091 C82A 85 D3 STA ZEOR ;ZEOR = NOT foreground MOS03 0072 C814 v64 MOS03 0092 C82C 4D 58 03 EOR BTCOLF ;ZORA = ZEOR EOR back MOS03 0072 C814 v64 MOS03 0093 C82F 85 D2 STA ZORA MOS03 0072 C814 v64 MOS03 0094 C831 60 DCABX RTS MOS03 0087 C824 v73 MOS03 0095 C832 AD 22 03 DCBAC LDA QEND-&01 -- MOS03 0096 C835 99 59 03 STAAY GPLFMD -&02 ;Y=2 or 3 (for fore or background) mode -- MOS03 0097 C838 60 RTS -- MOS03 0098 C839 -- MOS03 0099 C839 A9 20 DCTTX LDAIM TTXBCL ;TTX load with a particular byte ($20) MOS03 0122 C84D ^6A MOS03 0100 C83B 8D 58 03 STA BTCOLF ;Used only for screen clears MOS03 0122 C84D ^6A MOS03 0101 C83E 60 RTS MOS03 0122 C84D ^6A MOS03 0102 C83F MOS03 0122 C84D ^6A MOS03 0103 C83F ;DC3 ($13) is below this routine MOS03 0122 C84D ^6A MOS03 0104 C83F MOS03 0122 C84D ^6A MOS03 0105 C83F MOS03 0122 C84D ^6A MOS03 0106 C83F ;DC4 ($14) Set default physical MOS03 0122 C84D ^6A MOS03 0107 C83F ;- logical relations MOS03 0122 C84D ^6A MOS03 0108 C83F ;Default back & foreground clrs MOS03 0122 C84D ^6A MOS03 0109 C83F MOS03 0122 C84D ^6A MOS03 0110 C83F A2 05 DCD LDXIM &05 ;Programme all full colours & modes to zero MOS03 0122 C84D ^6A MOS03 0111 C841 A9 00 LDAIM &00 MOS03 0122 C84D ^6A MOS03 0112 C843 9D 57 03 DCDA STAAX FTCOLF MOS03 0122 C84D ^6A MOS03 0113 C846 CA DEX MOS03 0122 C84D ^6A MOS03 0114 C847 10 FA BPL DCDA MOS03 0122 C84D ^6A MOS03 0115 C849 [ MOS125 = &FF MOS03 0122 C84D ^6A MOS03 0119 C849 | MOS03 0122 C84D ^6A MOS03 0120 C849 8A TXA ;A = &FF MOS03 0122 C84D ^6A MOS03 0121 C84A AE 60 03 LDX NCOLOR ;Set foreground colours & ZORA & ZEOR MOS03 0122 C84D ^6A MOS03 0122 C84D F0 EA BEQ DCTTX ;Branch for TTX -- MOS03 0123 C84F ] -- MOS03 0124 C84F E0 0F CPXIM &0F -- MOS03 0125 C851 D0 02 BNE DCDB MOS03 0125 C851 v7D MOS03 0126 C853 A9 3F LDAIM INVSXT ;Don't invert flashing bit MOS03 0125 C851 v7D MOS03 0127 C855 8D 57 03 DCDB STA FTCOLF -- MOS03 0128 C858 8D 59 03 STA FGCOLF -- MOS03 0129 C85B 49 FF EORIM &FF -- MOS03 0130 C85D 85 D2 STA ZORA -- MOS03 0131 C85F 85 D3 STA ZEOR MOS03 MOS03 MOS03 MOS03 Acorn macro assembler Page 16 MOS03 VDU File - MOS03 MOS03 -- MOS03 0132 C861 8E 1F 03 STX QEND-&04 ;set logical colour := NCOLOR -- MOS03 0133 C864 [ MOS125 = &FF -- MOS03 0166 C864 | -- MOS03 0167 C864 A9 07 LDAIM &07 -- MOS03 0168 C866 E0 03 CPXIM &03 ;How many colours? -- MOS03 0169 C868 90 0A BCC DCDLF MOS03 0169 C868 v75 MOS03 0170 C86A D0 0E BNE DCDLI MOS03 0170 C86A v71 MOS03 0171 C86C MOS03 0170 C86A v71 MOS03 0172 C86C ;4 colour, use shift right of $07 MOS03 0170 C86A v71 MOS03 0173 C86C MOS03 0170 C86A v71 MOS03 0174 C86C 20 7F C8 JSR DCDLJ ;Programme log.=3, phys.=7 MOS03 0170 C86A v71 MOS03 0175 C86F CE 1F 03 DEC QEND-&04 ;Programme log.=2, phys.=3 MOS03 0170 C86A v71 MOS03 0176 C872 A9 03 LDAIM &03 ;then 1=1, 0=0 MOS03 0170 C86A v71 MOS03 0177 C874 MOS03 0170 C86A v71 MOS03 0178 C874 ;2 colour (TTX also executes this rouine) MOS03 0170 C86A v71 MOS03 0179 C874 MOS03 0170 C86A v71 MOS03 0180 C874 20 7F C8 DCDLF JSR DCDLJ ;Programme log.=1, phys.=7 MOS03 0170 C86A v71 MOS03 0181 C877 CE 1F 03 DEC QEND-&04 MOS03 0170 C86A v71 MOS03 0182 C87A MOS03 0170 C86A v71 MOS03 0183 C87A ;16 colours - one to one MOS03 0170 C86A v71 MOS03 0184 C87A MOS03 0170 C86A v71 MOS03 0185 C87A DCDLI MOS03 0170 C86A v71 MOS03 0186 C87A MOS03 0170 C86A v71 MOS03 0187 C87A AD 1F 03 LDA QEND-&04 MOS03 0188 C87D ^75 MOS03 0188 C87D D0 F5 BNE DCDLF -- MOS03 0189 C87F 8D 20 03 DCDLJ STA QEND-&03 ;& fall through to .... -- MOS03 0190 C882 ] -- MOS03 0191 C882 -- MOS03 0192 C882 ;DC3 ($13) - Programme logical/ -- MOS03 0193 C882 ;physical colour relation -- MOS03 0194 C882 -- MOS03 0195 C882 ;Logical colour in QEND-4 -- MOS03 0196 C882 ;Physical colour in QEND-3 -- MOS03 0197 C882 -- MOS03 0198 C882 08 DCC PHP -- MOS03 0199 C883 78 SEI -- MOS03 0200 C884 AD 1F 03 LDA QEND-&04 ;Determine logical colour -- MOS03 0201 C887 2D 60 03 AND NCOLOR -- MOS03 0202 C88A AA TAX -- MOS03 0203 C88B AD 20 03 LDA QEND-&03 ;Get physical colour -- MOS03 0204 C88E 29 0F DCC1 ANDIM NPCOL ;mask off confusing bits MOS03 0293 C8CE ^3E MOS03 0205 C890 9D 6F 03 STAAX PARROT ;Write to list MOS03 0293 C8CE ^3E MOS03 0206 C893 [ MOS125 = &FF MOS03 0293 C8CE ^3E MOS03 0223 C893 | MOS03 0293 C8CE ^3E MOS03 0224 C893 86 FA STX SEIWKA MOS03 0293 C8CE ^3E MOS03 0225 C895 AD 60 03 LDA NCOLOR MOS03 0293 C8CE ^3E MOS03 0226 C898 C9 03 CMPIM &03 MOS03 0293 C8CE ^3E MOS03 0227 C89A 08 PHP ;Needed later MOS03 0293 C8CE ^3E MOS03 0228 C89B 4A LSRA MOS03 0293 C8CE ^3E MOS03 0229 C89C 46 FA DCCALA LSR SEIWKA ;determine start position =Logi*16/(ncolor+1)*16 MOS03 0293 C8CE ^3E MOS03 0230 C89E 6A RORA MOS03 0293 C8CE ^3E MOS03 0231 C89F B0 FB BCS DCCALA MOS03 0293 C8CE ^3E MOS03 0232 C8A1 1D 6F 03 ORAAX PARROT ;Get physical colour MOS03 0293 C8CE ^3E MOS03 0233 C8A4 A0 F0 LDYIM &F0 ;Initialise loop counter MOS03 0293 C8CE ^3E MOS03 0234 C8A6 MOS03 0293 C8CE ^3E MOS03 0235 C8A6 AA DCCALB TAX ;Byte to be given to VPROC1 MOS03 0293 C8CE ^3E MOS03 0236 C8A7 28 PLP ;Does NCOLOR=3? MOS03 0293 C8CE ^3E MOS03 0237 C8A8 ] MOS03 0293 C8CE ^3E MOS03 0238 C8A8 08 PHP MOS03 0293 C8CE ^3E MOS03 0239 C8A9 D0 09 BNE DCCALC ;No?, then skip MOS03 0293 C8CE ^3E MOS03 0240 C8AB [ MOS125 = &FF MOS03 0293 C8CE ^3E MOS03 0249 C8AB | MOS03 0293 C8CE ^3E MOS03 0250 C8AB 0A ASLA ;b6,b5 to b7,b6; clear b0 MOS03 0293 C8CE ^3E MOS03 0251 C8AC 69 40 ADCIM &40 ;carry doesn't matter (thanks Woz) MOS03 0293 C8CE ^3E MOS03 0252 C8AE 0A ASLA ;b6 EOR b5 to C MOS03 0293 C8CE ^3E MOS03 0253 C8AF 8A TXA ;restore byte MOS03 0293 C8CE ^3E MOS03 0254 C8B0 90 02 BCC DCCALC ;If b5 & b6 both set or clear, don't invert them MOS03 0293 C8CE ^3E MOS03 0255 C8B2 49 60 EORIM &60 MOS03 0293 C8CE ^3E MOS03 0256 C8B4 ] MOS03 0293 C8CE ^3E MOS03 0257 C8B4 20 34 EA DCCALC JSR MVPRC1 ;Save (X) & (Y) MOS03 0293 C8CE ^3E MOS03 0258 C8B7 98 TYA ;Loop counter MOS03 0293 C8CE ^3E MOS03 0259 C8B8 [ MOS125 = &FF MOS03 0293 C8CE ^3E MOS03 0268 C8B8 | MOS03 0293 C8CE ^3E MOS03 0269 C8B8 18 CLC MOS03 0293 C8CE ^3E MOS03 0270 C8B9 6D 60 03 ADC NCOLOR MOS03 0293 C8CE ^3E MOS03 0271 C8BC A8 TAY MOS03 0293 C8CE ^3E MOS03 0272 C8BD 8A TXA ;Restore (A) MOS03 0293 C8CE ^3E MOS03 0273 C8BE 69 10 ADCIM &10 ;c=0 MOS03 0293 C8CE ^3E MOS03 0274 C8C0 C8 INY MOS03 0293 C8CE ^3E MOS03 0275 C8C1 30 E3 BMI DCCALB MOS03 0293 C8CE ^3E MOS03 0276 C8C3 ] MOS03 0293 C8CE ^3E MOS03 0277 C8C3 28 PLP MOS03 0293 C8CE ^3E MOS03 0278 C8C4 28 PLP MOS03 0293 C8CE ^3E MOS03 0279 C8C5 60 RTS MOS03 0293 C8CE ^3E MOS03 0280 C8C6 MOS03 0293 C8CE ^3E MOS03 0281 C8C6 MOS03 0293 C8CE ^3E MOS03 0282 C8C6 ;OSWORD call to programme palette MOS03 0293 C8CE ^3E MOS03 0283 C8C6 MOS03 0293 C8CE ^3E MOS03 0284 C8C6 PRPAL MOS03 0293 C8CE ^3E MOS03 0285 C8C6 08 PHP MOS03 0293 C8CE ^3E MOS03 0286 C8C7 2D 60 03 AND NCOLOR ;Get logical colour MOS03 0293 C8CE ^3E MOS03 0287 C8CA AA TAX MOS03 0293 C8CE ^3E MOS03 0288 C8CB C8 INY ;(Y):=1 MOS03 0293 C8CE ^3E MOS03 0289 C8CC B1 F0 LDAIY WARGS ;Load physical colour MOS03 0293 C8CE ^3E MOS03 0290 C8CE [ MOS125 = &FF MOS03 0293 C8CE ^3E MOS03 0292 C8CE | MOS03 0293 C8CE ^3E MOS03 0293 C8CE 90 BE BCC DCC1 ;C=0 from WORD->BYTE2 -- MOS03 0294 C8D0 ] -- MOS03 0295 C8D0 -- MOS03 0296 C8D0 ;SYN ($16) Change mode -- MOS03 0297 C8D0 -- MOS03 0298 C8D0 AD 23 03 SYN LDA QEND ;Get the mode -- MOS03 0299 C8D3 4C 10 CB JMP CHMODE -- MOS03 0300 C8D6 -- MOS03 0301 C8D6 ;ETB ($17) Programme soft font -- MOS03 0302 C8D6 ;Programme character font to user definition -- MOS03 0303 C8D6 ;Character to be programmed in Q+08, top row in Q+07 -- MOS03 0304 C8D6 ;through to bottom row in Q+00 -- MOS03 0305 C8D6 -- MOS03 0306 C8D6 AD 1B 03 ETB LDA QEND-&08 ;Is it the soft font ? -- MOS03 0307 C8D9 C9 20 CMPIM &20 ;Is it a printable character ? -- MOS03 0308 C8DB 90 38 BCC ETBD MOS03 0308 C8DB v47 MOS03 0309 C8DD [ MOS125 = &FF MOS03 0308 C8DB v47 MOS03 0347 C8DD | MOS03 0308 C8DB v47 MOS03 0348 C8DD 20 50 D0 JSR CHADDR MOS03 0308 C8DB v47 MOS03 0349 C8E0 ;returns X=font no., Y=(ZTEMPC+&01)=hard/soft page no. MOS03 0308 C8DB v47 MOS03 0350 C8E0 ;A=font flag mask, (ZTEMPC)=hard/soft character address MOS03 0308 C8DB v47 MOS03 0351 C8E0 2C 67 03 BIT FNTFLG ;flag set ? MOS03 0308 C8DB v47 MOS03 0352 C8E3 D0 1E BNE ETBB ;Yes?, then just copy defn. MOS03 0308 C8DB v47 MOS03 0353 C8E5 0D 67 03 ORA FNTFLG MOS03 0308 C8DB v47 MOS03 0354 C8E8 8D 67 03 STA FNTFLG MOS03 MOS03 MOS03 MOS03 Acorn macro assembler Page 17 MOS03 VDU File - MOS03 MOS03 MOS03 0308 C8DB v47 MOS03 0355 C8EB 84 DD STY ZTEMPB +&01 ;point to hard font MOS03 0308 C8DB v47 MOS03 0356 C8ED BC 67 03 LDYAX PGSFNT -&01 ;point to soft font MOS03 0308 C8DB v47 MOS03 0357 C8F0 84 DF STY ZTEMPC +&01 MOS03 0308 C8DB v47 MOS03 0358 C8F2 A6 DE LDX ZTEMPC +&00 ;save character offset MOS03 0308 C8DB v47 MOS03 0359 C8F4 A0 00 LDYIM &00 MOS03 0308 C8DB v47 MOS03 0360 C8F6 84 DC STY ZTEMPB +&00 ;align both pointers MOS03 0308 C8DB v47 MOS03 0361 C8F8 84 DE STY ZTEMPC +&00 MOS03 0308 C8DB v47 MOS03 0362 C8FA B1 DC ETBC LDAIY ZTEMPB ;copy from hard font MOS03 0308 C8DB v47 MOS03 0363 C8FC 91 DE STAIY ZTEMPC ;to soft font MOS03 0308 C8DB v47 MOS03 0364 C8FE 88 DEY MOS03 0308 C8DB v47 MOS03 0365 C8FF D0 F9 BNE ETBC MOS03 0308 C8DB v47 MOS03 0366 C901 86 DE STX ZTEMPC +&00 ;restore character offset MOS03 0308 C8DB v47 MOS03 0367 C903 ETBB MOS03 0308 C8DB v47 MOS03 0368 C903 A0 07 LDYIM &07 ;& copy character into the font MOS03 0308 C8DB v47 MOS03 0369 C905 B9 1C 03 ETBA LDAAY QEND-&07 MOS03 0308 C8DB v47 MOS03 0370 C908 91 DE STAIY ZTEMPC MOS03 0308 C8DB v47 MOS03 0371 C90A 88 DEY MOS03 0308 C8DB v47 MOS03 0372 C90B 10 F8 BPL ETBA MOS03 0308 C8DB v47 MOS03 0373 C90D ] MOS03 0308 C8DB v47 MOS03 0374 C90D 60 ETCX RTS MOS03 0308 C8DB v47 MOS03 0375 C90E MOS03 0308 C8DB v47 MOS03 0376 C90E JMIV25 MOS03 0308 C8DB v47 MOS03 0377 C90E AD 1F 03 LDA PLMODE MOS03 0434 C965 ^27 MOS03 0378 C911 18 CLC MOS03 0434 C965 ^27 MOS03 0379 C912 ; C=0 MOS03 0434 C965 ^27 MOS03 0380 C912 JMIV23 ;C=1 MOS03 0434 C965 ^27 MOS03 0381 C912 6C 26 02 JMI VDUVEC MOS03 0434 C965 ^27 MOS03 0382 C915 ; MOS03 0434 C965 ^27 MOS03 0383 C915 C9 01 ETBD CMPIM &01 ;Valid command ? MOS03 0434 C965 ^27 MOS03 0384 C917 90 15 BCC ETD MOS03 0434 C965 ^27 MOS03 0385 C919 ; C=1 MOS03 0434 C965 ^27 MOS03 0386 C919 D0 F7 BNE JMIV23 ;No?, then jump indirect to user vector with C=1 MOS03 0434 C965 ^27 MOS03 0387 C91B ; MOS03 0434 C965 ^27 MOS03 0388 C91B 20 87 C5 JSR ANOMQ ;Anom. printing? ~~~ FUNCTION 1 Turn cursor on/off ~~~ MOS03 0434 C965 ^27 MOS03 0389 C91E D0 ED BNE ETCX ;Yes?, then don't do it MOS03 0434 C965 ^27 MOS03 0390 C920 A9 20 LDAIM &20 MOS03 0434 C965 ^27 MOS03 0391 C922 AC 1C 03 LDY QEND-&07 ;Hide(0) or display(1)? MOS03 0434 C965 ^27 MOS03 0392 C925 F0 03 BEQ ETCB MOS03 0434 C965 ^27 MOS03 0393 C927 AD 5F 03 ETCA LDA CSTEMP ;RESTORE CURSOR MOS03 0434 C965 ^27 MOS03 0394 C92A A0 0A ETCB LDYIM &0A MOS03 0434 C965 ^27 MOS03 0395 C92C D0 2D BNE CRTCPA ;Programme the 6845 without saving to CSTEMP MOS03 0434 C965 ^27 MOS03 0396 C92E MOS03 0434 C965 ^27 MOS03 0397 C92E AD 1D 03 ETD LDA QEND-&06 ;~~~ FUNCTION 0 Programme 6845 register #(Q+7) WITH (Q+6) ~~~ MOS03 0434 C965 ^27 MOS03 0398 C931 AC 1C 03 LDY QEND-&07 MOS03 0434 C965 ^27 MOS03 0399 C934 MOS03 0434 C965 ^27 MOS03 0400 C934 C0 07 CRTCP CPYIM &07 MOS03 0434 C965 ^27 MOS03 0401 C936 90 23 BCC CRTCPA ;[register<7, so not register 7 or 10] MOS03 0434 C965 ^27 MOS03 0402 C938 D0 03 BNE CRTCPC ;[not vertical sync position] MOS03 0434 C965 ^27 MOS03 0403 C93A MOS03 0434 C965 ^27 MOS03 0404 C93A 6D 90 02 ADC VERTIC ;apply user adjustment (c=1) MOS03 0434 C965 ^27 MOS03 0405 C93D MOS03 0434 C965 ^27 MOS03 0406 C93D C0 08 CRTCPC CPYIM &08 MOS03 0434 C965 ^27 MOS03 0407 C93F D0 07 BNE CRTCPD ;[not interlace mode register] MOS03 0434 C965 ^27 MOS03 0408 C941 09 00 ORAIM &00 ; interlace mode register MOS03 0434 C965 ^27 MOS03 0409 C943 30 03 BMI CRTCPD ;[do not alter interlace (probably teletext)] MOS03 0434 C965 ^27 MOS03 0410 C945 ; MOS03 0434 C965 ^27 MOS03 0411 C945 4D 91 02 EOR INTERL ;modify interlace MOS03 0434 C965 ^27 MOS03 0412 C948 C0 0A CRTCPD CPYIM &0A ;Cursor start register ? MOS03 0434 C965 ^27 MOS03 0413 C94A D0 0F BNE CRTCPA ;[not cursor start register] MOS03 0434 C965 ^27 MOS03 0414 C94C 8D 5F 03 STA CSTEMP ;Yes?, then record this for separate cursors MOS03 0434 C965 ^27 MOS03 0415 C94F A8 TAY MOS03 0434 C965 ^27 MOS03 0416 C950 A5 D0 LDA STATS ;Are cursors joined ? MOS03 0434 C965 ^27 MOS03 0417 C952 29 20 ANDIM &20 MOS03 0434 C965 ^27 MOS03 0418 C954 08 PHP ;(very nasty coding, but it is short) MOS03 0434 C965 ^27 MOS03 0419 C955 98 TYA MOS03 0434 C965 ^27 MOS03 0420 C956 A0 0A LDYIM &0A MOS03 0434 C965 ^27 MOS03 0421 C958 28 PLP MOS03 0434 C965 ^27 MOS03 0422 C959 D0 06 BNE CRTCPB ;Yes, then don't write to 6845 MOS03 0434 C965 ^27 MOS03 0423 C95B 8C 00 FE CRTCPA STY CRTCA ;Address said register MOS03 0434 C965 ^27 MOS03 0424 C95E 8D 01 FE STA CRTCD ;and store data therein MOS03 0434 C965 ^27 MOS03 0425 C961 60 CRTCPB RTS ;(Referenced from EM) MOS03 0434 C965 ^27 MOS03 0426 C962 MOS03 0434 C965 ^27 MOS03 0427 C962 ;ESC ($1B) does bugger all MOS03 0434 C965 ^27 MOS03 0428 C962 MOS03 0434 C965 ^27 MOS03 0429 C962 ;Jump table points to the RTS at ACK MOS03 0434 C965 ^27 MOS03 0430 C962 MOS03 0434 C965 ^27 MOS03 0431 C962 ;EM ($19) - Plotting MOS03 0434 C965 ^27 MOS03 0432 C962 MOS03 0434 C965 ^27 MOS03 0433 C962 AE 61 03 EM LDX NPIX ;Filter out non-graphics modes MOS03 0434 C965 ^27 MOS03 0434 C965 F0 A7 BEQ JMIV25 ;[text mode] -- MOS03 0435 C967 4C 70 D0 JMP EMA ;Jump to graphics routines -- MOS03 0436 C96A -- MOS03 0437 C96A ;Hardware scroll down -- MOS03 0438 C96A ;Doesn't touch cursor -- MOS03 0439 C96A -- MOS03 0440 C96A ; These routines return z=0 -- MOS03 0441 C96A -- MOS03 0442 C96A AE 50 03 HSCRDN LDX TOPSCN ;Subt. BYTROW from TOPSCN -- MOS03 0443 C96D AD 51 03 LDA TOPSCN+&01 -- MOS03 0444 C970 20 DE CB JSR SUBROW -- MOS03 0445 C973 B0 14 BCS NEWTOP ;Wraparound? No?, then done MOS03 0445 C973 v6B MOS03 0446 C975 6D 54 03 ADC BYTSCN ;Yes?, then add screen length MOS03 0445 C973 v6B MOS03 0447 C978 90 0F BCC NEWTOP ;(branch always taken) MOS03 0445 C973 v6B MOS03 0448 C97A MOS03 0445 C973 v6B MOS03 0449 C97A AE 50 03 HSCRUP LDX TOPSCN ;Add BYTROW to TOPSCN MOS03 0445 C973 v6B MOS03 0450 C97D AD 51 03 LDA TOPSCN+&01 MOS03 0445 C973 v6B MOS03 0451 C980 20 B1 CA JSR ADDROW MOS03 0445 C973 v6B MOS03 0452 C983 10 04 BPL NEWTOP ;Wraparound? MOS03 0445 C973 v6B MOS03 0453 C985 38 SEC MOS03 0445 C973 v6B MOS03 0454 C986 ED 54 03 SBC BYTSCN ;Yes?, then subtract off screen length MOS03 0445 C973 v6B MOS03 0455 C989 8D 51 03 NEWTOP STA TOPSCN +&01 -- MOS03 0456 C98C 8E 50 03 STX TOPSCN -- MOS03 0457 C98F A0 0C LDYIM &0C ;Prog. START of 6845 -- MOS03 0458 C991 D0 51 BNE AXCRTA ;(branch always taken) MOS03 0458 C991 v2E MOS03 0459 C993 MOS03 0458 C991 v2E MOS03 0460 C993 ;SUB ($1A) - Sets default text MOS03 0458 C991 v2E MOS03 0461 C993 ;& graphics windows. MOS03 0458 C991 v2E MOS03 0462 C993 ;Homes both cursors MOS03 0458 C991 v2E MOS03 0463 C993 ;Sets graphics origin to (0,0) MOS03 0458 C991 v2E MOS03 0464 C993 MOS03 0458 C991 v2E MOS03 0465 C993 ;Clear all window parameters, MOS03 0458 C991 v2E MOS03 0466 C993 ;Both cusors, & gr. origin MOS03 0458 C991 v2E MOS03 0467 C993 MOS03 0458 C991 v2E MOS03 0468 C993 A9 00 SUB LDAIM &00 MOS03 0458 C991 v2E MOS03 0469 C995 A2 2C LDXIM VDUWS+&04-GWLCOL ;THIS VALUE LIKELY TO CHANGE ! MOS03 0458 C991 v2E MOS03 0470 C997 9D 00 03 SUBA STAAX GWLCOL MOS03 0458 C991 v2E MOS03 0471 C99A CA DEX MOS03 0458 C991 v2E MOS03 0472 C99B 10 FA BPL SUBA MOS03 0458 C991 v2E MOS03 0473 C99D MOS03 0458 C991 v2E MOS03 0474 C99D ;Set other parameters MOS03 0458 C991 v2E MOS03 0475 C99D MOS03 MOS03 MOS03 MOS03 Acorn macro assembler Page 18 MOS03 VDU File - MOS03 MOS03 MOS03 0458 C991 v2E MOS03 0476 C99D AE 55 03 LDX MODE ;Get no. of char. cols. MOS03 0458 C991 v2E MOS03 0477 C9A0 BC EF C3 LDYAX PCOLS ;How many columns ? MOS03 0458 C991 v2E MOS03 0478 C9A3 8C 0A 03 STY TWRCOL ;Default text window MOS03 0458 C991 v2E MOS03 0479 C9A6 20 5C CA JSR SETPWW ;Set the text width MOS03 0458 C991 v2E MOS03 0480 C9A9 BC E7 C3 LDYAX PROWS ;Get no. char. rows MOS03 0458 C991 v2E MOS03 0481 C9AC 8C 09 03 STY TWBROW ;Default text window MOS03 0458 C991 v2E MOS03 0482 C9AF A0 03 LDYIM &03 ;GRAPHICS WINDOW Top row MOS03 0458 C991 v2E MOS03 0483 C9B1 8C 23 03 STY QEND MOS03 0458 C991 v2E MOS03 0484 C9B4 C8 INY MOS03 0458 C991 v2E MOS03 0485 C9B5 8C 21 03 STY QEND-&02 ;right column MOS03 0458 C991 v2E MOS03 0486 C9B8 CE 22 03 DEC QEND-&01 ;now = $FF MOS03 0458 C991 v2E MOS03 0487 C9BB CE 20 03 DEC QEND-&03 ;now = $FF MOS03 0458 C991 v2E MOS03 0488 C9BE 20 0D CA JSR CAN ;Transfer to window & convert co-ords MOS03 0458 C991 v2E MOS03 0489 C9C1 A9 F7 LDAIM &F7 ;Clear bit 3 of STATS (default windows set) MOS03 0458 C991 v2E MOS03 0490 C9C3 20 A7 C5 JSR STTAND MOS03 0458 C991 v2E MOS03 0491 C9C6 AE 50 03 LDX TOPSCN ;Programme cursor MOS03 0458 C991 v2E MOS03 0492 C9C9 AD 51 03 LDA TOPSCN+&01 ;to top L.H. byte MOS03 0458 C991 v2E MOS03 0493 C9CC 8E 4A 03 CSDSPA STX CSPOSN MOS03 0458 C991 v2E MOS03 0494 C9CF 8D 4B 03 STA CSPOSN +&01 MOS03 0458 C991 v2E MOS03 0495 C9D2 10 04 BPL CSDSP MOS03 0458 C991 v2E MOS03 0496 C9D4 38 SEC MOS03 0458 C991 v2E MOS03 0497 C9D5 ED 54 03 SBC BYTSCN MOS03 0458 C991 v2E MOS03 0498 C9D8 86 D8 CSDSP STX ZMEMT MOS03 0458 C991 v2E MOS03 0499 C9DA 85 D9 STA ZMEMT +&01 MOS03 0458 C991 v2E MOS03 0500 C9DC AE 4A 03 LDX CSPOSN MOS03 0458 C991 v2E MOS03 0501 C9DF AD 4B 03 LDA CSPOSN +&01 MOS03 0458 C991 v2E MOS03 0502 C9E2 A0 0E LDYIM &0E MOS03 0458 C991 v2E MOS03 0503 C9E4 48 AXCRTA PHA -- MOS03 0504 C9E5 AD 55 03 LDA MODE ;Is it teletext ? -- MOS03 0505 C9E8 C9 07 CMPIM &07 -- MOS03 0506 C9EA 68 PLA -- MOS03 0507 C9EB B0 10 BCS AXCRTB MOS03 0507 C9EB v6F MOS03 0508 C9ED 86 DA STX ZTEMP ;No?, then divide by 8 MOS03 0507 C9EB v6F MOS03 0509 C9EF 4A LSRA MOS03 0507 C9EB v6F MOS03 0510 C9F0 66 DA ROR ZTEMP MOS03 0507 C9EB v6F MOS03 0511 C9F2 4A LSRA MOS03 0507 C9EB v6F MOS03 0512 C9F3 66 DA ROR ZTEMP MOS03 0507 C9EB v6F MOS03 0513 C9F5 4A LSRA MOS03 0507 C9EB v6F MOS03 0514 C9F6 66 DA ROR ZTEMP MOS03 0507 C9EB v6F MOS03 0515 C9F8 A6 DA LDX ZTEMP MOS03 0507 C9EB v6F MOS03 0516 C9FA 4C FF C9 JMP AXCRTC MOS03 0507 C9EB v6F MOS03 0517 C9FD ;For TTX, fiddle the high address lines MOS03 0507 C9EB v6F MOS03 0518 C9FD [ MOS125 = &FF MOS03 0507 C9EB v6F MOS03 0521 C9FD | MOS03 0507 C9EB v6F MOS03 0522 C9FD ;on entry C=1, A=&7C..83, normal/wrapped screen address high byte, we need: MOS03 0507 C9EB v6F MOS03 0523 C9FD ;b5 = MA13 set, TTXVDU address mapping MOS03 0507 C9EB v6F MOS03 0524 C9FD ;b4 = MA12 clear, no HIRES wraparound MOS03 0507 C9EB v6F MOS03 0525 C9FD ;b3 = MA11 set, high RAM bank MOS03 0507 C9EB v6F MOS03 0526 C9FD ;b2 = MA10 indicates TTX wraparound, needed on-chip for cursor display MOS03 0507 C9EB v6F MOS03 0527 C9FD ;b7,6 unused MOS03 0507 C9EB v6F MOS03 0528 C9FD E9 54 AXCRTB SBCIM &54 ;map to &28..2F -- MOS03 0529 C9FF ] -- MOS03 0530 C9FF ;Write (A) to reg. (Y) of 6845 -- MOS03 0531 C9FF ;& (X) to reg. (Y)+1 -- MOS03 0532 C9FF -- MOS03 0533 C9FF 8C 00 FE AXCRTC STY CRTCA ;Access reg. (Y) -- MOS03 0534 CA02 8D 01 FE STA CRTCD ;Store MSB -- MOS03 0535 CA05 C8 INY ;Access reg. (Y)+1 -- MOS03 0536 CA06 8C 00 FE STY CRTCA -- MOS03 0537 CA09 8E 01 FE STX CRTCD ;Store LSB -- MOS03 0538 CA0C 60 RTS -- MOS03 0539 CA0D -- MOS03 0540 CA0D ;CAN ($18) Define graphics area -- MOS03 0541 CA0D -- MOS03 0542 CA0D ;QEND-7 = L.H. margin = GWLCOL Low byte 1st -- MOS03 0543 CA0D ;QEND-5 = Bottom row = GWBROW -- MOS03 0544 CA0D ;QEND-3 = R.H. margin = GWRCOL -- MOS03 0545 CA0D ;QEND-1 = Top row = GWTROW -- MOS03 0546 CA0D -- MOS03 0547 CA0D 20 55 CA CAN JSR CANB ;Swap graphics cursor with innocuous bytes in WS -- MOS03 0548 CA10 A2 1C LDXIM QEND-&07-V -- MOS03 0549 CA12 A0 2C LDYIM CDELTA-V -- MOS03 0550 CA14 20 C8 D3 JSR TRISA ;Calculate window differences to CDELTA -- MOS03 0551 CA17 0D 2D 03 ORA CDELTA+&01 ;(A) returns with CDELTA+3= DeltaY, so OR with DeltaX -- MOS03 0552 CA1A 30 39 BMI CANB ;If either is -ve, then illegal window MOS03 0552 CA1A v46 MOS03 0553 CA1C A2 20 LDXIM QEND-&03-V ;Convert window to Ico-ords MOS03 0552 CA1A v46 MOS03 0554 CA1E 20 5B D1 JSR EIGABS MOS03 0552 CA1A v46 MOS03 0555 CA21 A2 1C LDXIM QEND-&07-V MOS03 0552 CA1A v46 MOS03 0556 CA23 20 5B D1 JSR EIGABS MOS03 0552 CA1A v46 MOS03 0557 CA26 AD 1F 03 LDA QEND-&04 ;Are both lower margins +ve ? MOS03 0552 CA1A v46 MOS03 0558 CA29 0D 1D 03 ORA QEND-&06 MOS03 0552 CA1A v46 MOS03 0559 CA2C 30 27 BMI CANB ;No?, then illegal MOS03 0552 CA1A v46 MOS03 0560 CA2E AD 23 03 LDA QEND ;Is Y valid ? MOS03 0552 CA1A v46 MOS03 0561 CA31 D0 22 BNE CANB ;Only if MSB is zero MOS03 0552 CA1A v46 MOS03 0562 CA33 AE 55 03 LDX MODE ;Is X valid ? MOS03 0552 CA1A v46 MOS03 0563 CA36 AD 21 03 LDA QEND-&02 ;Divide by 8 & see if > no. of character cols MOS03 0552 CA1A v46 MOS03 0564 CA39 85 DA STA ZTEMP MOS03 0552 CA1A v46 MOS03 0565 CA3B AD 20 03 LDA QEND-&03 ;LSB of RH margin -1 MOS03 0552 CA1A v46 MOS03 0566 CA3E 46 DA LSR ZTEMP MOS03 0552 CA1A v46 MOS03 0567 CA40 6A RORA MOS03 0552 CA1A v46 MOS03 0568 CA41 46 DA LSR ZTEMP MOS03 0552 CA1A v46 MOS03 0569 CA43 D0 10 BNE CANB MOS03 0552 CA1A v46 MOS03 0570 CA45 6A RORA MOS03 0552 CA1A v46 MOS03 0571 CA46 4A LSRA MOS03 0552 CA1A v46 MOS03 0572 CA47 DD EF C3 CMPAX PCOLS MOS03 0552 CA1A v46 MOS03 0573 CA4A F0 02 BEQ CANA MOS03 0552 CA1A v46 MOS03 0574 CA4C 10 07 BPL CANB MOS03 0552 CA1A v46 MOS03 0575 CA4E A0 00 CANA LDYIM GWLCOL-V ;Copy to window MOS03 0552 CA1A v46 MOS03 0576 CA50 A2 1C LDXIM QEND-&07-V ;From Q MOS03 0552 CA1A v46 MOS03 0577 CA52 20 33 D4 JSR COPY8 MOS03 0552 CA1A v46 MOS03 0578 CA55 A2 10 CANB LDXIM GCSR-V ;Swap GCSR with CANWS, as EIGABS corrupts this -- MOS03 0579 CA57 A0 28 LDYIM CANWS-V -- MOS03 0580 CA59 4C D4 CD JMP SWAPF -- MOS03 0581 CA5C -- MOS03 0582 CA5C ;Set printer window width -- MOS03 0583 CA5C ;Char. width in A -- MOS03 0584 CA5C ;Mode in X -- MOS03 0585 CA5C -- MOS03 0586 CA5C C8 SETPWW INY -- MOS03 0587 CA5D 98 TYA -- MOS03 0588 CA5E A0 00 LDYIM &00 -- MOS03 0589 CA60 8C 4D 03 STY PWWDTH +&01 ;Clear MSB -- MOS03 0590 CA63 8D 4C 03 STA PWWDTH -- MOS03 0591 CA66 AD 4F 03 LDA BYTCH ;How many times to shift PWWDTH left ? -- MOS03 0592 CA69 4A LSRA -- MOS03 0593 CA6A F0 09 BEQ SETPWC ;TTX? MOS03 0593 CA6A v76 MOS03 0594 CA6C 0E 4C 03 SETPWA ASL PWWDTH MOS03 0593 CA6A v76 MOS03 0595 CA6F 2E 4D 03 ROL PWWDTH +&01 MOS03 0593 CA6A v76 MOS03 0596 CA72 4A LSRA MOS03 0593 CA6A v76 MOS03 0597 CA73 90 F7 BCC SETPWA MOS03 0593 CA6A v76 MOS03 0598 CA75 60 SETPWC RTS ;This used to be FSFAIL & ESCFL & ESCBB as well MOS03 MOS03 MOS03 MOS03 Acorn macro assembler Page 19 MOS03 VDU File - MOS03 MOS03 -- MOS03 0599 CA76 -- MOS03 0600 CA76 ;GS ($1D) Define graphics origin -- MOS03 0601 CA76 -- MOS03 0602 CA76 ;GSA Define graphics origin -- MOS03 0603 CA76 ;The co-ordinates are in external 16 bit space. This does not -- MOS03 0604 CA76 ;move the windows, but does move the graphics cursors -- MOS03 0605 CA76 -- MOS03 0606 CA76 A2 20 GS LDXIM QEND-&03-V -- MOS03 0607 CA78 A0 0C LDYIM ORG-V ;Copy the new origin (external co-ords) to ORGY.. -- MOS03 0608 CA7A 20 41 D4 JSR COPYF -- MOS03 0609 CA7D [ MOS125 = &FF -- MOS03 0630 CA7D | -- MOS03 0631 CA7D ;IEG Inverse of EIG. Converts Icursor to Ecursor -- MOS03 0632 CA7D -- MOS03 0633 CA7D A0 10 IEG LDYIM GCSR-V ;Copy GCSIY to GCSY -- MOS03 0634 CA7F 20 3F D4 JSR COPYFB -- MOS03 0635 CA82 A2 02 LDXIM &02 ;Convert y co-ordinates -- MOS03 0636 CA84 A0 02 LDYIM &02 ;by multiplying by 4 -- MOS03 0637 CA86 20 99 CA JSR IEGC -- MOS03 0638 CA89 A2 00 LDXIM &00 ;Convert x co-ordinates -- MOS03 0639 CA8B A0 05 LDYIM &05 ;By multiplying by 2 -- MOS03 0640 CA8D AD 61 03 LDA NPIX ;4, or 8, depending on (NPIX) -- MOS03 0641 CA90 88 IEGA DEY MOS03 0643 CA92 ^7C MOS03 0642 CA91 4A LSRA MOS03 0643 CA92 ^7C MOS03 0643 CA92 D0 FC BNE IEGA -- MOS03 0644 CA94 AD 56 03 LDA MEMODE ;Get memory map type -- MOS03 0645 CA97 F0 06 BEQ IEGE ;=0 if 20K mode in which case skip one multiplication MOS03 0645 CA97 v79 MOS03 0646 CA99 MOS03 0645 CA97 v79 MOS03 0647 CA99 1E 10 03 IEGC ASLAX GCSR MOS03 0651 CAA0 ^77 MOS03 0648 CA9C 3E 11 03 ROLAX GCSR+&01 MOS03 0651 CAA0 ^77 MOS03 0649 CA9F IEGE MOS03 0651 CAA0 ^77 MOS03 0650 CA9F 88 DEY MOS03 0651 CAA0 ^77 MOS03 0651 CAA0 D0 F7 BNE IEGC -- MOS03 0652 CAA2 38 SEC ;Now subtract off origin to give external co-ordinate -- MOS03 0653 CAA3 20 A7 CA JSR IEGD -- MOS03 0654 CAA6 E8 INX -- MOS03 0655 CAA7 BD 10 03 IEGD LDAAX GCSR -- MOS03 0656 CAAA FD 0C 03 SBCAX ORG -- MOS03 0657 CAAD 9D 10 03 STAAX GCSR -- MOS03 0658 CAB0 60 RTS -- MOS03 0659 CAB1 ] -- MOS03 0660 CAB1 LNK MOS04 -- MOS04 0001 CAB1 -- MOS04 0002 CAB1 TTL VDU File - MOS04 -- MOS04 0003 CAB1 OPT MOS04 MOS04 MOS04 MOS04 MOS04 Acorn macro assembler Page 20 MOS04 VDU File - MOS04 MOS04 -- MOS04 0004 CAB1 ;Last revision 02/06/82 -- MOS04 0005 CAB1 -- MOS04 0006 CAB1 ;02/06/82 Implode/Explode font change, RESET (fonts) changed -- MOS04 0007 CAB1 ;26/05/82 Replace table TBZTBX with LSRA -- MOS04 0008 CAB1 ;19/05/82 Compress PAGEE code -- MOS04 0009 CAB1 ;18/05/82 Conditional coding to remove bug from PAGE -- MOS04 0010 CAB1 ;01/05/82 Considerable recoding for new variable order & forward queueing -- MOS04 0011 CAB1 ;19/04/82 BYTE squashing -- MOS04 0012 CAB1 ;24/03/82 Add soft font implosion & explosion -- MOS04 0013 CAB1 ; Change refs. to BEGSCN+1 to BEGSCN -- MOS04 0014 CAB1 ;08/02/82 Remove initialisation of TRMCH -- MOS04 0015 CAB1 ;07/01/82 Remove initialisation of VDUVEC -- MOS04 0016 CAB1 ;16/11 Bug fix - page mode only at bottom line of window -- MOS04 0017 CAB1 ;14/11 Initialisation of DOTS removed -- MOS04 0018 CAB1 ;28/10 Initialisation of FNTFLG -- MOS04 0019 CAB1 -- MOS04 0020 CAB1 ;Get address of line below -- MOS04 0021 CAB1 -- MOS04 0022 CAB1 48 ADDROW PHA -- MOS04 0023 CAB2 8A TXA -- MOS04 0024 CAB3 18 CLC -- MOS04 0025 CAB4 6D 52 03 ADC BYTROW -- MOS04 0026 CAB7 AA TAX -- MOS04 0027 CAB8 68 PLA -- MOS04 0028 CAB9 6D 53 03 ADC BYTROW +&01 -- MOS04 0029 CABC 60 RTS -- MOS04 0030 CABD -- MOS04 0031 CABD ;Is page mode on ? -- MOS04 0032 CABD -- MOS04 0033 CABD ;CTRL and SHIFT keys pressed (c=1) -- MOS04 0034 CABD -- MOS04 0035 CABD 20 F1 CA PAGEF JSR PAGED ;reset LINES, N.B. does not corrupt c MOS04 0039 CAC5 ^76 MOS04 0036 CAC0 ; If c=1 => set both LEDs MOS04 0039 CAC5 ^76 MOS04 0037 CAC0 20 FC E9 PAGE JSR MOSTST ;pause if CTRL and SHIFT keys pressed MOS04 0039 CAC5 ^76 MOS04 0038 CAC3 90 02 BCC PAGEE ;[CTRL not pressed] MOS04 0039 CAC5 ^76 MOS04 0039 CAC5 30 F6 BMI PAGEF ;[CTRL and SHIFT keys pressed ,c=1] MOS04 0038 CAC3 v7D MOS04 0040 CAC7 ; CTRL without SHIFT MOS04 0038 CAC3 v7D MOS04 0041 CAC7 MOS04 0038 CAC3 v7D MOS04 0042 CAC7 [ PAGEFX =0 ;TRUE if bug in page to be fixed MOS04 0038 CAC3 v7D MOS04 0043 CAC7 A5 D0 PAGEE LDA STATS -- MOS04 0044 CAC9 49 04 EORIM &04 ;invert page mode bit -- MOS04 0045 CACB 29 46 ANDIM &46 ;Exit if C.E. or scroll disabled, or not in page mode -- MOS04 0046 CACD D0 2A BNE PAGEX MOS04 0046 CACD v55 MOS04 0047 CACF | MOS04 0046 CACD v55 MOS04 0052 CACF ] MOS04 0046 CACD v55 MOS04 0053 CACF MOS04 0046 CACD v55 MOS04 0054 CACF AD 69 02 LDA LINES ;Is a page printed yet ? MOS04 0046 CACD v55 MOS04 0055 CAD2 30 22 BMI PAGEA ;If -ve, then reset (more down scrolls than up) MOS04 0046 CACD v55 MOS04 0056 CAD4 ; ensure on bottom line of text window MOS04 0046 CACD v55 MOS04 0057 CAD4 AD 19 03 LDA CSY MOS04 0046 CACD v55 MOS04 0058 CAD7 CD 09 03 CMP TWBROW MOS04 0046 CACD v55 MOS04 0059 CADA 90 1A BCC PAGEA ;[not on bottom line of text window] MOS04 0046 CACD v55 MOS04 0060 CADC ; deal with overlap MOS04 0046 CACD v55 MOS04 0061 CADC 4A LSRA MOS04 0046 CACD v55 MOS04 0062 CADD 4A LSRA MOS04 0046 CACD v55 MOS04 0063 CADE 38 SEC MOS04 0046 CACD v55 MOS04 0064 CADF 6D 69 02 ADC LINES MOS04 0046 CACD v55 MOS04 0065 CAE2 6D 0B 03 ADC TWTROW ;(c=0) MOS04 0046 CACD v55 MOS04 0066 CAE5 CD 09 03 CMP TWBROW MOS04 0046 CACD v55 MOS04 0067 CAE8 90 0C BCC PAGEA ;No, then continue MOS04 0046 CACD v55 MOS04 0068 CAEA 18 CLC ;do not set LEDs on first scroll test MOS04 0046 CACD v55 MOS04 0069 CAEB ;wait for shift key MOS04 0046 CACD v55 MOS04 0070 CAEB 20 FC E9 PAGEC JSR MOSTST MOS04 0046 CACD v55 MOS04 0071 CAEE 38 SEC ;test LEDs on subsequent scroll tests MOS04 0046 CACD v55 MOS04 0072 CAEF 10 FA BPL PAGEC MOS04 0046 CACD v55 MOS04 0073 CAF1 A9 FF PAGED LDAIM &FF ;Reinitialise LINES MOS04 0046 CACD v55 MOS04 0074 CAF3 8D 69 02 STA LINES MOS04 0046 CACD v55 MOS04 0075 CAF6 EE 69 02 PAGEA INC LINES MOS04 0046 CACD v55 MOS04 0076 CAF9 60 PAGEX RTS -- MOS04 0077 CAFA -- MOS04 0078 CAFA ;INTIALISATION ROUTINE -- MOS04 0079 CAFA ;Initial mode in (A) -- MOS04 0080 CAFA -- MOS04 0081 CAFA 48 RESET PHA ;Push mode -- MOS04 0082 CAFB A2 7F LDXIM VEND-V ;Clear all variables -- MOS04 0083 CAFD A9 00 LDAIM &00 -- MOS04 0084 CAFF 85 D0 STA STATS -- MOS04 0085 CB01 9D FF 02 RESETA STAAX V-&01 MOS04 0087 CB05 ^7A MOS04 0086 CB04 CA DEX MOS04 0087 CB05 ^7A MOS04 0087 CB05 D0 FA BNE RESETA -- MOS04 0088 CB07 ; X=0 **** AND EQ status (used by FONT) **** -- MOS04 0089 CB07 20 FD CC JSR FONT ;Ensure font imploded -- MOS04 0090 CB0A 68 PLA ;Pull the mode back again -- MOS04 0091 CB0B A2 7F LDXIM &7F ;Initialise CHCSR to character for DEL -- MOS04 0092 CB0D 8E 66 03 STX CHCSR ;and fall through to ... -- MOS04 0093 CB10 -- MOS04 0094 CB10 ;MODE CHANGE -- MOS04 0095 CB10 -- MOS04 0096 CB10 2C 8E 02 CHMODE BIT MODEL ;adjust according to model -- MOS04 0097 CB13 30 02 BMI CHMOD1 ;[model B] MOS04 0097 CB13 v7D MOS04 0098 CB15 09 04 ORAIM &04 ;model A MOS04 0097 CB13 v7D MOS04 0099 CB17 29 07 CHMOD1 ANDIM &07 -- MOS04 0100 CB19 AA TAX -- MOS04 0101 CB1A 8E 55 03 STX MODE ;Initialise MODE -- MOS04 0102 CB1D BD 14 C4 LDAAX COLMOD ;Get no. colours -- MOS04 0103 CB20 8D 60 03 STA NCOLOR ;=0 if TTX -- MOS04 0104 CB23 BD FF C3 LDAAX BYTCHT ;No. bytes / char. -- MOS04 0105 CB26 8D 4F 03 STA BYTCH -- MOS04 0106 CB29 BD 3A C4 LDAAX NPIXTB ;no. pixles per byte -1, =0 if non-graphics mode -- MOS04 0107 CB2C 8D 61 03 STA NPIX -- MOS04 0108 CB2F D0 02 BNE CHMODB MOS04 0108 CB2F v7D MOS04 0109 CB31 A9 07 LDAIM &07 ;Initialise left and right masks for read character MOS04 0108 CB2F v7D MOS04 0110 CB33 0A CHMODB ASLA ;Define left and right masks. PRESERVE c !!! -- MOS04 0111 CB34 A8 TAY -- MOS04 0112 CB35 B9 06 C4 LDAAY MASKTB -&01 ;Offset to right mask -- MOS04 0113 CB38 8D 63 03 STA MASKR -- MOS04 0114 CB3B 0A CHMODC ASLA MOS04 0115 CB3C ^7D MOS04 0115 CB3C 10 FD BPL CHMODC ;Generate left most mask -- MOS04 0116 CB3E 8D 62 03 STA MASKL ;c=0 - preserve until byte width type generated -- MOS04 0117 CB41 BC 40 C4 LDYAX MODETB ;Memory map type -- MOS04 0118 CB44 8C 56 03 STY MEMODE -- MOS04 0119 CB47 B9 4F C4 LDAAY CZERO ;Initialise C0 -- MOS04 0120 CB4A 20 1B EA JSR CREG ;must preserve c=0 -- MOS04 0121 CB4D B9 4B C4 LDAAY CONE -- MOS04 0122 CB50 20 1B EA JSR CREG -- MOS04 0123 CB53 B9 59 C4 LDAAY BYTSTA ;Total bytes dsp.'ed -- MOS04 0124 CB56 8D 54 03 STA BYTSCN -- MOS04 0125 CB59 B9 5E C4 LDAAY STSCTB ;Addr. 1st to disp'ed -- MOS04 0126 CB5C 8D 4E 03 STA BEGSCN -- MOS04 0127 CB5F [ MOS125 = &FF -- MOS04 0133 CB5F | MOS04 MOS04 MOS04 MOS04 Acorn macro assembler Page 21 MOS04 VDU File - MOS04 MOS04 -- MOS04 0134 CB5F 98 TYA ;Get byte width type -- MOS04 0135 CB60 49 07 EORIM &07 -- MOS04 0136 CB62 4A LSRA -- MOS04 0137 CB63 AA TAX -- MOS04 0138 CB64 CA DEX ;Map (0,1,2,3,4) to (2,2,1,1,0) -- MOS04 0139 CB65 ] -- MOS04 0140 CB65 BD 66 C4 LDAAX TBZTBA ;LSB of table addr. -- MOS04 0141 CB68 85 E0 STA ZTBL -- MOS04 0142 CB6A A9 C3 LDAIM /(HRGTB ) ;MSB of same (always the same) -- MOS04 0143 CB6C 85 E1 STA ZTBL +&01 -- MOS04 0144 CB6E BD 63 C4 LDAAX BYTRTA ;Byte width of row -- MOS04 0145 CB71 8D 52 03 STA BYTROW -- MOS04 0146 CB74 8E 53 03 STX BYTROW +&01 -- MOS04 0147 CB77 A9 43 LDAIM &43 ;Preserve b6, b1 & b0 of STATS only -- MOS04 0148 CB79 20 A7 C5 JSR STTAND ;Clear all others -- MOS04 0149 CB7C AE 55 03 LDX MODE ;Indirect mode to mMODREG -- MOS04 0150 CB7F BD F7 C3 LDAAX INDMOD ;from this table -- MOS04 0151 CB82 20 23 EA JSR MVPRC0 ;as close as possible to the reprogramming of the 6845 -- MOS04 0152 CB85 -- MOS04 0153 CB85 ;PROGRAMME THE 6845 -- MOS04 0154 CB85 -- MOS04 0155 CB85 08 PHP -- MOS04 0156 CB86 78 SEI -- MOS04 0157 CB87 BE 69 C4 LDXAY CRTCX ;Get the table to Xmt -- MOS04 0158 CB8A A0 0B LDYIM &0B ;No. bytes to feed it -- MOS04 0159 CB8C BD 6E C4 CRTCLP LDAAX CRTCTB ;Load byte to MOS04 0163 CB94 ^76 MOS04 0160 CB8F 20 34 C9 JSR CRTCP ;Programme the 6845 and save value of cursor start MOS04 0163 CB94 ^76 MOS04 0161 CB92 CA DEX MOS04 0163 CB94 ^76 MOS04 0162 CB93 88 DEY MOS04 0163 CB94 ^76 MOS04 0163 CB94 10 F6 BPL CRTCLP -- MOS04 0164 CB96 28 PLP -- MOS04 0165 CB97 -- MOS04 0166 CB97 20 3F C8 JSR DCD ;Default log.phys. cols. -- MOS04 0167 CB9A 20 93 C9 JSR SUB ;Clear any windowing -- MOS04 0168 CB9D -- MOS04 0169 CB9D ;fall through to ..... -- MOS04 0170 CB9D -- MOS04 0171 CB9D A2 00 CLATXT LDXIM &00 ;TOPSCN:=BEGSCN -- MOS04 0172 CB9F AD 4E 03 LDA BEGSCN ;Load must be in this to ensure n=0, tested in CSDSPA -- MOS04 0173 CBA2 8E 50 03 STX TOPSCN -- MOS04 0174 CBA5 8D 51 03 STA TOPSCN +&01 -- MOS04 0175 CBA8 20 CC C9 JSR CSDSPA ;Home cursor -- MOS04 0176 CBAB A0 0C LDYIM &0C ;Take divided address -- MOS04 0177 CBAD 20 FF C9 JSR AXCRTC -- MOS04 0178 CBB0 AD 58 03 LDA BTCOLF -- MOS04 0179 CBB3 AE 56 03 LDX MEMODE ;Get mem.map type -- MOS04 0180 CBB6 BC 54 C4 LDYAX CLSCTA ;Set up jump vector -- MOS04 0181 CBB9 8C 5D 03 STY JVEC -- MOS04 0182 CBBC A0 CC LDYIM /(CLASCA ) ;Used to be LDYAX CLSCTB -- MOS04 0183 CBBE 8C 5E 03 STY JVEC +&01 -- MOS04 0184 CBC1 A2 00 LDXIM &00 -- MOS04 0185 CBC3 8E 69 02 STX LINES ;Initialise the number of lines scrolled -- MOS04 0186 CBC6 8E 18 03 STX CSX -- MOS04 0187 CBC9 8E 19 03 STX CSY -- MOS04 0188 CBCC 6C 5D 03 JMI JVEC -- MOS04 0189 CBCF -- MOS04 0190 CBCF RCHDEF -- MOS04 0191 CBCF 20 50 D0 JSR CHADDR ;Read character definition -- MOS04 0192 CBD2 A0 00 LDYIM &00 ;Address character (start of defn. now in ZTEMPC) -- MOS04 0193 CBD4 B1 DE PRABA LDAIY ZTEMPC ;Copy definition MOS04 0197 CBDB ^77 MOS04 0194 CBD6 C8 INY MOS04 0197 CBDB ^77 MOS04 0195 CBD7 91 F0 STAIY WARGS MOS04 0197 CBDB ^77 MOS04 0196 CBD9 C0 08 CPYIM &08 MOS04 0197 CBDB ^77 MOS04 0197 CBDB D0 F7 BNE PRABA -- MOS04 0198 CBDD 60 RTS -- MOS04 0199 CBDE -- MOS04 0200 CBDE [ MOS125 = &FF -- MOS04 0201 CBDE | -- MOS04 0202 CBDE ;Get the next line up, -- MOS04 0203 CBDE ;test if wraparound -- MOS04 0204 CBDE ;This is here as padding -- MOS04 0205 CBDE -- MOS04 0206 CBDE 48 SUBROW PHA -- MOS04 0207 CBDF 8A TXA -- MOS04 0208 CBE0 38 SEC -- MOS04 0209 CBE1 ED 52 03 SBC BYTROW -- MOS04 0210 CBE4 AA TAX -- MOS04 0211 CBE5 68 PLA -- MOS04 0212 CBE6 ED 53 03 SBC BYTROW +&01 -- MOS04 0213 CBE9 CD 4E 03 CMP BEGSCN -- MOS04 0214 CBEC 60 RTS -- MOS04 0215 CBED -- MOS04 0216 CBED ;NORTH -- MOS04 0217 CBED -- MOS04 0218 CBED ; Returns zero false -- MOS04 0219 CBED 38 NBDY SEC -- MOS04 0220 CBEE A5 D6 LDA ZMEMG -- MOS04 0221 CBF0 ED 52 03 SBC BYTROW -- MOS04 0222 CBF3 85 D6 STA ZMEMG -- MOS04 0223 CBF5 A5 D7 LDA ZMEMG +&01 -- MOS04 0224 CBF7 ED 53 03 SBC BYTROW +&01 -- MOS04 0225 CBFA CD 4E 03 CMP BEGSCN ;Wraparound ? -- MOS04 0226 CBFD B0 03 BCS NBDYA MOS04 0226 CBFD v7C MOS04 0227 CBFF 6D 54 03 ADC BYTSCN MOS04 0226 CBFD v7C MOS04 0228 CC02 85 D7 NBDYA STA ZMEMG +&01 -- MOS04 0229 CC04 A0 07 LDYIM &07 -- MOS04 0230 CC06 60 RTS -- MOS04 0231 CC07 ] -- MOS04 0232 CC07 -- MOS04 0233 CC07 9D 00 30 CLASCA STAAX &3000 ;Modes 1-3 (20K) -- MOS04 0234 CC0A 9D 00 31 STAAX &3100 -- MOS04 0235 CC0D 9D 00 32 STAAX &3200 -- MOS04 0236 CC10 9D 00 33 STAAX &3300 -- MOS04 0237 CC13 9D 00 34 STAAX &3400 -- MOS04 0238 CC16 9D 00 35 STAAX &3500 -- MOS04 0239 CC19 9D 00 36 STAAX &3600 -- MOS04 0240 CC1C 9D 00 37 STAAX &3700 -- MOS04 0241 CC1F 9D 00 38 STAAX &3800 -- MOS04 0242 CC22 9D 00 39 STAAX &3900 -- MOS04 0243 CC25 9D 00 3A STAAX &3A00 -- MOS04 0244 CC28 9D 00 3B STAAX &3B00 -- MOS04 0245 CC2B 9D 00 3C STAAX &3C00 -- MOS04 0246 CC2E 9D 00 3D STAAX &3D00 -- MOS04 0247 CC31 9D 00 3E STAAX &3E00 -- MOS04 0248 CC34 9D 00 3F STAAX &3F00 -- MOS04 0249 CC37 9D 00 40 CLASCB STAAX &4000 ;Mode 3 (16k) -- MOS04 0250 CC3A 9D 00 41 STAAX &4100 -- MOS04 0251 CC3D 9D 00 42 STAAX &4200 -- MOS04 0252 CC40 9D 00 43 STAAX &4300 -- MOS04 0253 CC43 9D 00 44 STAAX &4400 -- MOS04 0254 CC46 9D 00 45 STAAX &4500 MOS04 MOS04 MOS04 MOS04 Acorn macro assembler Page 22 MOS04 VDU File - MOS04 MOS04 -- MOS04 0255 CC49 9D 00 46 STAAX &4600 -- MOS04 0256 CC4C 9D 00 47 STAAX &4700 -- MOS04 0257 CC4F 9D 00 48 STAAX &4800 -- MOS04 0258 CC52 9D 00 49 STAAX &4900 -- MOS04 0259 CC55 9D 00 4A STAAX &4A00 -- MOS04 0260 CC58 9D 00 4B STAAX &4B00 -- MOS04 0261 CC5B 9D 00 4C STAAX &4C00 -- MOS04 0262 CC5E 9D 00 4D STAAX &4D00 -- MOS04 0263 CC61 9D 00 4E STAAX &4E00 -- MOS04 0264 CC64 9D 00 4F STAAX &4F00 -- MOS04 0265 CC67 9D 00 50 STAAX &5000 -- MOS04 0266 CC6A 9D 00 51 STAAX &5100 -- MOS04 0267 CC6D 9D 00 52 STAAX &5200 -- MOS04 0268 CC70 9D 00 53 STAAX &5300 -- MOS04 0269 CC73 9D 00 54 STAAX &5400 -- MOS04 0270 CC76 9D 00 55 STAAX &5500 -- MOS04 0271 CC79 9D 00 56 STAAX &5600 -- MOS04 0272 CC7C 9D 00 57 STAAX &5700 -- MOS04 0273 CC7F 9D 00 58 CLASCC STAAX &5800 ;Modes 4,5 (10K) -- MOS04 0274 CC82 9D 00 59 STAAX &5900 -- MOS04 0275 CC85 9D 00 5A STAAX &5A00 -- MOS04 0276 CC88 9D 00 5B STAAX &5B00 -- MOS04 0277 CC8B 9D 00 5C STAAX &5C00 -- MOS04 0278 CC8E 9D 00 5D STAAX &5D00 -- MOS04 0279 CC91 9D 00 5E STAAX &5E00 -- MOS04 0280 CC94 9D 00 5F STAAX &5F00 -- MOS04 0281 CC97 9D 00 60 CLASCD STAAX &6000 ;Mode 6 (8k) -- MOS04 0282 CC9A 9D 00 61 STAAX &6100 -- MOS04 0283 CC9D 9D 00 62 STAAX &6200 -- MOS04 0284 CCA0 9D 00 63 STAAX &6300 -- MOS04 0285 CCA3 9D 00 64 STAAX &6400 -- MOS04 0286 CCA6 9D 00 65 STAAX &6500 -- MOS04 0287 CCA9 9D 00 66 STAAX &6600 -- MOS04 0288 CCAC 9D 00 67 STAAX &6700 -- MOS04 0289 CCAF 9D 00 68 STAAX &6800 -- MOS04 0290 CCB2 9D 00 69 STAAX &6900 -- MOS04 0291 CCB5 9D 00 6A STAAX &6A00 -- MOS04 0292 CCB8 9D 00 6B STAAX &6B00 -- MOS04 0293 CCBB 9D 00 6C STAAX &6C00 -- MOS04 0294 CCBE 9D 00 6D STAAX &6D00 -- MOS04 0295 CCC1 9D 00 6E STAAX &6E00 -- MOS04 0296 CCC4 9D 00 6F STAAX &6F00 -- MOS04 0297 CCC7 9D 00 70 STAAX &7000 -- MOS04 0298 CCCA 9D 00 71 STAAX &7100 -- MOS04 0299 CCCD 9D 00 72 STAAX &7200 -- MOS04 0300 CCD0 9D 00 73 STAAX &7300 -- MOS04 0301 CCD3 9D 00 74 STAAX &7400 -- MOS04 0302 CCD6 9D 00 75 STAAX &7500 -- MOS04 0303 CCD9 9D 00 76 STAAX &7600 -- MOS04 0304 CCDC 9D 00 77 STAAX &7700 -- MOS04 0305 CCDF 9D 00 78 STAAX &7800 -- MOS04 0306 CCE2 9D 00 79 STAAX &7900 -- MOS04 0307 CCE5 9D 00 7A STAAX &7A00 -- MOS04 0308 CCE8 9D 00 7B STAAX &7B00 -- MOS04 0309 CCEB 9D 00 7C CLASCE STAAX &7C00 ;Mode 7 (1k = TTX) -- MOS04 0310 CCEE 9D 00 7D STAAX &7D00 -- MOS04 0311 CCF1 9D 00 7E STAAX &7E00 -- MOS04 0312 CCF4 9D 00 7F STAAX &7F00 -- MOS04 0313 CCF7 E8 INX -- MOS04 0314 CCF8 F0 61 BEQ ENSCRX MOS04 0314 CCF8 v1E MOS04 0315 CCFA 6C 5D 03 RUNNER JMI JVEC MOS04 0314 CCF8 v1E MOS04 0316 CCFD MOS04 0314 CCF8 v1E MOS04 0317 CCFD [ MOS125 = &FF MOS04 0314 CCF8 v1E MOS04 0332 CCFD ] MOS04 0314 CCF8 v1E MOS04 0333 CCFD MOS04 0314 CCF8 v1E MOS04 0334 CCFD FONT MOS04 0314 CCF8 v1E MOS04 0335 CCFD ; MOS04 0314 CCF8 v1E MOS04 0336 CCFD ; implode font MOS04 0314 CCF8 v1E MOS04 0337 CCFD ; MOS04 0314 CCF8 v1E MOS04 0338 CCFD A9 0F LDAIM &0F ;Fonts 1,2,3 hard (set 0). MSb not used MOS04 0314 CCF8 v1E MOS04 0339 CCFF 8D 67 03 STA FNTFLG MOS04 0314 CCF8 v1E MOS04 0340 CD02 ; MOS04 0314 CCF8 v1E MOS04 0341 CD02 A9 0C LDAIM SFPAGE MOS04 0314 CCF8 v1E MOS04 0342 CD04 A0 06 LDYIM &06 ;Set Fonts 1 to 7 to page SFPAGE MOS04 0314 CCF8 v1E MOS04 0343 CD06 99 68 03 FIMPA STAAY PGSFNT MOS04 0314 CCF8 v1E MOS04 0344 CD09 88 DEY MOS04 0314 CCF8 v1E MOS04 0345 CD0A 10 FA BPL FIMPA MOS04 0314 CCF8 v1E MOS04 0346 CD0C ; MOS04 0314 CCF8 v1E MOS04 0347 CD0C ; test operation type MOS04 0314 CCF8 v1E MOS04 0348 CD0C ; MOS04 0314 CCF8 v1E MOS04 0349 CD0C ; force X in range MOS04 0314 CCF8 v1E MOS04 0350 CD0C E0 07 CPXIM &07 MOS04 0314 CCF8 v1E MOS04 0351 CD0E 90 02 BCC FONTOK ;[X <= 6] MOS04 0314 CCF8 v1E MOS04 0352 CD10 A2 06 LDXIM &06 MOS04 0314 CCF8 v1E MOS04 0353 CD12 FONTOK ;0 <= X <= 6 MOS04 0314 CCF8 v1E MOS04 0354 CD12 8E 46 02 STX FONTSW ;record font state MOS04 0314 CCF8 v1E MOS04 0355 CD15 ; MOS04 0314 CCF8 v1E MOS04 0356 CD15 AD 43 02 LDA IHWM MOS04 0314 CCF8 v1E MOS04 0357 CD18 ; MOS04 0314 CCF8 v1E MOS04 0358 CD18 ; explode fonts that lie within extension pages MOS04 0314 CCF8 v1E MOS04 0359 CD18 ; MOS04 0314 CCF8 v1E MOS04 0360 CD18 A2 00 LDXIM &00 MOS04 0314 CCF8 v1E MOS04 0361 CD1A FEXPA MOS04 0314 CCF8 v1E MOS04 0362 CD1A EC 46 02 CPX FONTSW MOS04 0314 CCF8 v1E MOS04 0363 CD1D B0 0B BCS FEXPA0 MOS04 0314 CCF8 v1E MOS04 0364 CD1F ; C=0 MOS04 0314 CCF8 v1E MOS04 0365 CD1F BC BA C4 LDYAX FFSZOT MOS04 0314 CCF8 v1E MOS04 0366 CD22 99 68 03 STAAY PGSFNT MOS04 0314 CCF8 v1E MOS04 0367 CD25 ; C=0 MOS04 0314 CCF8 v1E MOS04 0368 CD25 69 01 ADCIM &01 MOS04 0314 CCF8 v1E MOS04 0369 CD27 E8 INX MOS04 0314 CCF8 v1E MOS04 0370 CD28 D0 F0 BNE FEXPA ;[ALWAYS jump] MOS04 0314 CCF8 v1E MOS04 0371 CD2A FEXPA0 MOS04 0314 CCF8 v1E MOS04 0372 CD2A ; MOS04 0314 CCF8 v1E MOS04 0373 CD2A ;X = FONTSW MOS04 0314 CCF8 v1E MOS04 0374 CD2A 8D 44 02 STA HWM MOS04 0314 CCF8 v1E MOS04 0375 CD2D ; MOS04 0314 CCF8 v1E MOS04 0376 CD2D A8 TAY MOS04 0314 CCF8 v1E MOS04 0377 CD2E F0 2B BEQ FONT0 MOS04 0314 CCF8 v1E MOS04 0378 CD30 A2 11 LDXIM SVHWMC MOS04 0314 CCF8 v1E MOS04 0379 CD32 4C 6C F1 JMP SVOP MOS04 0314 CCF8 v1E MOS04 0380 CD35 MOS04 0314 CCF8 v1E MOS04 0381 CD35 MOS04 0314 CCF8 v1E MOS04 0382 CD35 LNK MOS05 MOS04 0314 CCF8 v1E MOS05 0001 CD35 MOS04 0314 CCF8 v1E MOS05 0002 CD35 TTL VDU File - MOS05 MOS04 0314 CCF8 v1E MOS05 0003 CD35 OPT MOS05 MOS05 MOS05 MOS05 MOS05 Acorn macro assembler Page 23 MOS05 VDU File - MOS05 MOS05 MOS04 0314 CCF8 v1E MOS05 0004 CD35 ; MOS04 0314 CCF8 v1E MOS05 0005 CD35 ;Last update 05/05/82 MOS04 0314 CCF8 v1E MOS05 0006 CD35 MOS04 0314 CCF8 v1E MOS05 0007 CD35 ;05/05/82 RSAN corrected MOS04 0314 CCF8 v1E MOS05 0008 CD35 ;05/05/82 TADDRY changed to allow for only 1 table MOS04 0314 CCF8 v1E MOS05 0009 CD35 ;01/05/82 Recoded using new variable order & manifests MOS04 0314 CCF8 v1E MOS05 0010 CD35 ;01/05/82 Recode for new order of variables MOS04 0314 CCF8 v1E MOS05 0011 CD35 ;22/04/82 Encode ADDSCN & SUBSCN MOS04 0314 CCF8 v1E MOS05 0012 CD35 ;19/04/82 Comments added plus small byte squash MOS04 0314 CCF8 v1E MOS05 0013 CD35 ;25/03/82 Change all refs. to BEGSCN+1 to BEGSCN MOS04 0314 CCF8 v1E MOS05 0014 CD35 MOS04 0314 CCF8 v1E MOS05 0015 CD35 ;Account for scroll disabling if needs be MOS04 0314 CCF8 v1E MOS05 0016 CD35 ;Requires c=1 if scroll DOWN (cursor up) & vice versa MOS04 0314 CCF8 v1E MOS05 0017 CD35 ;If scroll enabled (b1 of STATS =0) adjusts PCSY unless on a margin MOS04 0314 CCF8 v1E MOS05 0018 CD35 ;If scroll disabled, wraps cursor, pulls return address from stack MOS04 0314 CCF8 v1E MOS05 0019 CD35 ;and jumps to CSDA. MOS04 0314 CCF8 v1E MOS05 0020 CD35 MOS04 0314 CCF8 v1E MOS05 0021 CD35 A9 02 ENSCRL LDAIM &02 ;Is scroll disabled ? MOS04 0314 CCF8 v1E MOS05 0022 CD37 24 D0 BIT STATS MOS04 0314 CCF8 v1E MOS05 0023 CD39 D0 02 BNE ENSCRM ;Yes?, then skip MOS04 0314 CCF8 v1E MOS05 0024 CD3B 50 32 BVC ENSCRR ;Or is CE set ? MOS04 0314 CCF8 v1E MOS05 0025 CD3D AD 09 03 ENSCRM LDA TWBROW ;Assume scroll up (so go to bottom row) MOS04 0314 CCF8 v1E MOS05 0026 CD40 90 03 BCC ENSCRN ;Unless c=1 MOS04 0314 CCF8 v1E MOS05 0027 CD42 AD 0B 03 LDA TWTROW ;Whence scroll DOWN (& go to top row) MOS04 0314 CCF8 v1E MOS05 0028 CD45 70 08 ENSCRN BVS ENSCRO ;If OUTPUT cursor, skip MOS04 0314 CCF8 v1E MOS05 0029 CD47 8D 19 03 STA CSY ;(this assumes windows are rectangular!) MOS04 0314 CCF8 v1E MOS05 0030 CD4A 68 PLA ;Cheat return stack MOS04 0314 CCF8 v1E MOS05 0031 CD4B 68 PLA MOS04 0314 CCF8 v1E MOS05 0032 CD4C 4C AE C6 JMP CSDA MOS04 0314 CCF8 v1E MOS05 0033 CD4F 08 ENSCRO PHP ;To preserve carry MOS04 0314 CCF8 v1E MOS05 0034 CD50 CD 65 03 CMP PCSY ;Would the input cursor like to go off screen ? MOS04 0314 CCF8 v1E MOS05 0035 CD53 F0 19 BEQ ENSCRP ;Yes?, then don't readdress it MOS04 0314 CCF8 v1E MOS05 0036 CD55 28 PLP ;Restore the carry, to see which way to go MOS04 0314 CCF8 v1E MOS05 0037 CD56 90 04 BCC ENSCRQ MOS04 0314 CCF8 v1E MOS05 0038 CD58 CE 65 03 DEC PCSY ;Scroll DOWN, so follow it down MOS04 0314 CCF8 v1E MOS05 0039 CD5B [ MOS125 = &FF MOS04 0314 CCF8 v1E MOS05 0040 CD5B | MOS04 0314 CCF8 v1E MOS05 0041 CD5B FONT0 MOS04 0314 CCF8 v1E MOS05 0042 CD5B ] MOS04 0314 CCF8 v1E MOS05 0043 CD5B 60 ENSCRX RTS ;May be referenced from MOS04 MOS05 0024 CD3B v4D MOS05 0044 CD5C EE 65 03 ENSCRQ INC PCSY ;Scroll UP, so go up as well MOS05 0024 CD3B v4D MOS05 0045 CD5F 60 RTS MOS05 0024 CD3B v4D MOS05 0046 CD60 MOS05 0024 CD3B v4D MOS05 0047 CD60 ;OCSRDL Delete output cursor MOS05 0024 CD3B v4D MOS05 0048 CD60 MOS05 0024 CD3B v4D MOS05 0049 CD60 08 OCSRDL PHP MOS05 0024 CD3B v4D MOS05 0050 CD61 48 PHA MOS05 0024 CD3B v4D MOS05 0051 CD62 AC 4F 03 LDY BYTCH MOS05 0024 CD3B v4D MOS05 0052 CD65 88 DEY ;TTX? MOS05 0024 CD3B v4D MOS05 0053 CD66 D0 0A BNE OCSRIV ;Not TTX?, then same as writing cursor, as it inverts MOS05 0024 CD3B v4D MOS05 0054 CD68 AD 38 03 LDA TTXTMP ;TTX?, then write remebered byte MOS05 0024 CD3B v4D MOS05 0055 CD6B 91 D8 STAIY ZMEMT ;(Y)=0 MOS05 0024 CD3B v4D MOS05 0056 CD6D 68 OCSREX PLA ;& exit MOS05 0024 CD3B v4D MOS05 0057 CD6E 28 ENSCRP PLP ;Get the stack correct MOS05 0024 CD3B v4D MOS05 0058 CD6F 60 ENSCRR RTS MOS05 0103 CD91 ^5A MOS05 0059 CD70 MOS05 0103 CD91 ^5A MOS05 0060 CD70 ;OCSRWR Write output cursor MOS05 0103 CD91 ^5A MOS05 0061 CD70 MOS05 0103 CD91 ^5A MOS05 0062 CD70 [ MOS125 = &FF MOS05 0103 CD91 ^5A MOS05 0084 CD70 | MOS05 0103 CD91 ^5A MOS05 0085 CD70 08 OCSRWR PHP MOS05 0103 CD91 ^5A MOS05 0086 CD71 48 PHA MOS05 0103 CD91 ^5A MOS05 0087 CD72 A9 3F OCSRIV LDAIM INVSXT MOS05 0103 CD91 ^5A MOS05 0088 CD74 AC 4F 03 LDY BYTCH MOS05 0103 CD91 ^5A MOS05 0089 CD77 C0 20 CPYIM &20 ;Mode 2 ? MOS05 0103 CD91 ^5A MOS05 0090 CD79 F0 13 BEQ OCSRIW ;Yes?, then don't invert the flashing bit MOS05 0103 CD91 ^5A MOS05 0091 CD7B A9 FF LDAIM &FF MOS05 0103 CD91 ^5A MOS05 0092 CD7D 88 DEY ;TTX? MOS05 0103 CD91 ^5A MOS05 0093 CD7E D0 08 BNE OCSRIU MOS05 0103 CD91 ^5A MOS05 0094 CD80 B1 D8 LDAIY ZMEMT ;(Y)=0 Yes?, then read byte directly from screen MOS05 0103 CD91 ^5A MOS05 0095 CD82 8D 38 03 STA TTXTMP ;and store it out of harm's way (no plotting in this mode) MOS05 0103 CD91 ^5A MOS05 0096 CD85 4D 66 03 EOR CHCSR ;Write the cursor MOS05 0103 CD91 ^5A MOS05 0097 CD88 48 OCSRIU PHA MOS05 0103 CD91 ^5A MOS05 0098 CD89 51 D8 EORIY ZMEMT ;Invert the character cell MOS05 0103 CD91 ^5A MOS05 0099 CD8B 91 D8 STAIY ZMEMT MOS05 0103 CD91 ^5A MOS05 0100 CD8D 68 PLA MOS05 0103 CD91 ^5A MOS05 0101 CD8E 88 OCSRIW DEY MOS05 0103 CD91 ^5A MOS05 0102 CD8F 10 F7 BPL OCSRIU MOS05 0103 CD91 ^5A MOS05 0103 CD91 30 DA BMI OCSREX ; Branch always -- MOS05 0104 CD93 ] -- MOS05 0105 CD93 -- MOS05 0106 CD93 ;Soft scrolling (non-anom.) -- MOS05 0107 CD93 -- MOS05 0108 CD93 ;Scroll DOWN -- MOS05 0109 CD93 -- MOS05 0110 CD93 20 5B CE SSCRDN JSR SSCRIN ;Initialise -- MOS05 0111 CD96 AD 09 03 LDA TWBROW ;1st receive address is bottom LH point -- MOS05 0112 CD99 8D 19 03 STA CSY ;(CSX initialised in SSCRIN) -- MOS05 0113 CD9C 20 09 CF JSR TADDRY ;address bottom LH point (guaranteed in window) -- MOS05 0114 CD9F 20 DE CB SSCRDA JSR SUBROW ;Get the address of the LH point of the next line up MOS05 0140 CDC6 ^57 MOS05 0115 CDA2 B0 03 BCS SSCRDB ;Wraparound between these two lines? NO, then continue MOS05 0140 CDC6 ^57 MOS05 0116 CDA4 6D 54 03 ADC BYTSCN ;Yes,then add screen and note we must scroll slowly! MOS05 0140 CDC6 ^57 MOS05 0117 CDA7 85 DB SSCRDB STA ZTEMP +&01 ;store transmit address MOS05 0140 CDC6 ^57 MOS05 0118 CDA9 86 DA STX ZTEMP MOS05 0140 CDC6 ^57 MOS05 0119 CDAB 85 DC STA ZTEMPB ;& MSB of next receive address (LSB is not changed) MOS05 0140 CDC6 ^57 MOS05 0120 CDAD [ MOS125 = &FF MOS05 0140 CDC6 ^57 MOS05 0127 CDAD | MOS05 0140 CDC6 ^57 MOS05 0128 CDAD 90 0A BCC SSCRDC ;c unchanged since just after SSCRDA MOS05 0140 CDC6 ^57 MOS05 0129 CDAF 20 DE CB SSCRDE JSR SUBROW ;Get next line up MOS05 0140 CDC6 ^57 MOS05 0130 CDB2 90 05 BCC SSCRDC ;Wraparound occured ?, then slow scroll to be safe MOS05 0140 CDC6 ^57 MOS05 0131 CDB4 20 38 CE JSR XMIT ;Scroll fast is possible MOS05 0140 CDC6 ^57 MOS05 0132 CDB7 F0 03 BEQ SSCRDD ;xmit returns EQ MOS05 0140 CDC6 ^57 MOS05 0133 CDB9 20 73 CE SSCRDC JSR SSCRS ;Scroll slowly ! MOS05 0140 CDC6 ^57 MOS05 0134 CDBC ] MOS05 0140 CDC6 ^57 MOS05 0135 CDBC A5 DC SSCRDD LDA ZTEMPB ;MSB of next receive address MOS05 0140 CDC6 ^57 MOS05 0136 CDBE A6 DA LDX ZTEMP ;LSB of same MOS05 0140 CDC6 ^57 MOS05 0137 CDC0 85 D9 STA ZMEMT +&01 ;Initialise next receive address MOS05 0140 CDC6 ^57 MOS05 0138 CDC2 86 D8 STX ZMEMT MOS05 0140 CDC6 ^57 MOS05 0139 CDC4 C6 DE DEC ZTEMPC ;Any more lines to copy ? MOS05 0140 CDC6 ^57 MOS05 0140 CDC6 D0 D7 BNE SSCRDA ;Don't bother to copy last line -- MOS05 0141 CDC8 A2 28 SSCREX LDXIM SSWS-V ;Preserve or restore current text cursor MOS05 0216 CE36 ^10 MOS05 0142 CDCA A0 18 LDYIM CSX-V MOS05 0216 CE36 ^10 MOS05 0143 CDCC A9 02 SWAP2 LDAIM &02 MOS05 0216 CE36 ^10 MOS05 0144 CDCE D0 06 BNE SWAP MOS05 0216 CE36 ^10 MOS05 0145 CDD0 A2 24 SWAPB LDXIM GCSIR-V ;SPLOTY requires c preserved MOS05 0216 CE36 ^10 MOS05 0146 CDD2 A0 14 SWAPC LDYIM OLDCS-V MOS05 0216 CE36 ^10 MOS05 0147 CDD4 MOS05 0216 CE36 ^10 MOS05 0148 CDD4 ;SWAPF swaps 4 bytes between (V)+(X) & (V)+(Y) MOS05 0216 CE36 ^10 MOS05 0149 CDD4 MOS05 0216 CE36 ^10 MOS05 0150 CDD4 A9 04 SWAPF LDAIM &04 ;by falling through to ... MOS05 0216 CE36 ^10 MOS05 0151 CDD6 MOS05 MOS05 MOS05 MOS05 Acorn macro assembler Page 24 MOS05 VDU File - MOS05 MOS05 MOS05 0216 CE36 ^10 MOS05 0152 CDD6 ;SWAP swaps (A) bytes between (V)+(X) & (V)+(Y) MOS05 0216 CE36 ^10 MOS05 0153 CDD6 MOS05 0216 CE36 ^10 MOS05 0154 CDD6 85 DA SWAP STA ZTEMP MOS05 0216 CE36 ^10 MOS05 0155 CDD8 BD 00 03 SWAPA LDAAX V MOS05 0216 CE36 ^10 MOS05 0156 CDDB 48 PHA MOS05 0216 CE36 ^10 MOS05 0157 CDDC B9 00 03 LDAAY V MOS05 0216 CE36 ^10 MOS05 0158 CDDF 9D 00 03 STAAX V MOS05 0216 CE36 ^10 MOS05 0159 CDE2 68 PLA MOS05 0216 CE36 ^10 MOS05 0160 CDE3 99 00 03 STAAY V MOS05 0216 CE36 ^10 MOS05 0161 CDE6 E8 INX MOS05 0216 CE36 ^10 MOS05 0162 CDE7 C8 INY MOS05 0216 CE36 ^10 MOS05 0163 CDE8 C6 DA DEC ZTEMP MOS05 0216 CE36 ^10 MOS05 0164 CDEA D0 EC BNE SWAPA MOS05 0216 CE36 ^10 MOS05 0165 CDEC 60 RTS MOS05 0216 CE36 ^10 MOS05 0166 CDED MOS05 0216 CE36 ^10 MOS05 0167 CDED MOS05 0216 CE36 ^10 MOS05 0168 CDED [ MOS125 = &FF MOS05 0216 CE36 ^10 MOS05 0169 CDED | MOS05 0216 CE36 ^10 MOS05 0170 CDED ;(SORTY exits with (X)<(Y)) MOS05 0216 CE36 ^10 MOS05 0171 CDED MOS05 0216 CE36 ^10 MOS05 0172 CDED A2 20 SORTA LDXIM NEWPT-V MOS05 0216 CE36 ^10 MOS05 0173 CDEF A0 14 LDYIM OLDCS-V MOS05 0216 CE36 ^10 MOS05 0174 CDF1 BD 02 03 SORTY LDAAX V+&02 MOS05 0216 CE36 ^10 MOS05 0175 CDF4 D9 02 03 CMPAY V+&02 MOS05 0216 CE36 ^10 MOS05 0176 CDF7 BD 03 03 LDAAX V+&03 MOS05 0216 CE36 ^10 MOS05 0177 CDFA F9 03 03 SBCAY V+&03 MOS05 0216 CE36 ^10 MOS05 0178 CDFD 10 D5 BPL SWAPF MOS05 0216 CE36 ^10 MOS05 0179 CDFF 60 RTS MOS05 0216 CE36 ^10 MOS05 0180 CE00 ] MOS05 0216 CE36 ^10 MOS05 0181 CE00 MOS05 0216 CE36 ^10 MOS05 0182 CE00 ;Soft scroll UP MOS05 0216 CE36 ^10 MOS05 0183 CE00 MOS05 0216 CE36 ^10 MOS05 0184 CE00 20 5B CE SSCRUP JSR SSCRIN ;Initialise MOS05 0216 CE36 ^10 MOS05 0185 CE03 AC 0B 03 LDY TWTROW ;Receive from top line, LH column MOS05 0216 CE36 ^10 MOS05 0186 CE06 8C 19 03 STY CSY MOS05 0216 CE36 ^10 MOS05 0187 CE09 20 09 CF JSR TADDRY ;Get 1st receive address (point guaranteed in window) MOS05 0216 CE36 ^10 MOS05 0188 CE0C 20 B1 CA SSCRUA JSR ADDROW ;Get line below MOS05 0216 CE36 ^10 MOS05 0189 CE0F 10 04 BPL SSCRUE ;Wraparound ? MOS05 0216 CE36 ^10 MOS05 0190 CE11 38 SEC ;Yes, then correct and scroll slowly MOS05 0216 CE36 ^10 MOS05 0191 CE12 ED 54 03 SBC BYTSCN MOS05 0216 CE36 ^10 MOS05 0192 CE15 85 DB SSCRUE STA ZTEMP +&01 ;Transmit address MOS05 0216 CE36 ^10 MOS05 0193 CE17 86 DA STX ZTEMP MOS05 0216 CE36 ^10 MOS05 0194 CE19 85 DC STA ZTEMPB ;MSB of next receive addr., LSB is preserved MOS05 0216 CE36 ^10 MOS05 0195 CE1B [ MOS125 = &FF MOS05 0216 CE36 ^10 MOS05 0202 CE1B | MOS05 0216 CE36 ^10 MOS05 0203 CE1B B0 0A BCS SSCRUC ;(c unchanged since just after SSCRUA) MOS05 0216 CE36 ^10 MOS05 0204 CE1D 20 B1 CA SSCRUB JSR ADDROW ;Get next line down MOS05 0216 CE36 ^10 MOS05 0205 CE20 30 05 BMI SSCRUC ;Wraparound ?, then scroll slowly to be safe MOS05 0216 CE36 ^10 MOS05 0206 CE22 20 38 CE JSR XMIT ;No?, then we can scroll fast MOS05 0216 CE36 ^10 MOS05 0207 CE25 F0 03 BEQ SSCRUD ;xmit returns EQ MOS05 0216 CE36 ^10 MOS05 0208 CE27 20 73 CE SSCRUC JSR SSCRS ;Scroll slowly MOS05 0216 CE36 ^10 MOS05 0209 CE2A ] MOS05 0216 CE36 ^10 MOS05 0210 CE2A A5 DC SSCRUD LDA ZTEMPB ;Load next receive address MOS05 0216 CE36 ^10 MOS05 0211 CE2C A6 DA LDX ZTEMP MOS05 0216 CE36 ^10 MOS05 0212 CE2E 85 D9 STA ZMEMT +&01 ;and store it MOS05 0216 CE36 ^10 MOS05 0213 CE30 86 D8 STX ZMEMT MOS05 0216 CE36 ^10 MOS05 0214 CE32 C6 DE DEC ZTEMPC ;any more lines to copy ? MOS05 0216 CE36 ^10 MOS05 0215 CE34 D0 D6 BNE SSCRUA ;don't bother with the last line MOS05 0216 CE36 ^10 MOS05 0216 CE36 F0 90 BEQ SSCREX ; Jump always -- MOS05 0217 CE38 -- MOS05 0218 CE38 ;XMIT - Fast soft scroll -- MOS05 0219 CE38 ;Copy PWWDTH bytes from (ZTEMP) to (ZMEMT) -- MOS05 0220 CE38 -- MOS05 0221 CE38 AE 4D 03 XMIT LDX PWWDTH +&01 ;How many pages? -- MOS05 0222 CE3B F0 10 BEQ XMITB ;None?, then attempt fractional MOS05 0222 CE3B v6F MOS05 0223 CE3D A0 00 LDYIM &00 MOS05 0222 CE3B v6F MOS05 0224 CE3F B1 DA XMITA LDAIY ZTEMP ;Inner loop - copy complete page MOS05 0222 CE3B v6F MOS05 0225 CE41 91 D8 STAIY ZMEMT MOS05 0222 CE3B v6F MOS05 0226 CE43 C8 INY MOS05 0222 CE3B v6F MOS05 0227 CE44 D0 F9 BNE XMITA MOS05 0222 CE3B v6F MOS05 0228 CE46 E6 D9 INC ZMEMT +&01 ;Prepare to copy next page MOS05 0222 CE3B v6F MOS05 0229 CE48 E6 DB INC ZTEMP +&01 MOS05 0222 CE3B v6F MOS05 0230 CE4A CA DEX ;Any more complete pages to copy ? MOS05 0222 CE3B v6F MOS05 0231 CE4B D0 F2 BNE XMITA MOS05 0222 CE3B v6F MOS05 0232 CE4D AC 4C 03 XMITB LDY PWWDTH ;Copy fractional page? -- MOS05 0233 CE50 F0 08 BEQ XMITD ;No?, then exit MOS05 0233 CE50 v77 MOS05 0234 CE52 88 XMITC DEY MOS05 0233 CE50 v77 MOS05 0235 CE53 B1 DA LDAIY ZTEMP ;Yes?, then do so MOS05 0233 CE50 v77 MOS05 0236 CE55 91 D8 STAIY ZMEMT MOS05 0233 CE50 v77 MOS05 0237 CE57 98 TYA MOS05 0233 CE50 v77 MOS05 0238 CE58 D0 F8 BNE XMITC MOS05 0233 CE50 v77 MOS05 0239 CE5A 60 XMITD RTS ;Referenced below -- MOS05 0240 CE5B -- MOS05 0241 CE5B ;SSCRIN Soft scroll initialisation -- MOS05 0242 CE5B -- MOS05 0243 CE5B ;(SSWS) := (CSX)(CSY) -- MOS05 0244 CE5B ;(CSX) := (TWLCOL) -- MOS05 0245 CE5B ;(ZTEMPC) := No. of rows to scroll, minus one -- MOS05 0246 CE5B -- MOS05 0247 CE5B 20 C8 CD SSCRIN JSR SSCREX ;Store current text cursor for future reference -- MOS05 0248 CE5E 38 SEC ;Determine no. of rows to scroll -- MOS05 0249 CE5F AD 09 03 LDA TWBROW ;i.e. no. rows in window minus 1 -- MOS05 0250 CE62 ED 0B 03 SBC TWTROW -- MOS05 0251 CE65 85 DE STA ZTEMPC -- MOS05 0252 CE67 D0 05 BNE SSCRIM MOS05 0252 CE67 v7A MOS05 0253 CE69 68 PLA ;If zero lines to scroll, then cheat stack MOS05 0252 CE67 v7A MOS05 0254 CE6A 68 PLA MOS05 0252 CE67 v7A MOS05 0255 CE6B 4C C8 CD JMP SSCREX ;& restore cursor MOS05 0252 CE67 v7A MOS05 0256 CE6E MOS05 0252 CE67 v7A MOS05 0257 CE6E AD 08 03 SSCRIM LDA TWLCOL ;Put x cursor on LH margin -- MOS05 0258 CE71 10 70 BPL CLTLND MOS05 0258 CE71 v0F MOS05 0259 CE73 MOS05 0258 CE71 v0F MOS05 0260 CE73 MOS05 0258 CE71 v0F MOS05 0261 CE73 ;SSCRS Slow soft scroll MOS05 0258 CE71 v0F MOS05 0262 CE73 ;Scrolls 1 row of characters, one by one from (ZTEMP) to (ZMEMT), MOS05 0258 CE71 v0F MOS05 0263 CE73 ;preserving the LSB of ZTEMP. MOS05 0258 CE71 v0F MOS05 0264 CE73 ;Requires that ZMEMT & ZTEMP be juxtaposed. MOS05 0258 CE71 v0F MOS05 0265 CE73 ;Checks for wraparound after each character is copied MOS05 0258 CE71 v0F MOS05 0266 CE73 MOS05 0258 CE71 v0F MOS05 0267 CE73 A5 DA SSCRS LDA ZTEMP ;Push LSB of ZTEMP MOS05 0258 CE71 v0F MOS05 0268 CE75 48 PHA MOS05 0258 CE71 v0F MOS05 0269 CE76 38 SEC ;Calc no. chars to copy -1 MOS05 0258 CE71 v0F MOS05 0270 CE77 AD 0A 03 LDA TWRCOL MOS05 0258 CE71 v0F MOS05 0271 CE7A ED 08 03 SBC TWLCOL MOS05 0258 CE71 v0F MOS05 0272 CE7D 85 DF STA ZTEMPC +&01 ;No. of columns to be scrolled (for loop) MOS05 0258 CE71 v0F MOS05 0273 CE7F AC 4F 03 SSCRSA LDY BYTCH MOS05 0258 CE71 v0F MOS05 0274 CE82 88 DEY MOS05 0258 CE71 v0F MOS05 0275 CE83 B1 DA SSCRSB LDAIY ZTEMP ;~~~ Copy 1 character ~~~ MOS05 0258 CE71 v0F MOS05 0276 CE85 91 D8 STAIY ZMEMT ;by copying (BYTCH) consecutive bytes MOS05 0258 CE71 v0F MOS05 0277 CE87 88 DEY MOS05 0258 CE71 v0F MOS05 0278 CE88 10 F9 BPL SSCRSB MOS05 MOS05 MOS05 MOS05 Acorn macro assembler Page 25 MOS05 VDU File - MOS05 MOS05 MOS05 0258 CE71 v0F MOS05 0279 CE8A A2 02 LDXIM &02 ;Now add BYTCH to ZMEMT & ZTEMP, MOS05 0258 CE71 v0F MOS05 0280 CE8C 18 SSCRSC CLC ;checking for wraparound on both MOS05 0258 CE71 v0F MOS05 0281 CE8D B5 D8 LDAZX ZMEMT ;uses ZX mode, hence need for ZMEMT to be next to ZTEMP MOS05 0258 CE71 v0F MOS05 0282 CE8F 6D 4F 03 ADC BYTCH MOS05 0258 CE71 v0F MOS05 0283 CE92 95 D8 STAZX ZMEMT MOS05 0258 CE71 v0F MOS05 0284 CE94 B5 D9 LDAZX ZMEMT +&01 MOS05 0258 CE71 v0F MOS05 0285 CE96 69 00 ADCIM &00 MOS05 0258 CE71 v0F MOS05 0286 CE98 10 04 BPL SSCRSD ;Did wraparound occur? MOS05 0258 CE71 v0F MOS05 0287 CE9A 38 SEC MOS05 0258 CE71 v0F MOS05 0288 CE9B ED 54 03 SBC BYTSCN MOS05 0258 CE71 v0F MOS05 0289 CE9E 95 D9 SSCRSD STAZX ZMEMT +&01 MOS05 0258 CE71 v0F MOS05 0290 CEA0 CA DEX MOS05 0258 CE71 v0F MOS05 0291 CEA1 CA DEX MOS05 0258 CE71 v0F MOS05 0292 CEA2 F0 E8 BEQ SSCRSC ;(Do ZMEMT) MOS05 0258 CE71 v0F MOS05 0293 CEA4 C6 DF DEC ZTEMPC +&01 ;Any more characters? MOS05 0258 CE71 v0F MOS05 0294 CEA6 10 D7 BPL SSCRSA MOS05 0258 CE71 v0F MOS05 0295 CEA8 68 PLA ;Restore LSB of ZMEMT MOS05 0258 CE71 v0F MOS05 0296 CEA9 85 DA STA ZTEMP MOS05 0258 CE71 v0F MOS05 0297 CEAB 60 RTS MOS05 0258 CE71 v0F MOS05 0298 CEAC MOS05 0258 CE71 v0F MOS05 0299 CEAC ;Clear the line of text addressed by CSY MOS05 0258 CE71 v0F MOS05 0300 CEAC ;Preserve CSY & CSX MOS05 0258 CE71 v0F MOS05 0301 CEAC MOS05 0258 CE71 v0F MOS05 0302 CEAC AD 18 03 CLTLIN LDA CSX ;Push the current X cursor position MOS05 0258 CE71 v0F MOS05 0303 CEAF 48 PHA MOS05 0258 CE71 v0F MOS05 0304 CEB0 20 6E CE JSR SSCRIM ;CSX = Left margin of window MOS05 0258 CE71 v0F MOS05 0305 CEB3 20 09 CF JSR TADDRY ;Init. ZMEMT MOS05 0258 CE71 v0F MOS05 0306 CEB6 38 SEC MOS05 0258 CE71 v0F MOS05 0307 CEB7 AD 0A 03 LDA TWRCOL MOS05 0258 CE71 v0F MOS05 0308 CEBA ED 08 03 SBC TWLCOL MOS05 0258 CE71 v0F MOS05 0309 CEBD 85 DC STA ZTEMPB ;Column count MOS05 0258 CE71 v0F MOS05 0310 CEBF AD 58 03 CLTLNA LDA BTCOLF ;get colour MOS05 0258 CE71 v0F MOS05 0311 CEC2 AC 4F 03 LDY BYTCH ;Bytes / character MOS05 0258 CE71 v0F MOS05 0312 CEC5 88 CLTNB DEY ;Inner loop - clear one character cell MOS05 0258 CE71 v0F MOS05 0313 CEC6 91 D8 STAIY ZMEMT ;(preserves z from previous DEY) MOS05 0258 CE71 v0F MOS05 0314 CEC8 D0 FB BNE CLTNB ;1 char cell MOS05 0258 CE71 v0F MOS05 0315 CECA 8A TXA ;Update ZMEMT MOS05 0258 CE71 v0F MOS05 0316 CECB 18 CLC MOS05 0258 CE71 v0F MOS05 0317 CECC 6D 4F 03 ADC BYTCH MOS05 0258 CE71 v0F MOS05 0318 CECF AA TAX MOS05 0258 CE71 v0F MOS05 0319 CED0 A5 D9 LDA ZMEMT +&01 MOS05 0258 CE71 v0F MOS05 0320 CED2 69 00 ADCIM &00 MOS05 0258 CE71 v0F MOS05 0321 CED4 10 04 BPL CLNLC ;Wraparound ? MOS05 0258 CE71 v0F MOS05 0322 CED6 38 SEC ;Yes, then subtract off the number of bytes per screen MOS05 0258 CE71 v0F MOS05 0323 CED7 ED 54 03 SBC BYTSCN MOS05 0258 CE71 v0F MOS05 0324 CEDA 86 D8 CLNLC STX ZMEMT MOS05 0258 CE71 v0F MOS05 0325 CEDC 85 D9 STA ZMEMT +&01 MOS05 0258 CE71 v0F MOS05 0326 CEDE C6 DC DEC ZTEMPB ;One less character to clear MOS05 0258 CE71 v0F MOS05 0327 CEE0 10 DD BPL CLTLNA ;Any more? MOS05 0258 CE71 v0F MOS05 0328 CEE2 68 PLA MOS05 0258 CE71 v0F MOS05 0329 CEE3 8D 18 03 CLTLND STA CSX -- MOS05 0330 CEE6 38 FAIL SEC MOS05 0368 CF07 ^5D MOS05 0331 CEE7 60 RTS MOS05 0368 CF07 ^5D MOS05 0332 CEE8 MOS05 0368 CF07 ^5D MOS05 0333 CEE8 MOS05 0368 CF07 ^5D MOS05 0334 CEE8 ;Addresses CSX,CSY to memory locn. on screen. MOS05 0368 CF07 ^5D MOS05 0335 CEE8 ;Checks that CSX & CSY are in window MOS05 0368 CF07 ^5D MOS05 0336 CEE8 ;Returns with no action and c=1 if outside. MOS05 0368 CF07 ^5D MOS05 0337 CEE8 ;If OK, initialises ZMEMT and CSPOSN MOS05 0368 CF07 ^5D MOS05 0338 CEE8 ;Exits with cursor address in (AX) MOS05 0368 CF07 ^5D MOS05 0339 CEE8 ;For cursor display, follow immediately with MOS05 0368 CF07 ^5D MOS05 0340 CEE8 ;JSR CSDSP MOS05 0368 CF07 ^5D MOS05 0341 CEE8 MOS05 0368 CF07 ^5D MOS05 0342 CEE8 [ MOS125 = &FF MOS05 0368 CF07 ^5D MOS05 0355 CEE8 | MOS05 0368 CF07 ^5D MOS05 0356 CEE8 8D 19 03 SYTADD STA CSY MOS05 0368 CF07 ^5D MOS05 0357 CEEB AE 18 03 TADDR LDX CSX ;Check window of CSX MOS05 0368 CF07 ^5D MOS05 0358 CEEE EC 08 03 CPX TWLCOL ;Lower than LH margin ? MOS05 0368 CF07 ^5D MOS05 0359 CEF1 90 F3 BCC FAIL MOS05 0368 CF07 ^5D MOS05 0360 CEF3 EC 0A 03 CPX TWRCOL ;Higher than RH edge ? MOS05 0368 CF07 ^5D MOS05 0361 CEF6 F0 02 BEQ TADDRX MOS05 0368 CF07 ^5D MOS05 0362 CEF8 B0 EC BCS FAIL MOS05 0368 CF07 ^5D MOS05 0363 CEFA AE 19 03 TADDRX LDX CSY ;Check CSY MOS05 0368 CF07 ^5D MOS05 0364 CEFD EC 0B 03 CPX TWTROW MOS05 0368 CF07 ^5D MOS05 0365 CF00 90 E4 BCC FAIL MOS05 0368 CF07 ^5D MOS05 0366 CF02 EC 09 03 CPX TWBROW MOS05 0368 CF07 ^5D MOS05 0367 CF05 F0 02 BEQ TADDRY MOS05 0368 CF07 ^5D MOS05 0368 CF07 B0 DD BCS FAIL MOS05 0367 CF05 v7D MOS05 0369 CF09 ] MOS05 0367 CF05 v7D MOS05 0370 CF09 MOS05 0367 CF05 v7D MOS05 0371 CF09 ;End of windowing, now calc. memory posn. MOS05 0367 CF05 v7D MOS05 0372 CF09 ;As TADDR with no bounds checking MOS05 0367 CF05 v7D MOS05 0373 CF09 ;Returns carry clear MOS05 0367 CF05 v7D MOS05 0374 CF09 MOS05 0367 CF05 v7D MOS05 0375 CF09 AD 19 03 TADDRY LDA CSY ;Twice row no. to Y -- MOS05 0376 CF0C 0A ASLA -- MOS05 0377 CF0D A8 TAY ;(c=0 at this point) -- MOS05 0378 CF0E B1 E0 LDAIY ZTBL ;MSB -- MOS05 0379 CF10 85 D9 STA ZMEMT+&01 -- MOS05 0380 CF12 C8 INY -- MOS05 0381 CF13 A9 02 LDAIM &02 -- MOS05 0382 CF15 2D 56 03 AND MEMODE ;Non-zero if table offset is to be halved -- MOS05 0383 CF18 08 PHP -- MOS05 0384 CF19 B1 E0 LDAIY ZTBL ;LSB -- MOS05 0385 CF1B 28 PLP -- MOS05 0386 CF1C F0 03 BEQ TADDRH MOS05 0386 CF1C v7C MOS05 0387 CF1E 46 D9 LSR ZMEMT+&01 MOS05 0386 CF1C v7C MOS05 0388 CF20 6A RORA MOS05 0386 CF1C v7C MOS05 0389 CF21 6D 50 03 TADDRH ADC TOPSCN ;c=0 Add LSB -- MOS05 0390 CF24 85 D8 STA ZMEMT -- MOS05 0391 CF26 A5 D9 LDA ZMEMT+&01 ;Add MSB -- MOS05 0392 CF28 6D 51 03 ADC TOPSCN+&01 -- MOS05 0393 CF2B A8 TAY ;Xfr MSB to Y -- MOS05 0394 CF2C ;Mpy. CSX by BYTCH -- MOS05 0395 CF2C AD 18 03 LDA CSX -- MOS05 0396 CF2F AE 4F 03 LDX BYTCH ;Is it TTX ? -- MOS05 0397 CF32 CA DEX -- MOS05 0398 CF33 F0 12 BEQ TADDRE ;Skip mult. if TTX MOS05 0398 CF33 v6D MOS05 0399 CF35 E0 0F CPXIM &0F ;4 colour (16 bytes) ? MOS05 0398 CF33 v6D MOS05 0400 CF37 F0 03 BEQ TADDRF MOS05 0398 CF33 v6D MOS05 0401 CF39 90 02 BCC TADDRG ;Less ? Then 2 colour MOS05 0398 CF33 v6D MOS05 0402 CF3B 0A ASLA ;Must have been 16 colour MOS05 0398 CF33 v6D MOS05 0403 CF3C 0A TADDRF ASLA ;4 colour MOS05 0398 CF33 v6D MOS05 0404 CF3D 0A TADDRG ASLA ;2 colour MOS05 0398 CF33 v6D MOS05 0405 CF3E 0A ASLA MOS05 0398 CF33 v6D MOS05 0406 CF3F 90 02 BCC TADDRB MOS05 0398 CF33 v6D MOS05 0407 CF41 C8 INY ;c=1?, then inc. MSB by 2 MOS05 0398 CF33 v6D MOS05 0408 CF42 C8 INY MOS05 0398 CF33 v6D MOS05 0409 CF43 0A TADDRB ASLA MOS05 0398 CF33 v6D MOS05 0410 CF44 90 02 BCC TADDRC MOS05 0398 CF33 v6D MOS05 0411 CF46 C8 INY ;c=1, then inc. MSB by 1 MOS05 MOS05 MOS05 MOS05 Acorn macro assembler Page 26 MOS05 VDU File - MOS05 MOS05 MOS05 0398 CF33 v6D MOS05 0412 CF47 18 TADDRE CLC MOS05 0410 CF44 v7D MOS05 0413 CF48 65 D8 TADDRC ADC ZMEMT ;(c=0), add LSB of row offset -- MOS05 0414 CF4A 85 D8 STA ZMEMT -- MOS05 0415 CF4C 8D 4A 03 STA CSPOSN -- MOS05 0416 CF4F AA TAX ;LSB is returned by this routine in X -- MOS05 0417 CF50 98 TYA ;MSB to A -- MOS05 0418 CF51 69 00 ADCIM &00 -- MOS05 0419 CF53 8D 4B 03 STA CSPOSN +&01 ;Store to cursor before wraparound -- MOS05 0420 CF56 10 04 BPL TADDRD ;Wraparound ? MOS05 0420 CF56 v7B MOS05 0421 CF58 38 SEC ;Yes, then subt. scn. MOS05 0420 CF56 v7B MOS05 0422 CF59 ED 54 03 SBC BYTSCN MOS05 0420 CF56 v7B MOS05 0423 CF5C 85 D9 TADDRD STA ZMEMT +&01 ;Store physical address to ZMEMT -- MOS05 0424 CF5E 18 CLC ;indicate successful addressing -- MOS05 0425 CF5F 60 RTS -- MOS05 0426 CF60 -- MOS05 0427 CF60 ;PRINT CHARACTER TO VDU -- MOS05 0428 CF60 -- MOS05 0429 CF60 -- MOS05 0430 CF60 -- MOS05 0431 CF60 -- MOS05 0432 CF60 ;ANOMALOUS PRINTING -- MOS05 0433 CF60 -- MOS05 0434 CF60 AE 59 03 PRANM LDX FGCOLF ;Printing to be in foreground graphics colour MOS05 0507 CFB6 ^28 MOS05 0435 CF63 AC 5B 03 LDY GPLFMD ;In the current foreground colour mode MOS05 0507 CFB6 ^28 MOS05 0436 CF66 20 C5 D0 PRANC JSR SETZG ;Initialise ZGORA & ZGEOR MOS05 0543 CFD6 ^0E MOS05 0437 CF69 MOS05 0543 CFD6 ^0E MOS05 0438 CF69 ;The graphics cursor is copied to 2 locations, APCS1 MOS05 0543 CFD6 ^0E MOS05 0439 CF69 ;and APCS2 . The latter is left untouched until the end of the printing, MOS05 0543 CFD6 ^0E MOS05 0440 CF69 ;when it is restored to the GCSIY. The former is copied to the GCSIY MOS05 0543 CFD6 ^0E MOS05 0441 CF69 ;after every column of pixels is printed, with the X cursor incremented MOS05 0543 CFD6 ^0E MOS05 0442 CF69 ;each time. MOS05 0543 CFD6 ^0E MOS05 0443 CF69 MOS05 0543 CFD6 ^0E MOS05 0444 CF69 20 3D D4 JSR COPYFA ;Copy GCSIY to APCS2 ... MOS05 0543 CFD6 ^0E MOS05 0445 CF6C A0 00 LDYIM &00 ;Initialise row counter MOS05 0543 CFD6 ^0E MOS05 0446 CF6E 84 DC PRANMC STY ZTEMPB MOS05 0543 CFD6 ^0E MOS05 0447 CF70 [ MOS125 = &FF MOS05 0543 CFD6 ^0E MOS05 0449 CF70 ] MOS05 0543 CFD6 ^0E MOS05 0450 CF70 B1 DE LDAIY ZTEMPC ;Anything to do ? MOS05 0543 CFD6 ^0E MOS05 0451 CF72 F0 13 BEQ PRANMG ;No, then skip MOS05 0543 CFD6 ^0E MOS05 0452 CF74 85 DD STA ZTEMPB +&01 MOS05 0543 CFD6 ^0E MOS05 0453 CF76 10 03 PRANMA BPL PRANMD MOS05 0543 CFD6 ^0E MOS05 0454 CF78 20 F5 D0 JSR WPLOTA ;Yes, then plot if inside window MOS05 0543 CFD6 ^0E MOS05 0455 CF7B EE 24 03 PRANMD INC GCSIX ;Increment X cursor MOS05 0543 CFD6 ^0E MOS05 0456 CF7E D0 03 BNE PRANME MOS05 0543 CFD6 ^0E MOS05 0457 CF80 EE 25 03 INC GCSIX +&01 MOS05 0543 CFD6 ^0E MOS05 0458 CF83 06 DD PRANME ASL ZTEMPB +&01 MOS05 0543 CFD6 ^0E MOS05 0459 CF85 D0 EF BNE PRANMA MOS05 0543 CFD6 ^0E MOS05 0460 CF87 A2 28 PRANMG LDXIM APCS1-V ;Restore previous x cursor MOS05 0543 CFD6 ^0E MOS05 0461 CF89 A0 24 LDYIM GCSIR-V MOS05 0543 CFD6 ^0E MOS05 0462 CF8B 20 39 D4 JSR COPY2 MOS05 0543 CFD6 ^0E MOS05 0463 CF8E AC 26 03 LDY GCSIY ;Decrement Igraphics Y cursor MOS05 0543 CFD6 ^0E MOS05 0464 CF91 D0 03 BNE PRANMF MOS05 0543 CFD6 ^0E MOS05 0465 CF93 CE 27 03 DEC GCSIY +&01 MOS05 0543 CFD6 ^0E MOS05 0466 CF96 CE 26 03 PRANMF DEC GCSIY MOS05 0543 CFD6 ^0E MOS05 0467 CF99 A4 DC LDY ZTEMPB ;Do next row MOS05 0543 CFD6 ^0E MOS05 0468 CF9B C8 INY MOS05 0543 CFD6 ^0E MOS05 0469 CF9C C0 08 CPYIM &08 MOS05 0543 CFD6 ^0E MOS05 0470 CF9E D0 CE BNE PRANMC MOS05 0543 CFD6 ^0E MOS05 0471 CFA0 A2 28 LDXIM APCS1 ;Finished, so restore grpahics cursor MOS05 0543 CFD6 ^0E MOS05 0472 CFA2 A0 24 LDYIM GCSIR-V MOS05 0543 CFD6 ^0E MOS05 0473 CFA4 4C 41 D4 JMP COPYF ; (branch always taken) MOS05 0543 CFD6 ^0E MOS05 0474 CFA7 MOS05 0543 CFD6 ^0E MOS05 0475 CFA7 [ MOS125 = &FF MOS05 0543 CFD6 ^0E MOS05 0491 CFA7 ] MOS05 0543 CFD6 ^0E MOS05 0492 CFA7 MOS05 0543 CFD6 ^0E MOS05 0493 CFA7 ;NON-ANOMALOUS MOS05 0543 CFD6 ^0E MOS05 0494 CFA7 MOS05 0543 CFD6 ^0E MOS05 0495 CFA7 ;Character to be printed in (A) MOS05 0543 CFD6 ^0E MOS05 0496 CFA7 MOS05 0543 CFD6 ^0E MOS05 0497 CFA7 ;Set up address of bytes to be MOS05 0543 CFD6 ^0E MOS05 0498 CFA7 ;copied from soft font. Result MOS05 0543 CFD6 ^0E MOS05 0499 CFA7 ;to ZTEMP MOS05 0543 CFD6 ^0E MOS05 0500 CFA7 MOS05 0543 CFD6 ^0E MOS05 0501 CFA7 AE 60 03 VDUPR LDX NCOLOR ;TTX? MOS05 0543 CFD6 ^0E MOS05 0502 CFAA F0 44 BEQ PTTX MOS05 0543 CFD6 ^0E MOS05 0503 CFAC 20 50 D0 JSR CHADDR ;Point (ZTEMPC) to character in soft font MOS05 0543 CFD6 ^0E MOS05 0504 CFAF AE 60 03 VDUPRB LDX NCOLOR ;Because CHADDR now destroys (X) MOS05 0543 CFD6 ^0E MOS05 0505 CFB2 A5 D0 LDA STATS ;Is this anomalous printing ? MOS05 0543 CFD6 ^0E MOS05 0506 CFB4 29 20 ANDIM &20 MOS05 0543 CFD6 ^0E MOS05 0507 CFB6 D0 A8 BNE PRANM ;Anom. printing MOS05 0543 CFD6 ^0E MOS05 0508 CFB8 MOS05 0543 CFD6 ^0E MOS05 0509 CFB8 ;Now select the mode MOS05 0543 CFD6 ^0E MOS05 0510 CFB8 MOS05 0543 CFD6 ^0E MOS05 0511 CFB8 A0 07 LDYIM &07 ;No. rows (except TTX) MOS05 0543 CFD6 ^0E MOS05 0512 CFBA E0 03 CPXIM &03 MOS05 0543 CFD6 ^0E MOS05 0513 CFBC F0 47 BEQ PFOUR ;4 colour mode ? MOS05 0543 CFD6 ^0E MOS05 0514 CFBE B0 71 BCS PSXTN ;16 colour mode ? MOS05 0514 CFBE v0E MOS05 0515 CFC0 MOS05 0514 CFBE v0E MOS05 0516 CFC0 ;TWO colour mode MOS05 0514 CFBE v0E MOS05 0517 CFC0 MOS05 0514 CFBE v0E MOS05 0518 CFC0 B1 DE PTWO LDAIY ZTEMPC MOS05 0514 CFBE v0E MOS05 0519 CFC2 05 D2 ORA ZORA MOS05 0514 CFBE v0E MOS05 0520 CFC4 45 D3 EOR ZEOR MOS05 0514 CFBE v0E MOS05 0521 CFC6 91 D8 STAIY ZMEMT MOS05 0514 CFBE v0E MOS05 0522 CFC8 88 DEY MOS05 0514 CFBE v0E MOS05 0523 CFC9 10 F5 BPL PTWO MOS05 0514 CFBE v0E MOS05 0524 CFCB 60 RTS MOS05 0514 CFBE v0E MOS05 0525 CFCC MOS05 0514 CFBE v0E MOS05 0526 CFCC ;TELETEXT mode MOS05 0514 CFBE v0E MOS05 0527 CFCC MOS05 0514 CFBE v0E MOS05 0528 CFCC [ MOS125 = &FF MOS05 0514 CFBE v0E MOS05 0538 CFCC | MOS05 0514 CFBE v0E MOS05 0539 CFCC A9 7F DELA LDAIM &7F ;Point to DEL, only unprintable char. in hard font =$FF...$FF MOS05 0514 CFBE v0E MOS05 0540 CFCE 20 50 D0 JSR CHADDR MOS05 0514 CFBE v0E MOS05 0541 CFD1 AE 5A 03 LDX BGCOLF ;Force this to be graphics background colour MOS05 0514 CFBE v0E MOS05 0542 CFD4 A0 00 LDYIM &00 ;Mode is STORE MOS05 0514 CFBE v0E MOS05 0543 CFD6 F0 8E BEQ PRANC MOS05 0514 CFBE v0E MOS05 0544 CFD8 MOS05 0514 CFBE v0E MOS05 0545 CFD8 ;DEL ($7F) Delete previous char MOS05 0514 CFBE v0E MOS05 0546 CFD8 MOS05 0514 CFBE v0E MOS05 0547 CFD8 20 C4 C5 DEL JSR BS ;Move back 1 character MOS05 0514 CFBE v0E MOS05 0548 CFDB 20 87 C5 JSR ANOMQ MOS05 0514 CFBE v0E MOS05 0549 CFDE D0 EC BNE DELA MOS05 0514 CFBE v0E MOS05 0550 CFE0 AE 60 03 LDX NCOLOR MOS05 0514 CFBE v0E MOS05 0551 CFE3 F0 08 BEQ PTTXSP ;TTX space MOS05 0514 CFBE v0E MOS05 0552 CFE5 85 DE STA ZTEMPC ;(A)=0 from ANOMQ MOS05 0514 CFBE v0E MOS05 0553 CFE7 A9 C0 LDAIM HFMSB +&01 ;Point to hard font version of space MOS05 0514 CFBE v0E MOS05 0554 CFE9 85 DF STA ZTEMPC +&01 MOS05 0514 CFBE v0E MOS05 0555 CFEB D0 C2 BNE VDUPRB ;always branch MOS05 0514 CFBE v0E MOS05 0556 CFED MOS05 0514 CFBE v0E MOS05 0557 CFED A9 20 PTTXSP LDAIM &20 ;Print TTX space MOS05 MOS05 MOS05 MOS05 Acorn macro assembler Page 27 MOS05 VDU File - MOS05 MOS05 MOS05 0514 CFBE v0E MOS05 0558 CFEF 38 SEC ;write to screen MOS05 0514 CFBE v0E MOS05 0559 CFF0 PTTX ;C=1 from NOTCEA->VDUPR MOS05 0514 CFBE v0E MOS05 0560 CFF0 TTXFRM ;transform once for ASCII->Teletext, twice for Teletext->ASCII MOS05 0514 CFBE v0E MOS05 0561 CFF0 49 23 EORIM &23 ;is character ASCII &23, hash? MOS05 0514 CFBE v0E MOS05 0562 CFF2 F0 04 BEQ PTTX5F ;then replace with Teletext &5F MOS05 0514 CFBE v0E MOS05 0563 CFF4 49 7C PTTX23 EORIM &23:EOR:&5F ;else is it ASCII &5F, underscore? MOS05 0514 CFBE v0E MOS05 0564 CFF6 F0 04 BEQ PTTX60 ;then replace with Teletext &60 MOS05 0514 CFBE v0E MOS05 0565 CFF8 49 3F PTTX5F EORIM &5F:EOR:&60 ;else is it ASCII &60, sterling? MOS05 0514 CFBE v0E MOS05 0566 CFFA F0 F8 BEQ PTTX23 ;then replace with Teletext &23 (won't loop!) MOS05 0514 CFBE v0E MOS05 0567 CFFC 49 60 PTTX60 EORIM &60 ;else undo our fiddling MOS05 0514 CFBE v0E MOS05 0568 CFFE 90 02 BCC PTTXC ;if C=0 then transform only else C=1, write to screen MOS05 0514 CFBE v0E MOS05 0569 D000 81 D8 STAIX ZMEMT ;as (X)=0 MOS05 0514 CFBE v0E MOS05 0570 D002 PTTXC MOS05 0514 CFBE v0E MOS05 0571 D002 60 RTS MOS05 0514 CFBE v0E MOS05 0572 D003 ] MOS05 0514 CFBE v0E MOS05 0573 D003 MOS05 0514 CFBE v0E MOS05 0574 D003 ;FOUR colour mode MOS05 0514 CFBE v0E MOS05 0575 D003 MOS05 0514 CFBE v0E MOS05 0576 D003 [ MOS125 = &FF MOS05 0514 CFBE v0E MOS05 0603 D003 | MOS05 0514 CFBE v0E MOS05 0604 D003 A8 PFOURA TAY MOS05 0514 CFBE v0E MOS05 0605 D004 88 DEY MOS05 0514 CFBE v0E MOS05 0606 D005 B1 DE PFOUR LDAIY ZTEMPC ;Get bit pattern MOS05 0514 CFBE v0E MOS05 0607 D007 48 PHA ;Push for L.S.Nybble MOS05 0514 CFBE v0E MOS05 0608 D008 4A LSRA MOS05 0514 CFBE v0E MOS05 0609 D009 4A LSRA MOS05 0514 CFBE v0E MOS05 0610 D00A 4A LSRA MOS05 0514 CFBE v0E MOS05 0611 D00B 4A LSRA MOS05 0514 CFBE v0E MOS05 0612 D00C AA TAX MOS05 0514 CFBE v0E MOS05 0613 D00D BD 1F C3 LDAAX BPFTB ;Get expanded patten MOS05 0514 CFBE v0E MOS05 0614 D010 05 D2 ORA ZORA ;of M.S.Nybble MOS05 0514 CFBE v0E MOS05 0615 D012 45 D3 EOR ZEOR MOS05 0514 CFBE v0E MOS05 0616 D014 91 D8 STAIY ZMEMT MOS05 0514 CFBE v0E MOS05 0617 D016 ; same size, reduce stack load MOS05 0514 CFBE v0E MOS05 0618 D016 68 PLA ;Get L.S.Nybble MOS05 0514 CFBE v0E MOS05 0619 D017 29 0F ANDIM &0F MOS05 0514 CFBE v0E MOS05 0620 D019 AA TAX MOS05 0514 CFBE v0E MOS05 0621 D01A 98 TYA MOS05 0514 CFBE v0E MOS05 0622 D01B 49 08 EORIM &08 ;Access next char. cell MOS05 0514 CFBE v0E MOS05 0623 D01D A8 TAY MOS05 0514 CFBE v0E MOS05 0624 D01E BD 1F C3 LDAAX BPFTB MOS05 0514 CFBE v0E MOS05 0625 D021 05 D2 ORA ZORA MOS05 0514 CFBE v0E MOS05 0626 D023 45 D3 EOR ZEOR MOS05 0514 CFBE v0E MOS05 0627 D025 91 D8 STAIY ZMEMT MOS05 0514 CFBE v0E MOS05 0628 D027 98 TYA MOS05 0514 CFBE v0E MOS05 0629 D028 49 08 EORIM &08 MOS05 0514 CFBE v0E MOS05 0630 D02A D0 D7 BNE PFOURA MOS05 0514 CFBE v0E MOS05 0631 D02C ] MOS05 0514 CFBE v0E MOS05 0632 D02C 60 PSXTC RTS ;Also used by PSXTN MOS05 0514 CFBE v0E MOS05 0633 D02D MOS05 0514 CFBE v0E MOS05 0634 D02D ;SIXTEEN colour mode MOS05 0514 CFBE v0E MOS05 0635 D02D MOS05 0514 CFBE v0E MOS05 0636 D02D [ MOS125 = &FF MOS05 0514 CFBE v0E MOS05 0661 D02D | MOS05 0514 CFBE v0E MOS05 0662 D02D PSXTB ;Ref.the 1st cell again MOS05 0514 CFBE v0E MOS05 0663 D02D F0 FD BEQ PSXTC ;Finished ? MOS05 0514 CFBE v0E MOS05 0664 D02F A8 TAY ;No, then carry on .. MOS05 0514 CFBE v0E MOS05 0665 D030 88 DEY MOS05 0514 CFBE v0E MOS05 0666 D031 MOS05 0514 CFBE v0E MOS05 0667 D031 B1 DE PSXTN LDAIY ZTEMPC ;Get bit pattern MOS05 0680 D047 ^64 MOS05 0668 D033 0A PSXTA ASLA MOS05 0684 D04E ^63 MOS05 0669 D034 2A ROLA MOS05 0684 D04E ^63 MOS05 0670 D035 85 DC STA ZTEMPB MOS05 0684 D04E ^63 MOS05 0671 D037 29 01 ANDIM &01 MOS05 0684 D04E ^63 MOS05 0672 D039 2A ROLA ;(A)=next 2 bits MOS05 0684 D04E ^63 MOS05 0673 D03A AA TAX ;Get expanded bit pattern MOS05 0684 D04E ^63 MOS05 0674 D03B BD 2F C3 LDAAX BPSTB MOS05 0684 D04E ^63 MOS05 0675 D03E 05 D2 ORA ZORA MOS05 0684 D04E ^63 MOS05 0676 D040 45 D3 EOR ZEOR MOS05 0684 D04E ^63 MOS05 0677 D042 91 D8 STAIY ZMEMT MOS05 0684 D04E ^63 MOS05 0678 D044 98 TYA ;Access next char. cell MOS05 0684 D04E ^63 MOS05 0679 D045 E9 17 SBCIM &17 ;c=0, subtract $18 MOS05 0684 D04E ^63 MOS05 0680 D047 B0 E4 BCS PSXTB MOS05 0684 D04E ^63 MOS05 0681 D049 29 1F ANDIM &1F ;c=0 before & after MOS05 0684 D04E ^63 MOS05 0682 D04B A8 TAY MOS05 0684 D04E ^63 MOS05 0683 D04C A5 DC LDA ZTEMPB MOS05 0684 D04E ^63 MOS05 0684 D04E 90 E3 BCC PSXTA ;(branch always taken) -- MOS05 0685 D050 ] -- MOS05 0686 D050 -- MOS05 0687 D050 ;Addresses character in soft font. -- MOS05 0688 D050 ;Takes (ascii) value in A, multiplies by 8, adds appropriate font address -- MOS05 0689 D050 ;(assumed to be on page boudary), and puts result to ZTEMPC. -- MOS05 0690 D050 ;This addresses top row of character, subsequent rows being in the -- MOS05 0691 D050 ;following 7 bytes. -- MOS05 0692 D050 -- MOS05 0693 D050 [ MOS125 = &FF -- MOS05 0713 D050 | -- MOS05 0714 D050 0A CHADDR ASLA ;ZTEMPC:=8*CHAR. + MSB of font -- MOS05 0715 D051 2A ROLA -- MOS05 0716 D052 2A ROLA -- MOS05 0717 D053 AA TAX -- MOS05 0718 D054 29 F8 ANDIM &F8 -- MOS05 0719 D056 85 DE STA ZTEMPC ;Store LSB of addr. -- MOS05 0720 D058 8A TXA -- MOS05 0721 D059 29 03 ANDIM &03 ;Get page number of character -- MOS05 0722 D05B 2A ROLA -- MOS05 0723 D05C AA TAX -- MOS05 0724 D05D 29 03 ANDIM &03 -- MOS05 0725 D05F 69 BF ADCIM HFMSB ;MSB of hard font - overwrite if soft font (c=0 from last ROLA) -- MOS05 0726 D061 A8 TAY -- MOS05 0727 D062 BD 0D C4 LDAAX BITTBL ;Which bit in the flag byte is to be tested -- MOS05 0728 D065 2C 67 03 BIT FNTFLG ;Test to see if soft or hard font -- MOS05 0729 D068 F0 03 BEQ CHADDS ;Clear, thus hard font MOS05 0729 D068 v7C MOS05 0730 D06A BC 67 03 LDYAX PGSFNT -&01 ;Load soft font page number MOS05 0729 D068 v7C MOS05 0731 D06D 84 DF CHADDS STY ZTEMPC +&01 ;Store MSByte -- MOS05 0732 D06F 60 RTS -- MOS05 0733 D070 ] -- MOS05 0734 D070 LNK MOS06 -- MOS06 0001 D070 -- MOS06 0002 D070 TTL VDU File - MOS06 -- MOS06 0003 D070 OPT MOS06 MOS06 MOS06 MOS06 MOS06 Acorn macro assembler Page 28 MOS06 VDU File - MOS06 MOS06 -- MOS06 0004 D070 -- MOS06 0005 D070 ;Last revision 15/05/82 -- MOS06 0006 D070 -- MOS06 0007 D070 ;15/06/82 Adjust bad plot mode indirection code -- MOS06 0008 D070 ;05/05/82 GADDR converted such that it takes only 1 table. -- MOS06 0009 D070 ; Moved to MOS11 -- MOS06 0010 D070 ;01/05/82 Recode to allow for new order of variables -- MOS06 0011 D070 ;21/04/82 Conditional assembly of start/end point double plotting. -- MOS06 0012 D070 ;22/01/82 Provide EIGABS -- MOS06 0013 D070 ;07/01/82 Put X to LSB of pointer -- MOS06 0014 D070 -- MOS06 0015 D070 ;******* PLOTTING ******* -- MOS06 0016 D070 -- MOS06 0017 D070 ;Prologue - converts from external to internal -- MOS06 0018 D070 ;co-ords, and distinguishes between types of -- MOS06 0019 D070 ;line & triangles -- MOS06 0020 D070 -- MOS06 0021 D070 A2 20 EMA LDXIM NEWPT-V ;Convert external to internal -- MOS06 0022 D072 [ MOS125 = &FF -- MOS06 0025 D072 | -- MOS06 0026 D072 AD 1F 03 LDA PLMODE ;Get plot mode -- MOS06 0027 D075 48 PHA -- MOS06 0028 D076 20 5D D1 JSR EIGC ;for the 4 bytes starting at Q -- MOS06 0029 D079 68 PLA -- MOS06 0030 D07A ] -- MOS06 0031 D07A C9 04 CMPIM &04 ;BASIC's MOVE command -- MOS06 0032 D07C F0 6D BEQ EMAEX MOS06 0032 D07C v12 MOS06 0033 D07E A0 05 LDYIM &05 ;Point to do damn' all mode (for plotting that produces no change) MOS06 0032 D07C v12 MOS06 0034 D080 29 03 ANDIM &03 MOS06 0032 D07C v12 MOS06 0035 D082 F0 0E BEQ EMAA ;No change, then exit MOS06 0032 D07C v12 MOS06 0036 D084 4A LSRA ;Is it odd ? MOS06 0032 D07C v12 MOS06 0037 D085 B0 03 BCS EMAF ;No?, then invert MOS06 0032 D07C v12 MOS06 0038 D087 88 DEY ;(Y) = 4. Point to INVERT values of table MOS06 0032 D07C v12 MOS06 0039 D088 D0 08 BNE EMAA ;(Branch always taken) MOS06 0032 D07C v12 MOS06 0040 D08A AA EMAF TAX MOS06 0032 D07C v12 MOS06 0041 D08B BC 5B 03 LDYAX GPLFMD MOS06 0032 D07C v12 MOS06 0042 D08E BD 59 03 LDAAX FGCOLF MOS06 0032 D07C v12 MOS06 0043 D091 AA TAX MOS06 0032 D07C v12 MOS06 0044 D092 20 C5 D0 EMAA JSR SETZG MOS06 0032 D07C v12 MOS06 0045 D095 MOS06 0032 D07C v12 MOS06 0046 D095 ;What's to be done ? MOS06 0032 D07C v12 MOS06 0047 D095 MOS06 0032 D07C v12 MOS06 0048 D095 AD 1F 03 LDA PLMODE ;Get plot mode MOS06 0032 D07C v12 MOS06 0049 D098 ;* TAY MOS06 0032 D07C v12 MOS06 0050 D098 30 23 BMI EXGREF ;Negative, then reference external routine MOS06 0032 D07C v12 MOS06 0051 D09A 0A ASLA ;Get type of operation MOS06 0032 D07C v12 MOS06 0052 D09B 10 3B BPL EMAD ;Is it a line? MOS06 0032 D07C v12 MOS06 0053 D09D 29 F0 ANDIM &F0 ;Get rid of irrelevant data MOS06 0032 D07C v12 MOS06 0054 D09F 0A ASLA ;Is it point ($80, will be shifted out) ? MOS06 0032 D07C v12 MOS06 0055 D0A0 F0 46 BEQ EMAC MOS06 0032 D07C v12 MOS06 0056 D0A2 49 40 EORIM &40 ;Triangles? MOS06 0032 D07C v12 MOS06 0057 D0A4 F0 14 BEQ EMAG MOS06 0032 D07C v12 MOS06 0058 D0A6 48 PHA MOS06 0032 D07C v12 MOS06 0059 D0A7 20 EE D0 JSR EMAEY ;Copy newpoint to internal cursor MOS06 0032 D07C v12 MOS06 0060 D0AA 68 PLA MOS06 0032 D07C v12 MOS06 0061 D0AB 49 60 EORIM &60 ;SPLOT MOS06 0032 D07C v12 MOS06 0062 D0AD F0 11 BEQ EME ;($60=$20 EOR $40) MOS06 0032 D07C v12 MOS06 0063 D0AF C9 40 CMPIM &40 ;SPLOT looking for b/g ($60 = $40 EOR $60 EOR $40) MOS06 0032 D07C v12 MOS06 0064 D0B1 D0 0A BNE EXGREF MOS06 0032 D07C v12 MOS06 0065 D0B3 A9 02 LDAIM &02 ;This is what is EORed with the flag register MOS06 0032 D07C v12 MOS06 0066 D0B5 85 DC STA ZTEMPB MOS06 0032 D07C v12 MOS06 0067 D0B7 4C BC D4 JMP SCHEAT MOS06 0032 D07C v12 MOS06 0068 D0BA MOS06 0032 D07C v12 MOS06 0069 D0BA 4C 9C D5 EMAG JMP EMC ;Jump to triangles MOS06 0032 D07C v12 MOS06 0070 D0BD EXGREF MOS06 0032 D07C v12 MOS06 0071 D0BD ;* TYA ;Restore plot mode to A MOS06 0032 D07C v12 MOS06 0072 D0BD 4C 0E C9 JMP JMIV25 MOS06 0032 D07C v12 MOS06 0073 D0C0 MOS06 0032 D07C v12 MOS06 0074 D0C0 85 DC EME STA ZTEMPB ;(A)=0 .This is what is EORed with the flag register MOS06 0032 D07C v12 MOS06 0075 D0C2 4C 75 D4 JMP SPLOT ;Fill plot MOS06 0032 D07C v12 MOS06 0076 D0C5 MOS06 0032 D07C v12 MOS06 0077 D0C5 ;Set up ZGORA & ZGEOR, using MOS06 0032 D07C v12 MOS06 0078 D0C5 ;(X)=Full colour byte MOS06 0032 D07C v12 MOS06 0079 D0C5 ;(Y)=Plot mode MOS06 0032 D07C v12 MOS06 0080 D0C5 MOS06 0032 D07C v12 MOS06 0081 D0C5 8A SETZG TXA MOS06 0032 D07C v12 MOS06 0082 D0C6 19 1C C4 ORAAY TBZGOO MOS06 0032 D07C v12 MOS06 0083 D0C9 59 1D C4 EORAY TBZGEO MOS06 0032 D07C v12 MOS06 0084 D0CC 85 D4 STA ZGORA MOS06 0032 D07C v12 MOS06 0085 D0CE 8A TXA MOS06 0032 D07C v12 MOS06 0086 D0CF 19 1B C4 ORAAY TBZGOE MOS06 0032 D07C v12 MOS06 0087 D0D2 59 20 C4 EORAY TBZGEE MOS06 0032 D07C v12 MOS06 0088 D0D5 85 D5 STA ZGEOR MOS06 0032 D07C v12 MOS06 0089 D0D7 60 RTS MOS06 0032 D07C v12 MOS06 0090 D0D8 MOS06 0032 D07C v12 MOS06 0091 D0D8 ;Plot a line or curve MOS06 0032 D07C v12 MOS06 0092 D0D8 MOS06 0032 D07C v12 MOS06 0093 D0D8 0A EMAD ASLA ;Is it a line or curve ? MOS06 0032 D07C v12 MOS06 0094 D0D9 30 E2 BMI EXGREF ;Curve, so reference user routine MOS06 0032 D07C v12 MOS06 0095 D0DB 0A ASLA MOS06 0032 D07C v12 MOS06 0096 D0DC 0A ASLA ;It's a line, so is the first point to be plotted again? MOS06 0032 D07C v12 MOS06 0097 D0DD 10 03 BPL EMAB ;No, then skip this, as routine plots both anyway MOS06 0032 D07C v12 MOS06 0098 D0DF ; MOS06 0032 D07C v12 MOS06 0099 D0DF [ STARTP=0 MOS06 0032 D07C v12 MOS06 0102 D0DF | MOS06 0032 D07C v12 MOS06 0103 D0DF ; plot end point twice MOS06 0032 D07C v12 MOS06 0104 D0DF 20 FD D0 JSR WPLOT MOS06 0032 D07C v12 MOS06 0105 D0E2 ] MOS06 0032 D07C v12 MOS06 0106 D0E2 ; MOS06 0032 D07C v12 MOS06 0107 D0E2 20 C5 D1 EMAB JSR LINE MOS06 0032 D07C v12 MOS06 0108 D0E5 4C EB D0 JMP EMAEX MOS06 0032 D07C v12 MOS06 0109 D0E8 MOS06 0032 D07C v12 MOS06 0110 D0E8 ;Plot a point MOS06 0032 D07C v12 MOS06 0111 D0E8 MOS06 0032 D07C v12 MOS06 0112 D0E8 20 FD D0 EMAC JSR WPLOT ;Plot only if it is in window MOS06 0032 D07C v12 MOS06 0113 D0EB ;SPLOTY requires that EMAEX preserves carry MOS06 0032 D07C v12 MOS06 0114 D0EB 20 D0 CD EMAEX JSR SWAPB ;Swap current cursor with last cursor -- MOS06 0115 D0EE A0 24 EMAEY LDYIM GCSIR-V ;Copy new point to Icursor -- MOS06 0116 D0F0 A2 20 EMAEZ LDXIM NEWPT-V -- MOS06 0117 D0F2 4C 41 D4 JMP COPYF -- MOS06 0118 D0F5 -- MOS06 0119 D0F5 ;WPLOT windows point at NEWPT and plots it if inside -- MOS06 0120 D0F5 -- MOS06 0121 D0F5 A2 24 WPLOTA LDXIM GCSIR-V ;WPLOTA does this to current graphics cursor -- MOS06 0122 D0F7 20 F1 D7 JSR GADDV ;WPLOTB does this for any point pointed to by X -- MOS06 0123 D0FA F0 06 BEQ PLOT MOS06 0123 D0FA v79 MOS06 0124 D0FC 60 RTS MOS06 0123 D0FA v79 MOS06 0125 D0FD 20 EF D7 WPLOT JSR GADDW ;Window & address NEWPT MOS06 0123 D0FA v79 MOS06 0126 D100 D0 13 BNE PLOTEX ;Out of window, then exit MOS06 0126 D100 v6C MOS06 0127 D102 MOS06 0126 D100 v6C MOS06 0128 D102 ;otherwise fall through to ..... MOS06 MOS06 MOS06 MOS06 Acorn macro assembler Page 29 MOS06 VDU File - MOS06 MOS06 MOS06 0126 D100 v6C MOS06 0129 D102 MOS06 0126 D100 v6C MOS06 0130 D102 ;PLOT plots a point MOS06 0126 D100 v6C MOS06 0131 D102 ;Requires LINEY, ZMEMG, ZGORA, ZGEOR MOS06 0126 D100 v6C MOS06 0132 D102 ;Uses ZTEMP as work byte MOS06 0126 D100 v6C MOS06 0133 D102 ;Alters 1 byte on screen MOS06 0126 D100 v6C MOS06 0134 D102 MOS06 0126 D100 v6C MOS06 0135 D102 AC 1A 03 PLOT LDY YLINE MOS06 0126 D100 v6C MOS06 0136 D105 A5 D1 PLOTS LDA ZMASK MOS06 0126 D100 v6C MOS06 0137 D107 25 D4 AND ZGORA MOS06 0126 D100 v6C MOS06 0138 D109 11 D6 ORAIY ZMEMG MOS06 0126 D100 v6C MOS06 0139 D10B 85 DA STA ZTEMP MOS06 0126 D100 v6C MOS06 0140 D10D A5 D5 LDA ZGEOR MOS06 0126 D100 v6C MOS06 0141 D10F 25 D1 AND ZMASK MOS06 0126 D100 v6C MOS06 0142 D111 45 DA EOR ZTEMP MOS06 0126 D100 v6C MOS06 0143 D113 91 D6 STAIY ZMEMG MOS06 0126 D100 v6C MOS06 0144 D115 60 PLOTEX RTS -- MOS06 0145 D116 -- MOS06 0146 D116 B1 D6 PLOTFF LDAIY ZMEMG ;Plots a full byte -- MOS06 0147 D118 05 D4 ORA ZGORA -- MOS06 0148 D11A 45 D5 EOR ZGEOR -- MOS06 0149 D11C [ MOS125 = &7F -- MOS06 0150 D11C WRSC -- MOS06 0151 D11C ] -- MOS06 0152 D11C 91 D6 STAIY ZMEMG -- MOS06 0153 D11E 60 RTS -- MOS06 0154 D11F -- MOS06 0155 D11F ;WIND windows the point at V+(X), as follows -- MOS06 0156 D11F ;If the point is below the lower limit, the window is 1 -- MOS06 0157 D11F ;If the point is above the upper limit, the window is 2 -- MOS06 0158 D11F ;If the point is within both limits, the window is 0 -- MOS06 0159 D11F ;The total window, returned in A (with z set appropriately) -- MOS06 0160 D11F ;is 4 times the window in the Y direction, plus the window -- MOS06 0161 D11F ;in the X direction. -- MOS06 0162 D11F ;The routine uses ZTEMP as a work byte -- MOS06 0163 D11F ;All windows, as specified by GWxxxx are reckoned as inclusive, -- MOS06 0164 D11F ;with the high byte last. -- MOS06 0165 D11F ;The order of the windows in RAM is reckoned as follows -- MOS06 0166 D11F ;GWLCOL, GWBROW, GWRCOL, GWTROW -- MOS06 0167 D11F -- MOS06 0168 D11F A2 24 WINDCS LDXIM GCSIR-V ;Special entry point to window graphics cursor -- MOS06 0169 D121 -- MOS06 0170 D121 A0 00 WIND LDYIM &00 ;Initialise result -- MOS06 0171 D123 84 DA STY ZTEMP -- MOS06 0172 D125 A0 02 LDYIM &02 ;Do the Y co-ords -- MOS06 0173 D127 20 3A D1 JSR WINDA -- MOS06 0174 D12A 06 DA ASL ZTEMP ;Mult. the Y window by 4 -- MOS06 0175 D12C 06 DA ASL ZTEMP -- MOS06 0176 D12E CA DEX -- MOS06 0177 D12F CA DEX -- MOS06 0178 D130 A0 00 LDYIM &00 ;Do the X window -- MOS06 0179 D132 20 3A D1 JSR WINDA -- MOS06 0180 D135 E8 INX ;Restore X -- MOS06 0181 D136 E8 INX -- MOS06 0182 D137 A5 DA LDA ZTEMP -- MOS06 0183 D139 60 RTS -- MOS06 0184 D13A -- MOS06 0185 D13A ;Subtract margin from point to obtain sign of difference -- MOS06 0186 D13A -- MOS06 0187 D13A BD 02 03 WINDA LDAAX V+&02 ;(LSB) -- MOS06 0188 D13D D9 00 03 CMPAY GWLCOL ;(LSB of lower limit) -- MOS06 0189 D140 BD 03 03 LDAAX V+&03 ;(MSB) -- MOS06 0190 D143 F9 01 03 SBCAY GWLCOL+&01 ;(MSB of lower limit) -- MOS06 0191 D146 30 10 BMI WINDAA MOS06 0191 D146 v6F MOS06 0192 D148 B9 04 03 LDAAY GWRCOL ;(LSB of upper limit) MOS06 0191 D146 v6F MOS06 0193 D14B DD 02 03 CMPAX V+&02 ;(LSB) MOS06 0191 D146 v6F MOS06 0194 D14E B9 05 03 LDAAY GWRCOL+&01 ;(MSB of upper limit) MOS06 0191 D146 v6F MOS06 0195 D151 FD 03 03 SBCAX V+&03 ;(MSB) MOS06 0191 D146 v6F MOS06 0196 D154 10 04 BPL WINDAB ;Is this <= upper limit ? MOS06 0191 D146 v6F MOS06 0197 D156 E6 DA INC ZTEMP MOS06 0191 D146 v6F MOS06 0198 D158 E6 DA WINDAA INC ZTEMP MOS06 0196 D154 v7B MOS06 0199 D15A 60 WINDAB RTS ;No longer referenced from EIG, incidentally, saving TWO WHOLE BYTES !! -- MOS06 0200 D15B -- MOS06 0201 D15B ;EIGABS in some embarassment is to provide EIG in ABSOLUTE co-ords -- MOS06 0202 D15B -- MOS06 0203 D15B A9 FF EIGABS LDAIM &FF -- MOS06 0204 D15D [ MOS125 = &FF -- MOS06 0206 D15D ] -- MOS06 0207 D15D -- MOS06 0208 D15D ;Convert external to internal co-ordinates -- MOS06 0209 D15D -- MOS06 0210 D15D ;EIG converts from external co-ords (either relative or abs) -- MOS06 0211 D15D ;and produces internal ones in situ. No windowing is done. -- MOS06 0212 D15D ;Requires (X) = the offset from V of the points to be converted -- MOS06 0213 D15D ;b2 of PLMODE = 0 for relative co-ords (add the Ecursor) -- MOS06 0214 D15D ; 1 for absolute co-ords (add the origin) -- MOS06 0215 D15D ;GCSR, ORGX, ORGY as usual -- MOS06 0216 D15D ;Writes the transformed co-ordinates from whence they came -- MOS06 0217 D15D ;Also writes new point to external cursor (GCSX,GCSY) -- MOS06 0218 D15D ;hence in triangle relative mode, the points are relative -- MOS06 0219 D15D ;to the last specified, not the original cursor -- MOS06 0220 D15D -- MOS06 0221 D15D ;a) Add the cursor to current posn. if relative -- MOS06 0222 D15D ;& add origin in both cases -- MOS06 0223 D15D -- MOS06 0224 D15D [ MOS125 = &FF -- MOS06 0226 D15D ] -- MOS06 0227 D15D 85 DA EIGC STA ZTEMP -- MOS06 0228 D15F A0 02 LDYIM &02 ;Do this for Y co-ordinates -- MOS06 0229 D161 20 83 D1 JSR EIGS -- MOS06 0230 D164 20 BA D1 JSR DIVAXT ;1024 points vertically -- MOS06 0231 D167 A0 00 LDYIM &00 -- MOS06 0232 D169 CA DEX -- MOS06 0233 D16A CA DEX -- MOS06 0234 D16B 20 83 D1 JSR EIGS ;Do this for X co-ordinates -- MOS06 0235 D16E -- MOS06 0236 D16E ;b) scale down by the necessary factor -- MOS06 0237 D16E ;(EIGS has already divided by 2) -- MOS06 0238 D16E -- MOS06 0239 D16E AC 61 03 LDY NPIX ;How many pixles ? -- MOS06 0240 D171 C0 03 CPYIM &03 -- MOS06 0241 D173 F0 05 BEQ EIGA ;4?, then divide by 4 MOS06 0241 D173 v7A MOS06 0242 D175 B0 06 BCS EIGB ;8?, then divide by 2 MOS06 0242 D175 v79 MOS06 0243 D177 20 BA D1 JSR DIVAXT ;2?, then divide by 8 MOS06 0242 D175 v79 MOS06 0244 D17A 20 BA D1 EIGA JSR DIVAXT MOS06 0242 D175 v79 MOS06 0245 D17D AD 56 03 EIGB LDA MEMODE ;Is it a 10K mode? -- MOS06 0246 D180 D0 38 BNE DIVAXT ;YES, then another divide by 2 MOS06 0246 D180 v47 MOS06 0247 D182 60 RTS ; NO, then skip MOS06 0246 D180 v47 MOS06 0248 D183 MOS06 0246 D180 v47 MOS06 0249 D183 18 EIGS CLC MOS06 0246 D180 v47 MOS06 0250 D184 A5 DA LDA ZTEMP ;Test b2 of plot mode, for rel./abs. MOS06 0246 D180 v47 MOS06 0251 D186 29 04 ANDIM &04 MOS06 MOS06 MOS06 MOS06 Acorn macro assembler Page 30 MOS06 VDU File - MOS06 MOS06 MOS06 0246 D180 v47 MOS06 0252 D188 F0 09 BEQ EIGSA ;Clear, so relative ( & skip ) MOS06 0246 D180 v47 MOS06 0253 D18A BD 02 03 LDAAX V+&02 ;(LSB) ~~~ ABSOLUTE ~~~ MOS06 0246 D180 v47 MOS06 0254 D18D 48 PHA MOS06 0246 D180 v47 MOS06 0255 D18E BD 03 03 LDAAX V+&03 ;(MSB) MOS06 0246 D180 v47 MOS06 0256 D191 90 0E BCC EIGSB ;(branch always taken) MOS06 0246 D180 v47 MOS06 0257 D193 BD 02 03 EIGSA LDAAX V+&02 ;~~~ RELATIVE ~~~ MOS06 0246 D180 v47 MOS06 0258 D196 79 10 03 ADCAY GCSR ;so add prev. cursor (LSB) MOS06 0246 D180 v47 MOS06 0259 D199 48 PHA MOS06 0246 D180 v47 MOS06 0260 D19A BD 03 03 LDAAX V+&03 ;(MSB) MOS06 0246 D180 v47 MOS06 0261 D19D 79 11 03 ADCAY GCSR+&01 MOS06 0246 D180 v47 MOS06 0262 D1A0 18 CLC MOS06 0246 D180 v47 MOS06 0263 D1A1 99 11 03 EIGSB STAAY GCSR+&01 ;Update MSB of cursor MOS06 0246 D180 v47 MOS06 0264 D1A4 79 0D 03 ADCAY ORG+&01 ;Now add origin for both addressing modes ! MOS06 0246 D180 v47 MOS06 0265 D1A7 9D 03 03 STAAX V+&03 ;(MSB) MOS06 0246 D180 v47 MOS06 0266 D1AA 68 PLA ;Pull LSByte MOS06 0246 D180 v47 MOS06 0267 D1AB 99 10 03 STAAY GCSR ;Update LSB of cursor MOS06 0246 D180 v47 MOS06 0268 D1AE 18 CLC MOS06 0246 D180 v47 MOS06 0269 D1AF 79 0C 03 ADCAY ORG ;(LSB) MOS06 0246 D180 v47 MOS06 0270 D1B2 9D 02 03 STAAX V+&02 MOS06 0246 D180 v47 MOS06 0271 D1B5 90 03 BCC DIVAXT MOS06 0246 D180 v47 MOS06 0272 D1B7 FE 03 03 INCAX V+&03 ;Carry into MSB if needs be MOS06 0246 D180 v47 MOS06 0273 D1BA MOS06 0246 D180 v47 MOS06 0274 D1BA ;Divide this by 2 by falling through to ... MOS06 0246 D180 v47 MOS06 0275 D1BA MOS06 0246 D180 v47 MOS06 0276 D1BA BD 03 03 DIVAXT LDAAX V+&03 ;Signed division by 2 -- MOS06 0277 D1BD 0A ASLA ;(Screen now 1280 by 1024) -- MOS06 0278 D1BE 7E 03 03 RORAX V+&03 -- MOS06 0279 D1C1 7E 02 03 RORAX V+&02 -- MOS06 0280 D1C4 [ MOS125 = &FF -- MOS06 0281 D1C4 | -- MOS06 0282 D1C4 LINEX1 -- MOS06 0283 D1C4 ] -- MOS06 0284 D1C4 60 RTS MOS07 0112 D23C ^06 MOS06 0285 D1C5 MOS07 0112 D23C ^06 MOS06 0286 D1C5 [ MOS125 = &FF MOS07 0112 D23C ^06 MOS06 0315 D1C5 ] MOS07 0112 D23C ^06 MOS06 0316 D1C5 MOS07 0112 D23C ^06 MOS06 0317 D1C5 LNK MOS07 MOS07 0112 D23C ^06 MOS07 0001 D1C5 TTL VDU File - MOS07 MOS07 0112 D23C ^06 MOS07 0002 D1C5 OPT MOS07 MOS07 MOS07 MOS07 MOS07 Acorn macro assembler Page 31 MOS07 VDU File - MOS07 MOS07 MOS07 0112 D23C ^06 MOS07 0003 D1C5 MOS07 0112 D23C ^06 MOS07 0004 D1C5 ;Last revision 01/05/82 MOS07 0112 D23C ^06 MOS07 0005 D1C5 MOS07 0112 D23C ^06 MOS07 0006 D1C5 ;01/05/82 Recoded to allow for new order of variables & manifests MOS07 0112 D23C ^06 MOS07 0007 D1C5 ;21/04/82 LINE rewritten MOS07 0112 D23C ^06 MOS07 0008 D1C5 ;19/04/82 One byte saved in SB MOS07 0112 D23C ^06 MOS07 0009 D1C5 ;25/03/82 Change all refs. to BEGSCN+1 to BEGSCN MOS07 0112 D23C ^06 MOS07 0010 D1C5 ;14/11/81 Variable mark space on DOTS removed MOS07 0112 D23C ^06 MOS07 0011 D1C5 MOS07 0112 D23C ^06 MOS07 0012 D1C5 ;******* PLOTTING ******* MOS07 0112 D23C ^06 MOS07 0013 D1C5 MOS07 0112 D23C ^06 MOS07 0014 D1C5 ;LINE plots straight line from cursor to new point MOS07 0112 D23C ^06 MOS07 0015 D1C5 ;taking account windowing, & plotting partial lines MOS07 0112 D23C ^06 MOS07 0016 D1C5 ;if necessary MOS07 0112 D23C ^06 MOS07 0017 D1C5 MOS07 0112 D23C ^06 MOS07 0018 D1C5 ;Requires GCSIR = the current cursor position (I co-ords) MOS07 0112 D23C ^06 MOS07 0019 D1C5 ;NEWPT = the point to plotted to (I co-ords) MOS07 0112 D23C ^06 MOS07 0020 D1C5 ;Windowing is assumed of neither MOS07 0112 D23C ^06 MOS07 0021 D1C5 MOS07 0112 D23C ^06 MOS07 0022 D1C5 MOS07 0112 D23C ^06 MOS07 0023 D1C5 ;Plot a straight line MOS07 0112 D23C ^06 MOS07 0024 D1C5 MOS07 0112 D23C ^06 MOS07 0025 D1C5 20 C4 D3 LINE JSR LINSA ;Find DeltaX & DeltaY to LDELTA MOS07 0112 D23C ^06 MOS07 0026 D1C8 ;LINSB Returns n=1 iff MOD DeltaX < MOD DeltaY MOS07 0112 D23C ^06 MOS07 0027 D1C8 ;Encoded version of a previous routine MOS07 0112 D23C ^06 MOS07 0028 D1C8 MOS07 0112 D23C ^06 MOS07 0029 D1C8 AD 2B 03 LDA LDELTA+&03 ;DY, MSB Are the deltas of the same sign? MOS07 0112 D23C ^06 MOS07 0030 D1CB [ MOS125 = &FF MOS07 0112 D23C ^06 MOS07 0043 D1CB | MOS07 0112 D23C ^06 MOS07 0044 D1CB AA TAX MOS07 0112 D23C ^06 MOS07 0045 D1CC 4D 29 03 EOR LDELTA+&01 ;DX, MSB MOS07 0112 D23C ^06 MOS07 0046 D1CF 0A ASLA MOS07 0112 D23C ^06 MOS07 0047 D1D0 AD 2A 03 LDA LDELTA+&02 MOS07 0112 D23C ^06 MOS07 0048 D1D3 B0 0A BCS LINSBA MOS07 0112 D23C ^06 MOS07 0049 D1D5 CD 28 03 CMP LDELTA ;YES, then compare DeltaY - DeltaX MOS07 0112 D23C ^06 MOS07 0050 D1D8 8A TXA MOS07 0112 D23C ^06 MOS07 0051 D1D9 ED 29 03 SBC LDELTA+&01 MOS07 0112 D23C ^06 MOS07 0052 D1DC 4C E7 D1 JMP LINSBB MOS07 0112 D23C ^06 MOS07 0053 D1DF 18 LINSBA CLC ;NO, then add MOS07 0112 D23C ^06 MOS07 0054 D1E0 6D 28 03 ADC LDELTA MOS07 0112 D23C ^06 MOS07 0055 D1E3 8A TXA MOS07 0112 D23C ^06 MOS07 0056 D1E4 6D 29 03 ADC LDELTA+&01 MOS07 0112 D23C ^06 MOS07 0057 D1E7 ] MOS07 0112 D23C ^06 MOS07 0058 D1E7 6A LINSBB RORA ;c to b7 of A MOS07 0112 D23C ^06 MOS07 0059 D1E8 A2 00 LDXIM &00 MOS07 0112 D23C ^06 MOS07 0060 D1EA 4D 2B 03 EOR LDELTA+&03 ;If DY < 0, then invert b7 of A. Sets n as required MOS07 0112 D23C ^06 MOS07 0061 D1ED ; MOS07 0112 D23C ^06 MOS07 0062 D1ED 10 02 BPL LINEA MOS07 0112 D23C ^06 MOS07 0063 D1EF A2 02 LDXIM &02 MOS07 0112 D23C ^06 MOS07 0064 D1F1 86 DE LINEA STX ZTEMPC ;0 if p.b.X, 2 if p.b.Y MOS07 0112 D23C ^06 MOS07 0065 D1F3 BD AA C4 LDAAX D1JTB ;JVEC initialisation (D1 jump vector) MOS07 0112 D23C ^06 MOS07 0066 D1F6 8D 5D 03 STA JVEC MOS07 0112 D23C ^06 MOS07 0067 D1F9 BD AB C4 LDAAX D1JTB+&01 MOS07 0112 D23C ^06 MOS07 0068 D1FC 8D 5E 03 STA JVEC+&01 MOS07 0112 D23C ^06 MOS07 0069 D1FF [ MOS125 = &FF MOS07 0112 D23C ^06 MOS07 0076 D1FF | MOS07 0112 D23C ^06 MOS07 0077 D1FF A9 24 LDAIM GCSIR-V ;+ve, then LSTART from GCSIR... MOS07 0112 D23C ^06 MOS07 0078 D201 BC 29 03 LDYAX LDELTA+&01 ;Sign of D1 MOS07 0112 D23C ^06 MOS07 0079 D204 30 02 BMI LINEC MOS07 0112 D23C ^06 MOS07 0080 D206 A9 20 LDAIM NEWPT-V ;Copy LSTART from new point MOS07 0112 D23C ^06 MOS07 0081 D208 85 DF LINEC STA ZTEMPC+&01 ;Offset of LSTART (=PStart of old) MOS07 0112 D23C ^06 MOS07 0082 D20A AA TAX MOS07 0112 D23C ^06 MOS07 0083 D20B ] MOS07 0112 D23C ^06 MOS07 0084 D20B A0 2C LDYIM LSTART-V ;Copy to LSTART MOS07 0112 D23C ^06 MOS07 0085 D20D 20 41 D4 JSR COPYF MOS07 0112 D23C ^06 MOS07 0086 D210 A5 DF LDA ZTEMPC+&01 ;Get Horizontal co-ordinate of other (end) point MOS07 0112 D23C ^06 MOS07 0087 D212 49 04 EORIM &04 ;This requires NEWPT to be multiple of 8 & GCSIR 4 above it MOS07 0112 D23C ^06 MOS07 0088 D214 85 DD STA ZTEMPB+&01 MOS07 0112 D23C ^06 MOS07 0089 D216 05 DE ORA ZTEMPC ;Get Hend (horizontal co-ordinate of endpoint) MOS07 0112 D23C ^06 MOS07 0090 D218 AA TAX MOS07 0112 D23C ^06 MOS07 0091 D219 20 37 D4 JSR COPY2H MOS07 0112 D23C ^06 MOS07 0092 D21C AD 1F 03 LDA PLMODE ;Initialise dotted line test MOS07 0112 D23C ^06 MOS07 0093 D21F 29 10 ANDIM &10 ;Isolate b4 MOS07 0112 D23C ^06 MOS07 0094 D221 0A ASLA MOS07 0112 D23C ^06 MOS07 0095 D222 0A ASLA MOS07 0112 D23C ^06 MOS07 0096 D223 0A ASLA ;now $80 if plot dotted line, $00 if full line MOS07 0112 D23C ^06 MOS07 0097 D224 85 DB STA ZTEMP+&01 MOS07 0112 D23C ^06 MOS07 0098 D226 A2 2C LDXIM LSTART-V ;Window start point LSTART MOS07 0112 D23C ^06 MOS07 0099 D228 20 21 D1 JSR WIND MOS07 0112 D23C ^06 MOS07 0100 D22B 85 DC STA ZTEMPB MOS07 0112 D23C ^06 MOS07 0101 D22D F0 06 BEQ LINED MOS07 0112 D23C ^06 MOS07 0102 D22F A9 40 LDAIM &40 ;Start point not inside, so slow plot MOS07 0112 D23C ^06 MOS07 0103 D231 05 DB ORA ZTEMP+&01 MOS07 0112 D23C ^06 MOS07 0104 D233 85 DB STA ZTEMP+&01 MOS07 0112 D23C ^06 MOS07 0105 D235 A6 DD LINED LDX ZTEMPB+&01 ;Window other point MOS07 0112 D23C ^06 MOS07 0106 D237 20 21 D1 JSR WIND MOS07 0112 D23C ^06 MOS07 0107 D23A 24 DC BIT ZTEMPB ;Anything to do ? MOS07 0112 D23C ^06 MOS07 0108 D23C [ MOS125 = &FF MOS07 0112 D23C ^06 MOS07 0111 D23C | MOS07 0112 D23C ^06 MOS07 0112 D23C D0 86 BNE LINEX1 ;No, then exit -- MOS07 0113 D23E ] -- MOS07 0114 D23E A6 DE LINEE LDX ZTEMPC ;Isolate 2nd horizontal window -- MOS07 0115 D240 F0 02 BEQ LINEF MOS07 0115 D240 v7D MOS07 0116 D242 4A LSRA MOS07 0115 D240 v7D MOS07 0117 D243 4A LSRA MOS07 0115 D240 v7D MOS07 0118 D244 29 02 LINEF ANDIM &02 -- MOS07 0119 D246 F0 07 BEQ LINEG ;Zero, so Hend is in window MOS07 0119 D246 v78 MOS07 0120 D248 8A TXA ;Point X to upper margin! MOS07 0119 D246 v78 MOS07 0121 D249 09 04 ORAIM GWRCOL-V ;Assumes GWLCOL-V is a multiple of 4 MOS07 0119 D246 v78 MOS07 0122 D24B AA TAX ;Endpoint outside horizontal window, MOS07 0119 D246 v78 MOS07 0123 D24C 20 37 D4 JSR COPY2H ;so alter Hend to high margin MOS07 0119 D246 v78 MOS07 0124 D24F 20 E3 D3 LINEG JSR LINSG ;Get L values & MOD deltas -- MOS07 0125 D252 A5 DE LDA ZTEMPC -- MOS07 0126 D254 49 02 EORIM &02 -- MOS07 0127 D256 AA TAX ;Unsigned D2 -- MOS07 0128 D257 A8 TAY -- MOS07 0129 D258 AD 29 03 LDA LDELTA+&01 ;Sign of D2 ? -- MOS07 0130 D25B 4D 2B 03 EOR LDELTA+&03 -- MOS07 0131 D25E 10 01 BPL LINEH MOS07 0131 D25E v7E MOS07 0132 D260 E8 INX ;Signed D2 - E,W,N,S MOS07 0131 D25E v7E MOS07 0133 D261 BD AE C4 LINEH LDAAX D2JTBL ;Initialise D2 jump vector -- MOS07 0134 D264 8D 32 03 STA D2JVEC -- MOS07 0135 D267 BD B2 C4 LDAAX D2JTBH -- MOS07 0136 D26A 8D 33 03 STA D2JVEC+&01 -- MOS07 0137 D26D A9 7F LDAIM &7F ;dotted line initialisation -- MOS07 0138 D26F 8D 34 03 STA DOTFLG -- MOS07 0139 D272 24 DB BIT ZTEMP+&01 -- MOS07 0140 D274 70 29 BVS LINEI ;Slow plot , so set ZTEMPC strangely MOS07 0140 D274 v56 MOS07 0141 D276 BD 47 C4 LDAAX EWTBA ;(4,0,6,2) Calculate V points MOS07 0140 D274 v56 MOS07 0142 D279 AA TAX MOS07 0140 D274 v56 MOS07 0143 D27A 38 SEC MOS07 MOS07 MOS07 MOS07 Acorn macro assembler Page 32 MOS07 VDU File - MOS07 MOS07 MOS07 0140 D274 v56 MOS07 0144 D27B BD 00 03 LDAAX GWLCOL MOS07 0140 D274 v56 MOS07 0145 D27E F9 2C 03 SBCAY LSTART MOS07 0140 D274 v56 MOS07 0146 D281 85 DA STA ZTEMP MOS07 0140 D274 v56 MOS07 0147 D283 BD 01 03 LDAAX GWLCOL+&01 MOS07 0140 D274 v56 MOS07 0148 D286 F9 2D 03 SBCAY LSTART+&01 MOS07 0140 D274 v56 MOS07 0149 D289 A4 DA LDY ZTEMP MOS07 0140 D274 v56 MOS07 0150 D28B AA TAX ;Ensure +ve MOS07 0140 D274 v56 MOS07 0151 D28C 10 03 BPL LINEH1 MOS07 0140 D274 v56 MOS07 0152 D28E 20 52 D4 JSR NEGAY MOS07 0140 D274 v56 MOS07 0153 D291 AA LINEH1 TAX ;MSB of no. V points MOS07 0140 D274 v56 MOS07 0154 D292 C8 INY ;Increment this no. MOS07 0140 D274 v56 MOS07 0155 D293 D0 01 BNE LINEH2 MOS07 0140 D274 v56 MOS07 0156 D295 E8 INX MOS07 0140 D274 v56 MOS07 0157 D296 8A LINEH2 TXA ;MSB non-zero ? MOS07 0140 D274 v56 MOS07 0158 D297 F0 02 BEQ LINEH3 MOS07 0140 D274 v56 MOS07 0159 D299 A0 00 LDYIM &00 ;Yes, then no limit to no. of vertical points MOS07 0140 D274 v56 MOS07 0160 D29B 84 DF LINEH3 STY ZTEMPC+&01 ; Zero is always set here MOS07 0140 D274 v56 MOS07 0161 D29D F0 09 BEQ LINEJ1 MOS07 0140 D274 v56 MOS07 0162 D29F 8A LINEI TXA ;b7 = sign of D2. b1=D2 MOS07 0161 D29D v76 MOS07 0163 D2A0 4A LSRA MOS07 0161 D29D v76 MOS07 0164 D2A1 6A RORA MOS07 0161 D29D v76 MOS07 0165 D2A2 09 02 ORAIM &02 MOS07 0161 D29D v76 MOS07 0166 D2A4 45 DE EOR ZTEMPC MOS07 0161 D29D v76 MOS07 0167 D2A6 85 DE STA ZTEMPC MOS07 0161 D29D v76 MOS07 0168 D2A8 A2 2C LINEJ1 LDXIM LSTART-V ;Address the first point -- MOS07 0169 D2AA 20 F6 D7 JSR GADDR ;Now loads YLINE to Y -- MOS07 0170 D2AD A6 DC LDX ZTEMPB -- MOS07 0171 D2AF D0 02 BNE LINEN MOS07 0171 D2AF v7D MOS07 0172 D2B1 C6 DD DEC ZTEMPB+&01 MOS07 0171 D2AF v7D MOS07 0173 D2B3 CA LINEN DEX -- MOS07 0174 D2B4 ; -- MOS07 0175 D2B4 ; Fall through to main plot routine -- MOS07 0176 D2B4 ; -- MOS07 0177 D2B4 A5 DB LINEJ LDA ZTEMP +&01 ;Was midpoint or DOTS referenced ? -- MOS07 0178 D2B6 F0 1F BEQ DOTYES ;No?, then run along MOS07 0178 D2B6 v60 MOS07 0179 D2B8 10 10 BPL MPTEST ;No, then do midpoint test MOS07 0178 D2B6 v60 MOS07 0180 D2BA 2C 34 03 BIT DOTFLG ;b7 set, then dotted MOS07 0178 D2B6 v60 MOS07 0181 D2BD 10 05 BPL DOTY ;Branch if last was a space MOS07 0178 D2B6 v60 MOS07 0182 D2BF CE 34 03 DEC DOTFLG ;now to $7F MOS07 0178 D2B6 v60 MOS07 0183 D2C2 D0 23 BNE DOTNO ;(branch always taken) MOS07 0183 D2C2 v5C MOS07 0184 D2C4 EE 34 03 DOTY INC DOTFLG ;to $80 MOS07 0183 D2C2 v5C MOS07 0185 D2C7 0A ASLA MOS07 0183 D2C2 v5C MOS07 0186 D2C8 10 0D BPL DOTYES ;No?, then plot the point MOS07 0183 D2C2 v5C MOS07 0187 D2CA 86 DC MPTEST STX ZTEMPB ;Store X temporarily MOS07 0183 D2C2 v5C MOS07 0188 D2CC A2 2C LDXIM LSTART-V ;Window the point at Q +0D (PStart) MOS07 0183 D2C2 v5C MOS07 0189 D2CE 20 F1 D7 JSR GADDV ;& address if window was successful MOS07 0183 D2C2 v5C MOS07 0190 D2D1 A6 DC LDX ZTEMPB ;Restore X MOS07 0183 D2C2 v5C MOS07 0191 D2D3 09 00 ORAIM &00 ;To TSTA (a la 6800) (result of window) MOS07 0183 D2C2 v5C MOS07 0192 D2D5 D0 10 BNE DOTNO ;Outside?, then skip the plot MOS07 0183 D2C2 v5C MOS07 0193 D2D7 A5 D1 DOTYES LDA ZMASK ;Plot the point MOS07 0183 D2C2 v5C MOS07 0194 D2D9 25 D4 AND ZGORA MOS07 0183 D2C2 v5C MOS07 0195 D2DB 11 D6 ORAIY ZMEMG MOS07 0183 D2C2 v5C MOS07 0196 D2DD 85 DA STA ZTEMP MOS07 0183 D2C2 v5C MOS07 0197 D2DF A5 D5 LDA ZGEOR MOS07 0183 D2C2 v5C MOS07 0198 D2E1 25 D1 AND ZMASK MOS07 0183 D2C2 v5C MOS07 0199 D2E3 45 DA EOR ZTEMP MOS07 0183 D2C2 v5C MOS07 0200 D2E5 91 D6 STAIY ZMEMG MOS07 0183 D2C2 v5C MOS07 0201 D2E7 MOS07 0183 D2C2 v5C MOS07 0202 D2E7 ;L := L - DeltaV MOS07 0183 D2C2 v5C MOS07 0203 D2E7 MOS07 0183 D2C2 v5C MOS07 0204 D2E7 38 DOTNO SEC -- MOS07 0205 D2E8 AD 35 03 LDA LPARMS ;L,LSB -- MOS07 0206 D2EB ED 37 03 SBC LPARMS+&02 ;DeltaV,LSB -- MOS07 0207 D2EE 8D 35 03 STA LPARMS -- MOS07 0208 D2F1 AD 36 03 LDA LPARMS+&01 ;L,MSB -- MOS07 0209 D2F4 ED 38 03 SBC LPARMS+&03 ;DeltaV,MSB -- MOS07 0210 D2F7 B0 11 BCS LINED1 ;Skip if D2 not to be taken ( L > 0 ) MOS07 0210 D2F7 v6E MOS07 0211 D2F9 85 DA STA ZTEMP ;D2 must be taken, thus MOS07 0210 D2F7 v6E MOS07 0212 D2FB AD 35 03 LDA LPARMS ;L := L + DeltaH MOS07 0210 D2F7 v6E MOS07 0213 D2FE 6D 39 03 ADC LPARMS+&04 ;LSB of DeltaH (c=0) MOS07 0210 D2F7 v6E MOS07 0214 D301 8D 35 03 STA LPARMS MOS07 0210 D2F7 v6E MOS07 0215 D304 A5 DA LDA ZTEMP MOS07 0210 D2F7 v6E MOS07 0216 D306 6D 3A 03 ADC LPARMS+&05 ;MSB of DeltaH MOS07 0210 D2F7 v6E MOS07 0217 D309 18 CLC ;Do do D2 MOS07 0210 D2F7 v6E MOS07 0218 D30A 8D 36 03 LINED1 STA LPARMS+&01 ;Store MSB of L, preserving c -- MOS07 0219 D30D 08 PHP ;Needed for decrementing no. of V points -- MOS07 0220 D30E B0 09 BCS LINEE1 ;Don't do D2 if you're not meant to MOS07 0220 D30E v76 MOS07 0221 D310 6C 32 03 JMI D2JVEC ;Jump to D2, through JVEC2, to xB (below) MOS07 0220 D30E v76 MOS07 0222 D313 88 NB DEY MOS07 0220 D30E v76 MOS07 0223 D314 10 03 BPL LINEE1 ;~~~~~~~~~~~~~~ D2 KING MOVES ~~~~~~~~~~~~~~ MOS07 0220 D30E v76 MOS07 0224 D316 20 ED CB JSR NBDY MOS07 0220 D30E v76 MOS07 0225 D319 6C 5D 03 LINEE1 JMI JVEC MOS07 0246 D347 ^50 MOS07 0226 D31C C8 SB INY MOS07 0246 D347 ^50 MOS07 0227 D31D C0 08 CPYIM &08 MOS07 0246 D347 ^50 MOS07 0228 D31F D0 F8 BNE LINEE1 MOS07 0246 D347 ^50 MOS07 0229 D321 18 CLC ; encoded version of SBDY MOS07 0246 D347 ^50 MOS07 0230 D322 A5 D6 LDA ZMEMG MOS07 0246 D347 ^50 MOS07 0231 D324 6D 52 03 ADC BYTROW MOS07 0246 D347 ^50 MOS07 0232 D327 85 D6 STA ZMEMG MOS07 0246 D347 ^50 MOS07 0233 D329 A5 D7 LDA ZMEMG +&01 MOS07 0246 D347 ^50 MOS07 0234 D32B 6D 53 03 ADC BYTROW +&01 MOS07 0246 D347 ^50 MOS07 0235 D32E 10 04 BPL SBDYA MOS07 0246 D347 ^50 MOS07 0236 D330 38 SEC MOS07 0246 D347 ^50 MOS07 0237 D331 ED 54 03 SBC BYTSCN MOS07 0246 D347 ^50 MOS07 0238 D334 85 D7 SBDYA STA ZMEMG +&01 MOS07 0246 D347 ^50 MOS07 0239 D336 A0 00 LDYIM &00 MOS07 0246 D347 ^50 MOS07 0240 D338 6C 5D 03 JMI JVEC MOS07 0246 D347 ^50 MOS07 0241 D33B 46 D1 EB LSR ZMASK MOS07 0246 D347 ^50 MOS07 0242 D33D 90 DA BCC LINEE1 MOS07 0246 D347 ^50 MOS07 0243 D33F 20 A4 D3 JSR EBDY MOS07 0246 D347 ^50 MOS07 0244 D342 6C 5D 03 JMI JVEC MOS07 0246 D347 ^50 MOS07 0245 D345 06 D1 WB ASL ZMASK MOS07 0246 D347 ^50 MOS07 0246 D347 90 D0 BCC LINEE1 -- MOS07 0247 D349 20 B4 D3 JSR WBDY -- MOS07 0248 D34C 6C 5D 03 JMI JVEC -- MOS07 0249 D34F 88 NA DEY -- MOS07 0250 D350 10 0C BPL LINEF1 ;~~~~~~~~~~~~~~ D1 KING MOVES ~~~~~~~~~~~~~~ MOS07 0250 D350 v73 MOS07 0251 D352 20 ED CB JSR NBDY MOS07 0250 D350 v73 MOS07 0252 D355 D0 07 BNE LINEF1 ; NBDY returns Zero false MOS07 0250 D350 v73 MOS07 0253 D357 46 D1 EA LSR ZMASK MOS07 0250 D350 v73 MOS07 0254 D359 90 03 BCC LINEF1 MOS07 0250 D350 v73 MOS07 0255 D35B 20 A4 D3 JSR EBDY MOS07 0250 D350 v73 MOS07 0256 D35E 28 LINEF1 PLP ;Did D2 occur ? Result to c (c=0 if it did) -- MOS07 0257 D35F E8 INX ;Inc no. H points left to plot (following preserves c) -- MOS07 0258 D360 D0 04 BNE LINEG1 MOS07 0258 D360 v7B MOS07 0259 D362 E6 DD INC ZTEMPB +&01 MOS07 0258 D360 v7B MOS07 0260 D364 F0 0A BEQ LINEX ;Zero?, then exit MOS07 0260 D364 v75 MOS07 0261 D366 24 DB LINEG1 BIT ZTEMP +&01 ;Was midpoint referenced? (preserves c) MOS07 0260 D364 v75 MOS07 0262 D368 70 07 BVS FRIGA ;Yes, then go to the nasty bit MOS07 0260 D364 v75 MOS07 0263 D36A B0 35 BCS LINEK ;D2 ?, then test V window. c from last PLP MOS07 0263 D36A v4A MOS07 0264 D36C C6 DF DEC ZTEMPC +&01 ;Off V window ?, then exit MOS07 MOS07 MOS07 MOS07 Acorn macro assembler Page 33 MOS07 VDU File - MOS07 MOS07 MOS07 0263 D36A v4A MOS07 0265 D36E D0 31 BNE LINEK MOS07 0263 D36A v4A MOS07 0266 D370 60 LINEX RTS MOS07 0263 D36A v4A MOS07 0267 D371 A5 DE FRIGA LDA ZTEMPC ;Which direction was D2 ? MOS07 0263 D36A v4A MOS07 0268 D373 86 DC STX ZTEMPB MOS07 0263 D36A v4A MOS07 0269 D375 29 02 ANDIM &02 MOS07 0263 D36A v4A MOS07 0270 D377 AA TAX MOS07 0263 D36A v4A MOS07 0271 D378 B0 19 BCS FRIGC ;No D2?, then skip the adjustment of V MOS07 0263 D36A v4A MOS07 0272 D37A 24 DE BIT ZTEMPC ;Was D2 +ve ? MOS07 0263 D36A v4A MOS07 0273 D37C 30 0A BMI FRIGB MOS07 0263 D36A v4A MOS07 0274 D37E FE 2C 03 INCAX LSTART ;D2 +ve, so increment V co-ord MOS07 0263 D36A v4A MOS07 0275 D381 D0 10 BNE FRIGC MOS07 0263 D36A v4A MOS07 0276 D383 FE 2D 03 INCAX LSTART+&01 MOS07 0263 D36A v4A MOS07 0277 D386 90 0B BCC FRIGC ;(branch always taken) MOS07 0263 D36A v4A MOS07 0278 D388 BD 2C 03 FRIGB LDAAX LSTART ;D2 -ve, so dec. the V co-ord. MOS07 0263 D36A v4A MOS07 0279 D38B D0 03 BNE FRIGF MOS07 0263 D36A v4A MOS07 0280 D38D DE 2D 03 DECAX LSTART+&01 MOS07 0263 D36A v4A MOS07 0281 D390 DE 2C 03 FRIGF DECAX LSTART MOS07 0263 D36A v4A MOS07 0282 D393 8A FRIGC TXA ;Get offset of D1 MOS07 0263 D36A v4A MOS07 0283 D394 49 02 EORIM &02 MOS07 0263 D36A v4A MOS07 0284 D396 AA TAX MOS07 0263 D36A v4A MOS07 0285 D397 FE 2C 03 INCAX LSTART ;D1 +ve,so inc. H co-ord MOS07 0263 D36A v4A MOS07 0286 D39A D0 03 BNE FRIGD MOS07 0263 D36A v4A MOS07 0287 D39C FE 2D 03 INCAX LSTART+&01 MOS07 0263 D36A v4A MOS07 0288 D39F A6 DC FRIGD LDX ZTEMPB MOS07 0263 D36A v4A MOS07 0289 D3A1 4C B4 D2 LINEK JMP LINEJ -- MOS07 0290 D3A4 -- MOS07 0291 D3A4 ;BOUNDARY ROUTINES -- MOS07 0292 D3A4 -- MOS07 0293 D3A4 [ MOS125 = &FF -- MOS07 0309 D3A4 ] -- MOS07 0310 D3A4 -- MOS07 0311 D3A4 ;EAST -- MOS07 0312 D3A4 -- MOS07 0313 D3A4 AD 62 03 EBDY LDA MASKL -- MOS07 0314 D3A7 85 D1 STA ZMASK -- MOS07 0315 D3A9 A5 D6 LDA ZMEMG -- MOS07 0316 D3AB 69 07 ADCIM &07 ;c=1 from branch not taken to call this -- MOS07 0317 D3AD 85 D6 STA ZMEMG -- MOS07 0318 D3AF 90 02 BCC EBDYA MOS07 0318 D3AF v7D MOS07 0319 D3B1 E6 D7 INC ZMEMG +&01 MOS07 0318 D3AF v7D MOS07 0320 D3B3 60 EBDYA RTS -- MOS07 0321 D3B4 -- MOS07 0322 D3B4 ;WEST -- MOS07 0323 D3B4 -- MOS07 0324 D3B4 AD 63 03 WBDY LDA MASKR ;encoded version of WBDY -- MOS07 0325 D3B7 85 D1 STA ZMASK -- MOS07 0326 D3B9 A5 D6 LDA ZMEMG -- MOS07 0327 D3BB D0 02 BNE WBDYA MOS07 0327 D3BB v7D MOS07 0328 D3BD C6 D7 DEC ZMEMG +&01 MOS07 0327 D3BB v7D MOS07 0329 D3BF E9 08 WBDYA SBCIM &08 ;c=1 from failure of BCC -- MOS07 0330 D3C1 85 D6 STA ZMEMG -- MOS07 0331 D3C3 60 RTS -- MOS07 0332 D3C4 -- MOS07 0333 D3C4 LNK MOS08 -- MOS08 0001 D3C4 -- MOS08 0002 D3C4 TTL VDU File - MOS08 -- MOS08 0003 D3C4 OPT MOS08 MOS08 MOS08 MOS08 MOS08 Acorn macro assembler Page 34 MOS08 VDU File - MOS08 MOS08 -- MOS08 0004 D3C4 -- MOS08 0005 D3C4 ;Last revision 18/05/82 -- MOS08 0006 D3C4 ; -- MOS08 0007 D3C4 ;18/05/82 External graphics cursor now updated on exit of SPLOT -- MOS08 0008 D3C4 ;04/05/82 SPLOT routine entered -- MOS08 0009 D3C4 ;01/05/82 Recoded using new variable order & manifests -- MOS08 0010 D3C4 ;21/04/82 Most of this deleted ! LINSG modified for new LINE routine -- MOS08 0011 D3C4 ;19/04/82 Byte saving in LINSCE -- MOS08 0012 D3C4 -- MOS08 0013 D3C4 ;LINSA calculates Delta X & Delta Y -- MOS08 0014 D3C4 ;(New point - cursor), where both are in Ico-ords -- MOS08 0015 D3C4 ;Max. I value always assumed to be $8000, as arithmetic -- MOS08 0016 D3C4 ;is performed in 2's comp., 16 bit -- MOS08 0017 D3C4 ;New point in NEWPT, results to LDELTA -- MOS08 0018 D3C4 -- MOS08 0019 D3C4 A0 28 LINSA LDYIM LDELTA-V ;Offset of results from V -- MOS08 0020 D3C6 A2 20 LDXIM NEWPT-V ;Offset of operands, from V -- MOS08 0021 D3C8 -- MOS08 0022 D3C8 ;fall through to ....... -- MOS08 0023 D3C8 -- MOS08 0024 D3C8 ;TRISA calculates Delta X & Delta Y for operands starting -- MOS08 0025 D3C8 ;at V+(X), and results to V+(Y). Calculation from -- MOS08 0026 D3C8 ;(Point at (V+(X)+4)) - (Point at (V+(X))) -- MOS08 0027 D3C8 -- MOS08 0028 D3C8 20 CF D3 TRISA JSR TRISAA -- MOS08 0029 D3CB E8 INX -- MOS08 0030 D3CC E8 INX -- MOS08 0031 D3CD C8 INY -- MOS08 0032 D3CE C8 INY -- MOS08 0033 D3CF 38 TRISAA SEC -- MOS08 0034 D3D0 BD 04 03 LDAAX V+&04 -- MOS08 0035 D3D3 FD 00 03 SBCAX V -- MOS08 0036 D3D6 99 00 03 STAAY V -- MOS08 0037 D3D9 BD 05 03 LDAAX V+&05 -- MOS08 0038 D3DC FD 01 03 SBCAX V+&01 -- MOS08 0039 D3DF 99 01 03 STAAY V+&01 -- MOS08 0040 D3E2 60 RTS -- MOS08 0041 D3E3 -- MOS08 0042 D3E3 ;LINSG calculates no. H points before H exit -- MOS08 0043 D3E3 ;putting 2's comp. to ZTEMPB,ZTEMPB +01 (LSB 1st). -- MOS08 0044 D3E3 ;Initialises MOD DELTAs & L -- MOS08 0045 D3E3 ;Requires ZTEMPB as usual, destroying original data -- MOS08 0046 D3E3 -- MOS08 0047 D3E3 A5 DE LINSG LDA ZTEMPC ;Calc. MOD DELTAs. -- MOS08 0048 D3E5 D0 07 BNE LINSGB ;Plot by Y, so straight copy MOS08 0048 D3E5 v78 MOS08 0049 D3E7 A2 28 LDXIM LDELTA-V ;Swap DeltaX & DeltaY MOS08 0048 D3E5 v78 MOS08 0050 D3E9 A0 2A LDYIM LDELTA+&02-V MOS08 0048 D3E5 v78 MOS08 0051 D3EB 20 CC CD JSR SWAP2 MOS08 0048 D3E5 v78 MOS08 0052 D3EE A2 28 LINSGB LDXIM LDELTA-V ;Copy from modified DX & DY (now DH & DV) -- MOS08 0053 D3F0 A0 37 LDYIM LPARMS+&02-V ;to LPARMS+2=LDELTA -- MOS08 0054 D3F2 20 41 D4 JSR COPYF ;Copy 4 bytes -- MOS08 0055 D3F5 -- MOS08 0056 D3F5 ;Initialise No. H points -- MOS08 0057 D3F5 -- MOS08 0058 D3F5 38 SEC -- MOS08 0059 D3F6 A6 DE LDX ZTEMPC -- MOS08 0060 D3F8 AD 30 03 LDA HEND ;He, LSB -- MOS08 0061 D3FB FD 2C 03 SBCAX LSTART ;HSt, LSB -- MOS08 0062 D3FE A8 TAY -- MOS08 0063 D3FF AD 31 03 LDA HEND+&01 ;He, MSB -- MOS08 0064 D402 FD 2D 03 SBCAX LSTART+&01 ;HSt, MSB -- MOS08 0065 D405 30 03 BMI LINSGA ;Ensure in 2's comp. MOS08 0065 D405 v7C MOS08 0066 D407 20 52 D4 JSR NEGAY MOS08 0065 D405 v7C MOS08 0067 D40A 85 DD LINSGA STA ZTEMPB +&01 -- MOS08 0068 D40C 84 DC STY ZTEMPB -- MOS08 0069 D40E -- MOS08 0070 D40E ;now initialise L & MODULO the DH & DV -- MOS08 0071 D40E -- MOS08 0072 D40E A2 35 LDXIM LPARMS-V ;Point to the deltas -- MOS08 0073 D410 -- MOS08 0074 D410 ;& fall through to ... -- MOS08 0075 D410 -- MOS08 0076 D410 ;TRISB Set up L & MODULO deltas. -- MOS08 0077 D410 ;Assumes V+(X) points to LL,LH,DVL,DVH,DHL,DHH -- MOS08 0078 D410 ;Sets all Dxy to ABS in situ. Sets L := DH/2 (2 byte arith) -- MOS08 0079 D410 -- MOS08 0080 D410 20 1E D4 TRISB JSR TRISBA ;Do DH -- MOS08 0081 D413 4A LSRA -- MOS08 0082 D414 9D 01 03 STAAX V+&01 ;Initialise LH -- MOS08 0083 D417 98 TYA ;Now do LL -- MOS08 0084 D418 6A RORA -- MOS08 0085 D419 9D 00 03 STAAX V -- MOS08 0086 D41C CA DEX ;Now DV -- MOS08 0087 D41D CA DEX -- MOS08 0088 D41E BC 04 03 TRISBA LDYAX V+&04 ;LSB -- MOS08 0089 D421 BD 05 03 LDAAX V+&05 ;MSB -- MOS08 0090 D424 10 0C BPL TRISBB ;Find ABS value MOS08 0090 D424 v73 MOS08 0091 D426 20 52 D4 JSR NEGAY MOS08 0090 D424 v73 MOS08 0092 D429 9D 05 03 STAAX V+&05 ;PAIN - why the hell isn't there a STYAX on this wretched chip ?? MOS08 0090 D424 v73 MOS08 0093 D42C 48 PHA MOS08 0090 D424 v73 MOS08 0094 D42D 98 TYA MOS08 0090 D424 v73 MOS08 0095 D42E 9D 04 03 STAAX V+&04 MOS08 0090 D424 v73 MOS08 0096 D431 68 PLA MOS08 0090 D424 v73 MOS08 0097 D432 60 TRISBB RTS -- MOS08 0098 D433 -- MOS08 0099 D433 -- MOS08 0100 D433 ;COPYF copies 4 bytes from (V)+(X) to (V)+(Y) -- MOS08 0101 D433 -- MOS08 0102 D433 A9 08 COPY8 LDAIM &08 -- MOS08 0103 D435 D0 0C BNE COPY MOS08 0103 D435 v73 MOS08 0104 D437 MOS08 0103 D435 v73 MOS08 0105 D437 A0 30 COPY2H LDYIM HEND-V MOS08 0103 D435 v73 MOS08 0106 D439 A9 02 COPY2 LDAIM &02 MOS08 0103 D435 v73 MOS08 0107 D43B D0 06 BNE COPY MOS08 0103 D435 v73 MOS08 0108 D43D MOS08 0103 D435 v73 MOS08 0109 D43D A0 28 COPYFA LDYIM APCS1-V MOS08 0103 D435 v73 MOS08 0110 D43F A2 24 COPYFB LDXIM GCSIR-V MOS08 0103 D435 v73 MOS08 0111 D441 A9 04 COPYF LDAIM &04 ;SPLOTY requires that c preserved MOS08 0103 D435 v73 MOS08 0112 D443 85 DA COPY STA ZTEMP -- MOS08 0113 D445 BD 00 03 COPYA LDAAX V MOS08 0118 D44F ^74 MOS08 0114 D448 99 00 03 STAAY V MOS08 0118 D44F ^74 MOS08 0115 D44B E8 INX MOS08 0118 D44F ^74 MOS08 0116 D44C C8 INY MOS08 0118 D44F ^74 MOS08 0117 D44D C6 DA DEC ZTEMP MOS08 0118 D44F ^74 MOS08 0118 D44F D0 F4 BNE COPYA -- MOS08 0119 D451 60 RTS -- MOS08 0120 D452 -- MOS08 0121 D452 48 NEGAY PHA ;Negate (AY) - push MSB -- MOS08 0122 D453 98 TYA -- MOS08 0123 D454 49 FF EORIM &FF -- MOS08 0124 D456 A8 TAY MOS08 MOS08 MOS08 MOS08 Acorn macro assembler Page 35 MOS08 VDU File - MOS08 MOS08 -- MOS08 0125 D457 68 PLA -- MOS08 0126 D458 49 FF EORIM &FF -- MOS08 0127 D45A [ MOS125 = &FF -- MOS08 0133 D45A | -- MOS08 0134 D45A C0 FF CPYIM &FF -- MOS08 0135 D45C C8 INY -- MOS08 0136 D45D 69 00 ADCIM &00 -- MOS08 0137 D45F 60 RTS -- MOS08 0138 D460 ] -- MOS08 0139 D460 -- MOS08 0140 D460 20 EF D7 SPF JSR GADDW ;Address new point COMMON CODE -- MOS08 0141 D463 D0 08 BNE SPFA ;Off window?, then exit MOS08 0141 D463 v77 MOS08 0142 D465 B1 D6 LDAIY ZMEMG ;Get the current byte MOS08 0141 D463 v77 MOS08 0143 D467 4D 5A 03 EOR BGCOLF ;Set b/g pixels to zero MOS08 0141 D463 v77 MOS08 0144 D46A 85 DA STA ZTEMP MOS08 0141 D463 v77 MOS08 0145 D46C 60 RTS MOS08 0141 D463 v77 MOS08 0146 D46D 68 SPFA PLA -- MOS08 0147 D46E 68 PLA -- MOS08 0148 D46F -- MOS08 0149 D46F ; & fall through to -- MOS08 0150 D46F -- MOS08 0151 D46F EE 26 03 SPLOTY INC GCSIY ;Failed, so make the L.H. cursor > R.H. MOS08 0162 D47A ^73 MOS08 0152 D472 4C FB D4 JMP SPLOTX MOS08 0162 D47A ^73 MOS08 0153 D475 MOS08 0162 D47A ^73 MOS08 0154 D475 ;SPLOT plots from the new point left & right MOS08 0162 D47A ^73 MOS08 0155 D475 ; until it finds a pixel which is NOT background colour MOS08 0162 D47A ^73 MOS08 0156 D475 ; It scans a byte at a time if possible, taking a lot MOS08 0162 D47A ^73 MOS08 0157 D475 ; of code. MOS08 0162 D47A ^73 MOS08 0158 D475 MOS08 0162 D47A ^73 MOS08 0159 D475 MOS08 0162 D47A ^73 MOS08 0160 D475 20 60 D4 SPLOT JSR SPF MOS08 0162 D47A ^73 MOS08 0161 D478 25 D1 AND ZMASK ;Is the new point in b/g? MOS08 0162 D47A ^73 MOS08 0162 D47A D0 F3 BNE SPLOTY ;No?, then exit -- MOS08 0163 D47C A2 00 LDXIM &00 ;Set up for plotting to the left -- MOS08 0164 D47E 20 44 D5 JSR SPS ;Corrupts all registers -- MOS08 0165 D481 F0 2D BEQ SPLOTE ;Nothing to do MOS08 0165 D481 v52 MOS08 0166 D483 AC 1A 03 LDY YLINE MOS08 0165 D481 v52 MOS08 0167 D486 06 D1 ASL ZMASK ;Don't want to plot the midpoint again MOS08 0165 D481 v52 MOS08 0168 D488 B0 05 BCS SPLOTB ;So move left MOS08 0165 D481 v52 MOS08 0169 D48A 20 2E D5 JSR SPB ;Plot the LH fractional byte MOS08 0165 D481 v52 MOS08 0170 D48D 90 21 BCC SPLOTE ;No complete bytes to attempt? MOS08 0165 D481 v52 MOS08 0171 D48F MOS08 0165 D481 v52 MOS08 0172 D48F 20 B4 D3 SPLOTB JSR WBDY ;Do complete bytes left MOS08 0165 D481 v52 MOS08 0173 D492 B1 D6 LDAIY ZMEMG ;(NB WBDY assumes c=1) MOS08 0165 D481 v52 MOS08 0174 D494 4D 5A 03 EOR BGCOLF MOS08 0165 D481 v52 MOS08 0175 D497 85 DA STA ZTEMP MOS08 0165 D481 v52 MOS08 0176 D499 D0 12 BNE SPLOTD ;Not a complete byte of b/g? MOS08 0165 D481 v52 MOS08 0177 D49B 38 SEC ;Go for next byte - add to pixel counter MOS08 0165 D481 v52 MOS08 0178 D49C 8A TXA MOS08 0165 D481 v52 MOS08 0179 D49D 6D 61 03 ADC NPIX MOS08 0165 D481 v52 MOS08 0180 D4A0 90 04 BCC SPLOTC MOS08 0165 D481 v52 MOS08 0181 D4A2 E6 DB INC ZTEMP+&01 ;MSB of pixel counter MOS08 0165 D481 v52 MOS08 0182 D4A4 10 07 BPL SPLOTD ;Reached margin? Then skip MOS08 0165 D481 v52 MOS08 0183 D4A6 AA SPLOTC TAX ;Not reached margin - then MOS08 0165 D481 v52 MOS08 0184 D4A7 20 16 D1 JSR PLOTFF MOS08 0165 D481 v52 MOS08 0185 D4AA 38 SEC ;carry on MOS08 0165 D481 v52 MOS08 0186 D4AB B0 E2 BCS SPLOTB ;(branch always taken). Sorry about the last comment MOS08 0165 D481 v52 MOS08 0187 D4AD MOS08 0165 D481 v52 MOS08 0188 D4AD 20 2E D5 SPLOTD JSR SPB ;Do whatever is right of the line MOS08 0165 D481 v52 MOS08 0189 D4B0 A0 00 SPLOTE LDYIM &00 ;Translate back to Ico-ords -- MOS08 0190 D4B2 20 5E D5 JSR SPU -- MOS08 0191 D4B5 -- MOS08 0192 D4B5 A0 20 LDYIM NEWPT-V ;Entry point for look for b/g colour -- MOS08 0193 D4B7 A2 24 LDXIM GCSIR-V ;Swap newpoint (in GCSIR) & calculated RH endpoint -- MOS08 0194 D4B9 20 D4 CD JSR SWAPF -- MOS08 0195 D4BC -- MOS08 0196 D4BC 20 60 D4 SCHEAT JSR SPF ;Address midpoint again held in NEWPT -- MOS08 0197 D4BF A2 04 LDXIM &04 ;Set up for plotting right -- MOS08 0198 D4C1 20 44 D5 JSR SPS ;Musn't corrupt ZTEMP -- MOS08 0199 D4C4 8A TXA ;Plot the midpoint -- MOS08 0200 D4C5 D0 02 BNE SPLOTA MOS08 0200 D4C5 v7D MOS08 0201 D4C7 C6 DB DEC ZTEMP+&01 MOS08 0200 D4C5 v7D MOS08 0202 D4C9 CA SPLOTA DEX -- MOS08 0203 D4CA -- MOS08 0204 D4CA 20 01 D5 SPLOTL JSR SPA ;Do this RH fractional byte MOS08 0213 D4DB ^6D MOS08 0205 D4CD 90 27 BCC SPLOTK ;No full bytes to attempt? MOS08 0205 D4CD v58 MOS08 0206 D4CF MOS08 0205 D4CD v58 MOS08 0207 D4CF 20 A4 D3 SPLOTI JSR EBDY ;Full bytes right MOS08 0205 D4CD v58 MOS08 0208 D4D2 B1 D6 LDAIY ZMEMG MOS08 0205 D4CD v58 MOS08 0209 D4D4 4D 5A 03 EOR BGCOLF MOS08 0205 D4CD v58 MOS08 0210 D4D7 85 DA STA ZTEMP MOS08 0205 D4CD v58 MOS08 0211 D4D9 MOS08 0205 D4CD v58 MOS08 0212 D4D9 A5 DC LDA ZTEMPB MOS08 0205 D4CD v58 MOS08 0213 D4DB D0 ED BNE SPLOTL MOS08 0205 D4CD v58 MOS08 0214 D4DD MOS08 0205 D4CD v58 MOS08 0215 D4DD A5 DA LDA ZTEMP MOS08 0205 D4CD v58 MOS08 0216 D4DF D0 12 BNE SPLOTJ ;This isn't a full byte MOS08 0205 D4CD v58 MOS08 0217 D4E1 38 SEC ;Add (NPIX)+1=no.pixels to counter MOS08 0205 D4CD v58 MOS08 0218 D4E2 8A TXA MOS08 0205 D4CD v58 MOS08 0219 D4E3 6D 61 03 ADC NPIX MOS08 0205 D4CD v58 MOS08 0220 D4E6 90 04 BCC SPLOTF MOS08 0205 D4CD v58 MOS08 0221 D4E8 E6 DB INC ZTEMP+&01 MOS08 0205 D4CD v58 MOS08 0222 D4EA 10 07 BPL SPLOTJ ;Skip if hit margin MOS08 0205 D4CD v58 MOS08 0223 D4EC AA SPLOTF TAX MOS08 0205 D4CD v58 MOS08 0224 D4ED 20 16 D1 JSR PLOTFF MOS08 0205 D4CD v58 MOS08 0225 D4F0 38 SEC MOS08 0205 D4CD v58 MOS08 0226 D4F1 B0 DC BCS SPLOTI ;(branch always taken) MOS08 0205 D4CD v58 MOS08 0227 D4F3 MOS08 0205 D4CD v58 MOS08 0228 D4F3 20 01 D5 SPLOTJ JSR SPA MOS08 0205 D4CD v58 MOS08 0229 D4F6 A0 04 SPLOTK LDYIM &04 ;Convert to address of LH endpoint -- MOS08 0230 D4F8 20 5E D5 JSR SPU -- MOS08 0231 D4FB 20 EB D0 SPLOTX JSR EMAEX ;Finished -- MOS08 0232 D4FE 4C 7D CA JMP IEG ;update external cursor -- MOS08 0233 D501 -- MOS08 0234 D501 ;SPA Plots fractional LH byte on RH line end -- MOS08 0235 D501 -- MOS08 0236 D501 A5 D1 SPA LDA ZMASK ;Push the initial combined mask -- MOS08 0237 D503 [ MOS125 = &FF -- MOS08 0239 D503 ] -- MOS08 0240 D503 18 CLC -- MOS08 0241 D504 90 0E BCC SPAF ;(branch always taken) MOS08 0241 D504 v71 MOS08 0242 D506 MOS08 0241 D504 v71 MOS08 0243 D506 68 SPAA PLA ;Try next pixel - pull combined mask MOS08 0271 D51F ^65 MOS08 0244 D507 E8 INX ;Increment the pixel counter MOS08 0271 D51F ^65 MOS08 0245 D508 D0 04 BNE SPAB MOS08 0271 D51F ^65 MOS08 0246 D50A E6 DB INC ZTEMP+&01 MOS08 0271 D51F ^65 MOS08 0247 D50C 10 16 BPL SPAE ;Exit if all pixels plotted MOS08 0271 D51F ^65 MOS08 0248 D50E 46 D1 SPAB LSR ZMASK ;Shift mask MOS08 0271 D51F ^65 MOS08 0249 D510 B0 12 BCS SPAE ;Exit if shifted out of character cell MOS08 0271 D51F ^65 MOS08 0250 D512 05 D1 ORA ZMASK ;Continue forming combined mask MOS08 0271 D51F ^65 MOS08 0251 D514 [ MOS125 = &FF MOS08 MOS08 MOS08 MOS08 Acorn macro assembler Page 36 MOS08 VDU File - MOS08 MOS08 MOS08 0271 D51F ^65 MOS08 0254 D514 | MOS08 0271 D51F ^65 MOS08 0255 D514 48 SPAF PHA ;& push it again MOS08 0271 D51F ^65 MOS08 0256 D515 A5 D1 LDA ZMASK ;START HERE MOS08 0271 D51F ^65 MOS08 0257 D517 ] MOS08 0271 D51F ^65 MOS08 0258 D517 24 DA BIT ZTEMP ;Is this pixel b/g colour ? MOS08 0271 D51F ^65 MOS08 0259 D519 MOS08 0271 D51F ^65 MOS08 0260 D519 08 PHP ;Invert z flag if needs be MOS08 0271 D51F ^65 MOS08 0261 D51A 68 PLA MOS08 0271 D51F ^65 MOS08 0262 D51B 45 DC EOR ZTEMPB ;By inverting it with ZTEMPB (0 or 2) MOS08 0271 D51F ^65 MOS08 0263 D51D [ MOS125 = &FF MOS08 0271 D51F ^65 MOS08 0268 D51D | MOS08 0271 D51F ^65 MOS08 0269 D51D 29 02 ANDIM &02 ;No shorter but saves 5 cycles and ZTEMPB can't corrupt PSR MOS08 0271 D51F ^65 MOS08 0270 D51F MOS08 0271 D51F ^65 MOS08 0271 D51F D0 E5 BNE SPAA ;Z now inverted, NE means NOT background, so loop MOS08 0247 D50C v69 MOS08 0272 D521 ] MOS08 0247 D50C v69 MOS08 0273 D521 68 PLA ;Found it?, then pull combined mask MOS08 0247 D50C v69 MOS08 0274 D522 45 D1 EOR ZMASK ;& delete this pixel from it MOS08 0247 D50C v69 MOS08 0275 D524 85 D1 SPAE STA ZMASK ;These must preserve c! MOS08 0320 D542 ^60 MOS08 0276 D526 4C 02 D1 JMP PLOT MOS08 0320 D542 ^60 MOS08 0277 D529 MOS08 0320 D542 ^60 MOS08 0278 D529 [ MOS125 = &FF MOS08 0320 D542 ^60 MOS08 0301 D529 | MOS08 0320 D542 ^60 MOS08 0302 D529 SPBD MOS08 0320 D542 ^60 MOS08 0303 D529 45 D1 EOR ZMASK MOS08 0320 D542 ^60 MOS08 0304 D52B 4A LSRA MOS08 0320 D542 ^60 MOS08 0305 D52C 90 F6 BCC SPAE ;(branch always taken) MOS08 0320 D542 ^60 MOS08 0306 D52E MOS08 0320 D542 ^60 MOS08 0307 D52E ;SPB Plots fractional RH byte on LH line end MOS08 0320 D542 ^60 MOS08 0308 D52E MOS08 0320 D542 ^60 MOS08 0309 D52E A9 00 SPB LDAIM &00 MOS08 0320 D542 ^60 MOS08 0310 D530 0A SPBE ASLA ;CC preserved via SPAE->PLOT and seen by caller MOS08 0320 D542 ^60 MOS08 0311 D531 05 D1 ORA ZMASK MOS08 0320 D542 ^60 MOS08 0312 D533 24 DA BIT ZTEMP MOS08 0320 D542 ^60 MOS08 0313 D535 D0 F2 BNE SPBD MOS08 0320 D542 ^60 MOS08 0314 D537 E8 INX MOS08 0320 D542 ^60 MOS08 0315 D538 D0 04 BNE SPBB MOS08 0320 D542 ^60 MOS08 0316 D53A E6 DB INC ZTEMP+&01 MOS08 0320 D542 ^60 MOS08 0317 D53C 10 E6 BPL SPAE MOS08 0320 D542 ^60 MOS08 0318 D53E C9 80 SPBB CMPIM &80 MOS08 0320 D542 ^60 MOS08 0319 D540 90 EE BCC SPBE MOS08 0320 D542 ^60 MOS08 0320 D542 B0 E0 BCS SPAE ;(branch always taken) -- MOS08 0321 D544 ] -- MOS08 0322 D544 -- MOS08 0323 D544 ;SPS Set up pixel counter -- MOS08 0324 D544 -- MOS08 0325 D544 BD 00 03 SPS LDAAX GWLCOL -- MOS08 0326 D547 38 SEC -- MOS08 0327 D548 ED 20 03 SBC NEWPT -- MOS08 0328 D54B A8 TAY -- MOS08 0329 D54C BD 01 03 LDAAX GWLCOL+&01 -- MOS08 0330 D54F ED 21 03 SBC NEWPT+&01 -- MOS08 0331 D552 30 03 BMI SPSA ;Ensure this is -ve MOS08 0331 D552 v7C MOS08 0332 D554 20 52 D4 JSR NEGAY MOS08 0331 D552 v7C MOS08 0333 D557 85 DB SPSA STA ZTEMP+&01 ;Store MSB -- MOS08 0334 D559 98 TYA -- MOS08 0335 D55A AA TAX ;LSB to X -- MOS08 0336 D55B 05 DB ORA ZTEMP+&01 ;Set z=1 if nothing to do -- MOS08 0337 D55D 60 RTS -- MOS08 0338 D55E -- MOS08 0339 D55E ;SPU Work out the internal co-ordinates of where we are -- MOS08 0340 D55E -- MOS08 0341 D55E 84 DA SPU STY ZTEMP -- MOS08 0342 D560 8A TXA -- MOS08 0343 D561 A8 TAY -- MOS08 0344 D562 A5 DB LDA ZTEMP+&01 -- MOS08 0345 D564 30 02 BMI SPUA ;This byte is $00 at most MOS08 0345 D564 v7D MOS08 0346 D566 A9 00 LDAIM &00 ;although it can get a $01 in it MOS08 0345 D564 v7D MOS08 0347 D568 A6 DA SPUA LDX ZTEMP -- MOS08 0348 D56A D0 03 BNE SPUB MOS08 0348 D56A v7C MOS08 0349 D56C 20 52 D4 JSR NEGAY MOS08 0348 D56A v7C MOS08 0350 D56F 48 SPUB PHA -- MOS08 0351 D570 18 CLC -- MOS08 0352 D571 98 TYA -- MOS08 0353 D572 7D 00 03 ADCAX GWLCOL -- MOS08 0354 D575 8D 20 03 STA NEWPT -- MOS08 0355 D578 68 PLA -- MOS08 0356 D579 7D 01 03 ADCAX GWLCOL+&01 -- MOS08 0357 D57C 8D 21 03 STA NEWPT+&01 -- MOS08 0358 D57F 60 RTS -- MOS08 0359 D580 -- MOS08 0360 D580 CSREAD -- MOS08 0361 D580 A9 03 LDAIM &03 ;Convert internal co-ordiantes at OLDCS & GCSIR -- MOS08 0362 D582 20 87 D5 JSR SPCA -- MOS08 0363 D585 A9 07 LDAIM &07 -- MOS08 0364 D587 48 SPCA PHA -- MOS08 0365 D588 20 D0 CD JSR SWAPB ;Swap old cursor with cursor -- MOS08 0366 D58B 20 7D CA JSR IEG ;Convert to external co-ordiantes -- MOS08 0367 D58E A2 03 LDXIM &03 ;& copy it -- MOS08 0368 D590 68 PLA -- MOS08 0369 D591 A8 TAY -- MOS08 0370 D592 BD 10 03 SPCB LDAAX GCSR MOS08 0374 D599 ^77 MOS08 0371 D595 91 F0 STAIY WARGS MOS08 0374 D599 ^77 MOS08 0372 D597 88 DEY MOS08 0374 D599 ^77 MOS08 0373 D598 CA DEX MOS08 0374 D599 ^77 MOS08 0374 D599 10 F7 BPL SPCB -- MOS08 0375 D59B 60 RTS -- MOS08 0376 D59C -- MOS08 0377 D59C LNK MOS10 -- MOS10 0001 D59C -- MOS10 0002 D59C TTL VDU File - MOS10 -- MOS10 0003 D59C OPT MOS10 MOS10 MOS10 MOS10 MOS10 Acorn macro assembler Page 37 MOS10 VDU File - MOS10 MOS10 -- MOS10 0004 D59C -- MOS10 0005 D59C ;Last revision 10/05/82 -- MOS10 0006 D59C -- MOS10 0007 D59C ;10/05/82 Save 1 byte by BCS HPLOT -> BCC TRSRTS -- MOS10 0008 D59C ;05/05/82 HPLOT uses PLOTFF -- MOS10 0009 D59C ;01/05/82 Recoded using manifests & new ordering of static variables -- MOS10 0010 D59C ;07/02/82 Zero height triangles not so disasterous (GPT) -- MOS10 0011 D59C -- MOS10 0012 D59C ;TRIANGLE PLOTTING -- MOS10 0013 D59C -- MOS10 0014 D59C ;INITIALISATION -- MOS10 0015 D59C -- MOS10 0016 D59C A2 20 EMC LDXIM NEWPT-V ;Copy new point & graphics cursor to a safe place -- MOS10 0017 D59E A0 3E LDYIM GCSTMP-V -- MOS10 0018 D5A0 20 33 D4 JSR COPY8 -- MOS10 0019 D5A3 20 ED CD JSR SORTA ;Sort into Y co-ords, in order NEWPT=Lo, GCSIR=Hi, OLDCS=Med -- MOS10 0020 D5A6 A2 14 LDXIM OLDCS-V -- MOS10 0021 D5A8 A0 24 LDYIM GCSIR-V -- MOS10 0022 D5AA 20 F1 CD JSR SORTY -- MOS10 0023 D5AD 20 ED CD JSR SORTA -- MOS10 0024 D5B0 A2 20 LDXIM NEWPT-V ;Set paramters for hypotenuse ... -- MOS10 0025 D5B2 A0 2A LDYIM HDELTA-V ;Find Deltas -- MOS10 0026 D5B4 20 C8 D3 JSR TRISA -- MOS10 0027 D5B7 AD 2B 03 LDA HDELTA+&01 ;Copy sign of DeltaX to determine direction -- MOS10 0028 D5BA 8D 32 03 STA HDIREC -- MOS10 0029 D5BD A2 28 LDXIM HPARMS -- MOS10 0030 D5BF 20 10 D4 JSR TRISB ;complete definition of hypotenuse parameters -- MOS10 0031 D5C2 A0 2E LDYIM HSTART-V ;Copy NEWPT to PStart of hypotenuse -- MOS10 0032 D5C4 20 F0 D0 JSR EMAEZ -- MOS10 0033 D5C7 ;Swap Y co-ords 2 & 3, to give 1st side -- MOS10 0034 D5C7 20 D0 CD JSR SWAPB ;Y co-ords now in order Lo, Med, Hi -- MOS10 0035 D5CA 18 CLC ;Don't plot the last line -- MOS10 0036 D5CB 20 F5 D5 JSR TRSF ;Do the lower half of the triangle -- MOS10 0037 D5CE ;Swap points to enable set up of 2nd side -- MOS10 0038 D5CE 20 D0 CD JSR SWAPB ;Y co-ords now Lo, Hi, Med -- MOS10 0039 D5D1 A2 20 LDXIM NEWPT-V ;swap Y co-ords 1 & 3 to give 2nd side -- MOS10 0040 D5D3 20 D2 CD JSR SWAPC ;& now Med, Hi, Lo -- MOS10 0041 D5D6 38 SEC ;Do plot the last line -- MOS10 0042 D5D7 20 F5 D5 JSR TRSF ;& plot the top half -- MOS10 0043 D5DA A2 3E LDXIM GCSTMP-V ;Restore original graphics cursor & new point -- MOS10 0044 D5DC A0 20 LDYIM NEWPT-V -- MOS10 0045 D5DE 20 33 D4 JSR COPY8 -- MOS10 0046 D5E1 4C EB D0 JMP EMAEX ;& do things to the cursors -- MOS10 0047 D5E4 -- MOS10 0048 D5E4 [ MOS125 = &FF -- MOS10 0059 D5E4 ] -- MOS10 0060 D5E4 -- MOS10 0061 D5E4 CSRPOS -- MOS10 0062 D5E4 AD 18 03 LDA CSX ;~~~ Read text cursor position ~~~ -- MOS10 0063 D5E7 38 SEC -- MOS10 0064 D5E8 ED 08 03 SBC TWLCOL -- MOS10 0065 D5EB AA TAX -- MOS10 0066 D5EC AD 19 03 LDA CSY -- MOS10 0067 D5EF 38 SEC -- MOS10 0068 D5F0 ED 0B 03 SBC TWTROW -- MOS10 0069 D5F3 A8 TAY -- MOS10 0070 D5F4 60 TRSRTS RTS ;No, then return MOS10 0109 D63D ^35 MOS10 0071 D5F5 MOS10 0109 D63D ^35 MOS10 0072 D5F5 ;TRSF Initialises a parameter list for ULN MOS10 0109 D63D ^35 MOS10 0073 D5F5 ;Sets up the "sides" (as opposed to the hypoteneuse) only. Skips if MOS10 0109 D63D ^35 MOS10 0074 D5F5 ;the 2 Y values are equal, otherwise calls HPLOT & ULN the requisite MOS10 0109 D63D ^35 MOS10 0075 D5F5 ;number of times MOS10 0109 D63D ^35 MOS10 0076 D5F5 ;Assumes the points forming the side to be initialised are in MOS10 0109 D63D ^35 MOS10 0077 D5F5 ;NEWPT & GCSIR MOS10 0109 D63D ^35 MOS10 0078 D5F5 MOS10 0109 D63D ^35 MOS10 0079 D5F5 08 TRSF PHP ;Push carry - is set if last line is to be plotted MOS10 0109 D63D ^35 MOS10 0080 D5F6 A2 20 LDXIM NEWPT-V ;Set up triangle parameters MOS10 0109 D63D ^35 MOS10 0081 D5F8 A0 35 LDYIM SDELTA-V ;Find deltas (sides only) MOS10 0109 D63D ^35 MOS10 0082 D5FA 20 C8 D3 JSR TRISA MOS10 0109 D63D ^35 MOS10 0083 D5FD AD 36 03 LDA SDELTA+&01 ;Find direction by sign of DeltaX MOS10 0109 D63D ^35 MOS10 0084 D600 8D 3D 03 STA SDIREC MOS10 0109 D63D ^35 MOS10 0085 D603 A2 33 LDXIM SPARMS-V ;Find MOD Deltas, and initialise L MOS10 0109 D63D ^35 MOS10 0086 D605 20 10 D4 JSR TRISB MOS10 0109 D63D ^35 MOS10 0087 D608 A0 39 LDYIM SSTART-V ;Copy NEWPT to SSTART MOS10 0109 D63D ^35 MOS10 0088 D60A 20 F0 D0 JSR EMAEZ MOS10 0109 D63D ^35 MOS10 0089 D60D 38 SEC ;How many Y values are there to be done ? MOS10 0109 D63D ^35 MOS10 0090 D60E AD 22 03 LDA NEWPT+&02 MOS10 0109 D63D ^35 MOS10 0091 D611 ED 26 03 SBC GCSIY MOS10 0109 D63D ^35 MOS10 0092 D614 8D 1B 03 STA TRINLN ;Result (2's comp.) to TRINLN MOS10 0109 D63D ^35 MOS10 0093 D617 AD 23 03 LDA NEWPT+&03 MOS10 0109 D63D ^35 MOS10 0094 D61A ED 27 03 SBC GCSIY+&01 MOS10 0109 D63D ^35 MOS10 0095 D61D 8D 1C 03 STA TRINLN+&01 ;(MSB) MOS10 0109 D63D ^35 MOS10 0096 D620 0D 1B 03 ORA TRINLN ;Anything to do? MOS10 0109 D63D ^35 MOS10 0097 D623 F0 17 BEQ TRSFA MOS10 0109 D63D ^35 MOS10 0098 D625 20 3F D6 TRSFB JSR HPLOT ;Plot the line MOS10 0109 D63D ^35 MOS10 0099 D628 A2 33 LDXIM SPARMS-V ;Move the side up MOS10 0109 D63D ^35 MOS10 0100 D62A 20 0F D7 JSR ULN MOS10 0109 D63D ^35 MOS10 0101 D62D A2 28 LDXIM HPARMS-V ;Move the hypoteneuse up MOS10 0109 D63D ^35 MOS10 0102 D62F 20 0F D7 JSR ULN MOS10 0109 D63D ^35 MOS10 0103 D632 EE 1B 03 INC TRINLN ;Any more lines ? MOS10 0109 D63D ^35 MOS10 0104 D635 D0 EE BNE TRSFB ;Yes, then loop, otherwise MOS10 0109 D63D ^35 MOS10 0105 D637 EE 1C 03 INC TRINLN+&01 MOS10 0109 D63D ^35 MOS10 0106 D63A D0 E9 BNE TRSFB MOS10 0109 D63D ^35 MOS10 0107 D63C MOS10 0109 D63D ^35 MOS10 0108 D63C 28 TRSFA PLP ;Plot the last line? MOS10 0109 D63D ^35 MOS10 0109 D63D 90 B5 BCC TRSRTS ;No, if c=0 -- MOS10 0110 D63F -- MOS10 0111 D63F ;HPLOT Fast plot of horizontal line -- MOS10 0112 D63F ;Plots horizontal line in current colour from points defined -- MOS10 0113 D63F ;at SSTART & HSTART, or, if entered at HPLOTA, from -- MOS10 0114 D63F ;GWTROW+(X) to GWTROW+(Y). -- MOS10 0115 D63F ;Y co-ordinate taken from point at (X) -- MOS10 0116 D63F -- MOS10 0117 D63F A2 39 HPLOT LDXIM SSTART-V ;Initialise point pointers -- MOS10 0118 D641 A0 2E LDYIM HSTART-V -- MOS10 0119 D643 86 DE HPLOTA STX ZTEMPC ;Store these point pointers -- MOS10 0120 D645 BD 00 03 LDAAX V ;Is x co-ord. of (X)<(Y) ? -- MOS10 0121 D648 D9 00 03 CMPAY V -- MOS10 0122 D64B BD 01 03 LDAAX V+&01 -- MOS10 0123 D64E F9 01 03 SBCAY V+&01 -- MOS10 0124 D651 30 06 BMI HPLOTB ;No, then swap (X) < = > (Y) MOS10 0124 D651 v79 MOS10 0125 D653 98 TYA MOS10 0124 D651 v79 MOS10 0126 D654 A4 DE LDY ZTEMPC MOS10 0124 D651 v79 MOS10 0127 D656 AA TAX MOS10 0124 D651 v79 MOS10 0128 D657 86 DE STX ZTEMPC MOS10 0124 D651 v79 MOS10 0129 D659 84 DF HPLOTB STY ZTEMPC +&01 -- MOS10 0130 D65B -- MOS10 0131 D65B ;ZTEMPC & X now contain the offset from V to the L.H. point -- MOS10 0132 D65B ;& ZTEMPC +01 & Y the offset from V to the R.H. point -- MOS10 0133 D65B -- MOS10 0134 D65B B9 00 03 LDAAY V ;Push R.H. x co-ordinate MOS10 MOS10 MOS10 MOS10 Acorn macro assembler Page 38 MOS10 VDU File - MOS10 MOS10 -- MOS10 0135 D65E 48 PHA -- MOS10 0136 D65F B9 01 03 LDAAY V+&01 -- MOS10 0137 D662 48 PHA -- MOS10 0138 D663 A6 DF LDX ZTEMPC +&01 ;Window the R.H. point -- MOS10 0139 D665 20 21 D1 JSR WIND -- MOS10 0140 D668 F0 0D BEQ HPLOTC ;Within window?, then plot to this point MOS10 0140 D668 v72 MOS10 0141 D66A C9 02 CMPIM &02 ;Only other allowed value of this window is 2 MOS10 0140 D668 v72 MOS10 0142 D66C D0 3D BNE HPLOTX ;Exit if this isn't =2 MOS10 0142 D66C v42 MOS10 0143 D66E A2 04 LDXIM GWRCOL-V ;It was 2?, then copy R.H. margin to x co-ord of RH point MOS10 0142 D66C v42 MOS10 0144 D670 A4 DF LDY ZTEMPC+&01 MOS10 0142 D66C v42 MOS10 0145 D672 20 39 D4 JSR COPY2 MOS10 0142 D66C v42 MOS10 0146 D675 A6 DF LDX ZTEMPC+&01 MOS10 0142 D66C v42 MOS10 0147 D677 20 F6 D7 HPLOTC JSR GADDR ;Address (modified) RH end point MOS10 0142 D66C v42 MOS10 0148 D67A A6 DE LDX ZTEMPC ;Window L.H. end point MOS10 0142 D66C v42 MOS10 0149 D67C 20 21 D1 JSR WIND MOS10 0142 D66C v42 MOS10 0150 D67F 4A LSRA ;Only allowed values of this window are 0 & 1 MOS10 0142 D66C v42 MOS10 0151 D680 D0 29 BNE HPLOTX ;Neither of those?, then exit MOS10 0142 D66C v42 MOS10 0152 D682 90 02 BCC HPLOTD ;Window was zero, then don't modify L.H. end point MOS10 0142 D66C v42 MOS10 0153 D684 A2 00 LDXIM GWLCOL-V ;L.H. endpoint was to the left of L. margin, so plot to latter MOS10 0142 D66C v42 MOS10 0154 D686 A4 DF HPLOTD LDY ZTEMPC +&01 ;Point to R.H. end point MOS10 0142 D66C v42 MOS10 0155 D688 38 SEC ;to determine no. of points needed MOS10 0142 D66C v42 MOS10 0156 D689 B9 00 03 LDAAY V ;Generate no. of points to be plotted MOS10 0142 D66C v42 MOS10 0157 D68C FD 00 03 SBCAX V MOS10 0142 D66C v42 MOS10 0158 D68F 85 DC STA ZTEMPB MOS10 0142 D66C v42 MOS10 0159 D691 B9 01 03 LDAAY V+&01 MOS10 0142 D66C v42 MOS10 0160 D694 FD 01 03 SBCAX V+&01 MOS10 0142 D66C v42 MOS10 0161 D697 85 DD STA ZTEMPB +&01 MOS10 0142 D66C v42 MOS10 0162 D699 A9 00 LDAIM &00 ;Generate the mask for the R.H. fractional byte MOS10 0142 D66C v42 MOS10 0163 D69B 0A HPLOTG ASLA MOS10 0142 D66C v42 MOS10 0164 D69C 05 D1 ORA ZMASK ;Generate R.H fractional mask MOS10 0142 D66C v42 MOS10 0165 D69E A4 DC LDY ZTEMPB MOS10 0142 D66C v42 MOS10 0166 D6A0 D0 14 BNE HPLOTE MOS10 0142 D66C v42 MOS10 0167 D6A2 C6 DD DEC ZTEMPB +&01 ;No more points to be plotted ? MOS10 0142 D66C v42 MOS10 0168 D6A4 10 10 BPL HPLOTE MOS10 0142 D66C v42 MOS10 0169 D6A6 85 D1 STA ZMASK ;No?, then plot this byte only MOS10 0142 D66C v42 MOS10 0170 D6A8 20 02 D1 JSR PLOT MOS10 0142 D66C v42 MOS10 0171 D6AB A6 DF HPLOTX LDX ZTEMPC+&01 ;Restore R.H. end point's x co-ordinate MOS10 0219 D6F2 ^37 MOS10 0172 D6AD 68 PLA MOS10 0219 D6F2 ^37 MOS10 0173 D6AE 9D 01 03 STAAX V+&01 MOS10 0219 D6F2 ^37 MOS10 0174 D6B1 68 PLA MOS10 0219 D6F2 ^37 MOS10 0175 D6B2 9D 00 03 STAAX V MOS10 0219 D6F2 ^37 MOS10 0176 D6B5 60 RTS MOS10 0219 D6F2 ^37 MOS10 0177 D6B6 C6 DC HPLOTE DEC ZTEMPB MOS10 0219 D6F2 ^37 MOS10 0178 D6B8 AA TAX ;Continue with generation of R.H. fractional byte mask MOS10 0219 D6F2 ^37 MOS10 0179 D6B9 10 E0 BPL HPLOTG ;until b7 of this mask is set, whence is the mask complete MOS10 0219 D6F2 ^37 MOS10 0180 D6BB 85 D1 STA ZMASK MOS10 0219 D6F2 ^37 MOS10 0181 D6BD 20 02 D1 JSR PLOT ;Plot R.H. fractional byte MOS10 0219 D6F2 ^37 MOS10 0182 D6C0 A6 DC LDX ZTEMPB ;LSB of no. points to be plotted, excl RH fractional byte MOS10 0219 D6F2 ^37 MOS10 0183 D6C2 E8 INX ;Increment this, for no. points is inclusive MOS10 0219 D6F2 ^37 MOS10 0184 D6C3 D0 02 BNE HPLOTL MOS10 0219 D6F2 ^37 MOS10 0185 D6C5 E6 DD INC ZTEMPB +&01 MOS10 0219 D6F2 ^37 MOS10 0186 D6C7 8A HPLOTL TXA MOS10 0219 D6F2 ^37 MOS10 0187 D6C8 48 PHA ;Needed for the determination of the LH fractional byte MOS10 0219 D6F2 ^37 MOS10 0188 D6C9 46 DD LSR ZTEMPB +&01 ;Divide no. points by no.pixels to give no. bytes MOS10 0219 D6F2 ^37 MOS10 0189 D6CB 6A RORA MOS10 0219 D6F2 ^37 MOS10 0190 D6CC AC 61 03 LDY NPIX MOS10 0219 D6F2 ^37 MOS10 0191 D6CF C0 03 CPYIM &03 MOS10 0219 D6F2 ^37 MOS10 0192 D6D1 F0 05 BEQ HPLOTP MOS10 0219 D6F2 ^37 MOS10 0193 D6D3 90 04 BCC HPLOTQ MOS10 0219 D6F2 ^37 MOS10 0194 D6D5 46 DD LSR ZTEMPB +&01 ;y>3, i.e 8 pixels per byte MOS10 0219 D6F2 ^37 MOS10 0195 D6D7 6A RORA MOS10 0219 D6F2 ^37 MOS10 0196 D6D8 [ MOS125 = &FF MOS10 0219 D6F2 ^37 MOS10 0198 D6D8 | MOS10 0219 D6F2 ^37 MOS10 0199 D6D8 HPLOTP ;y=3, i.e. 4 pixels per byte MOS10 0219 D6F2 ^37 MOS10 0200 D6D8 ;ZTEMPB +&01 dead; C dead as A must not exceed &4F MOS10 0219 D6F2 ^37 MOS10 0201 D6D8 ] MOS10 0219 D6F2 ^37 MOS10 0202 D6D8 4A LSRA MOS10 0219 D6F2 ^37 MOS10 0203 D6D9 AC 1A 03 HPLOTQ LDY YLINE ;Prepare ye the way of the loop MOS10 0219 D6F2 ^37 MOS10 0204 D6DC AA TAX ;Contains the nuber of complete bytes to be filled in MOS10 0219 D6F2 ^37 MOS10 0205 D6DD F0 0F BEQ HPLOTF ;None?, then skip to plotting of L.H. fractional byte MOS10 0219 D6F2 ^37 MOS10 0206 D6DF MOS10 0219 D6F2 ^37 MOS10 0207 D6DF 98 HPLOTI TYA ;MAIN FULL BYTE LOOP MOS10 0219 D6F2 ^37 MOS10 0208 D6E0 38 SEC ;Move Y back 8 bytes MOS10 0219 D6F2 ^37 MOS10 0209 D6E1 E9 08 SBCIM &08 MOS10 0219 D6F2 ^37 MOS10 0210 D6E3 A8 TAY MOS10 0219 D6F2 ^37 MOS10 0211 D6E4 B0 02 BCS HPLOTH ;Carry generated? MOS10 0219 D6F2 ^37 MOS10 0212 D6E6 C6 D7 DEC ZMEMG +&01 ;Yes?, then decrement MSB of IY vector MOS10 0219 D6F2 ^37 MOS10 0213 D6E8 20 16 D1 HPLOTH JSR PLOTFF ;Plot the bugger ! MOS10 0219 D6F2 ^37 MOS10 0214 D6EB CA DEX ;Any more ? MOS10 0219 D6F2 ^37 MOS10 0215 D6EC D0 F1 BNE HPLOTI ;Yes, then loop again MOS10 0219 D6F2 ^37 MOS10 0216 D6EE MOS10 0219 D6F2 ^37 MOS10 0217 D6EE 68 HPLOTF PLA ;Pull the LSB of the number of points to plotted MOS10 0219 D6F2 ^37 MOS10 0218 D6EF 2D 61 03 AND NPIX ;No. of points in L.H. fractional byte MOS10 0219 D6F2 ^37 MOS10 0219 D6F2 F0 B7 BEQ HPLOTX ;Leave if nothing to do -- MOS10 0220 D6F4 AA TAX ;Generate the mask for the LH fractional byte -- MOS10 0221 D6F5 A9 00 LDAIM &00 -- MOS10 0222 D6F7 0A HPLOTJ ASLA MOS10 0225 D6FC ^79 MOS10 0223 D6F8 0D 63 03 ORA MASKR MOS10 0225 D6FC ^79 MOS10 0224 D6FB CA DEX MOS10 0225 D6FC ^79 MOS10 0225 D6FC D0 F9 BNE HPLOTJ -- MOS10 0226 D6FE 85 D1 STA ZMASK -- MOS10 0227 D700 98 TYA -- MOS10 0228 D701 38 SEC ;Move Y back 8 bytes again -- MOS10 0229 D702 E9 08 SBCIM &08 -- MOS10 0230 D704 A8 TAY -- MOS10 0231 D705 B0 02 BCS HPLOTK ;Carry generated MOS10 0231 D705 v7D MOS10 0232 D707 C6 D7 DEC ZMEMG +&01 ;Yes?, then decrement MSB of IY vector MOS10 0231 D705 v7D MOS10 0233 D709 20 05 D1 HPLOTK JSR PLOTS ;Plot the L.H. fractional byte -- MOS10 0234 D70C 4C AB D6 JMP HPLOTX -- MOS10 0235 D70F -- MOS10 0236 D70F ;ULN Increments the current graphics line which is drawing the triangle -- MOS10 0237 D70F ;It varies the X points according to the values of the MOD deltas, and -- MOS10 0238 D70F ;the direction byte. -- MOS10 0239 D70F ;As input, it requires in X the offset of the parameter list from V. -- MOS10 0240 D70F ;The parameter list is assumed to be in the following order : -- MOS10 0241 D70F ;Bytes 0-1 "L", the variable used in determining the steps left/right -- MOS10 0242 D70F ;Bytes 2-3 MOD Delta X -- MOS10 0243 D70F ;Bytes 4-5 MOD Delta Y -- MOS10 0244 D70F ;Bytes 6-9 Point from which the line is to be drawn (XL,XH,YL,YH) -- MOS10 0245 D70F ;Byte A Direction - +ve if x increasing as Y does, else -ve -- MOS10 0246 D70F -- MOS10 0247 D70F FE 08 03 ULN INCAX V+&08 ;Increment Y value of point to be drawn from/to -- MOS10 0248 D712 D0 03 BNE ULNA MOS10 0248 D712 v7C MOS10 0249 D714 FE 09 03 INCAX V+&09 MOS10 0248 D712 v7C MOS10 0250 D717 38 ULNA SEC ;L := L - MOD(DeltaX) -- MOS10 0251 D718 BD 00 03 LDAAX V -- MOS10 0252 D71B FD 02 03 SBCAX V+&02 -- MOS10 0253 D71E 9D 00 03 STAAX V -- MOS10 0254 D721 BD 01 03 LDAAX V+&01 -- MOS10 0255 D724 FD 03 03 SBCAX V+&03 -- MOS10 0256 D727 9D 01 03 STAAX V+&01 MOS10 MOS10 MOS10 MOS10 Acorn macro assembler Page 39 MOS10 VDU File - MOS10 MOS10 -- MOS10 0257 D72A 10 2F BPL ULNB ;+ve?, then skip the move X part following MOS10 0257 D72A v50 MOS10 0258 D72C [ MOS125 = &FF MOS10 0257 D72A v50 MOS10 0270 D72C | MOS10 0257 D72A v50 MOS10 0271 D72C 18 ULNF CLC MOS10 0257 D72A v50 MOS10 0272 D72D BD 0A 03 LDAAX V+&0A ;Move X, which direction ? MOS10 0257 D72A v50 MOS10 0273 D730 30 0A BMI ULNC ;Skip if move left MOS10 0257 D72A v50 MOS10 0274 D732 FE 06 03 INCAX V+&06 ;Move right, therefore increment the X value MOS10 0257 D72A v50 MOS10 0275 D735 D0 10 BNE ULND MOS10 0257 D72A v50 MOS10 0276 D737 FE 07 03 INCAX V+&07 MOS10 0257 D72A v50 MOS10 0277 D73A 90 0B BCC ULND ;always branch MOS10 0257 D72A v50 MOS10 0278 D73C BD 06 03 ULNC LDAAX V+&06 ;Move left, therefore decrement X value MOS10 0257 D72A v50 MOS10 0279 D73F D0 03 BNE ULNE MOS10 0257 D72A v50 MOS10 0280 D741 DE 07 03 DECAX V+&07 MOS10 0257 D72A v50 MOS10 0281 D744 DE 06 03 ULNE DECAX V+&06 MOS10 0257 D72A v50 MOS10 0282 D747 ULND ;L := L + MOD DeltaY MOS10 0257 D72A v50 MOS10 0283 D747 ] MOS10 0257 D72A v50 MOS10 0284 D747 BD 00 03 LDAAX V MOS10 0257 D72A v50 MOS10 0285 D74A 7D 04 03 ADCAX V+&04 MOS10 0257 D72A v50 MOS10 0286 D74D 9D 00 03 STAAX V MOS10 0257 D72A v50 MOS10 0287 D750 BD 01 03 LDAAX V+&01 MOS10 0257 D72A v50 MOS10 0288 D753 7D 05 03 ADCAX V+&05 MOS10 0257 D72A v50 MOS10 0289 D756 9D 01 03 STAAX V+&01 MOS10 0257 D72A v50 MOS10 0290 D759 30 D1 BMI ULNF ;Move left/right again ? TRAP HORIZONTAL LINES BEFORE !! MOS10 0257 D72A v50 MOS10 0291 D75B 60 ULNB RTS -- MOS10 0292 D75C LNK MOS11 -- MOS11 0001 D75C -- MOS11 0002 D75C TTL VDU File - MOS11 -- MOS11 0003 D75C OPT MOS11 MOS11 MOS11 MOS11 MOS11 Acorn macro assembler Page 40 MOS11 VDU File - MOS11 MOS11 -- MOS11 0004 D75C -- MOS11 0005 D75C ;Last revision 05/05/82 -- MOS11 0006 D75C -- MOS11 0007 D75C ;05/05/82 Move GADDR here. Change to tabke with 1 entry only -- MOS11 0008 D75C ;01/05/82 Recoded to account for new ordering of variables -- MOS11 0009 D75C ;24/04/82 READCH returns mode in Y, char. in X (AGAIN!) -- MOS11 0010 D75C ;19/04/82 Improved exit at RPXLC -- MOS11 0011 D75C ;16/04/82 improved READCH code -- MOS11 0012 D75C ;25/03/82 Change order of READCH character search -- MOS11 0013 D75C ;22/01/82 Change EIG to EIGABS for READPX -- MOS11 0014 D75C ;07/01/82 Rewrite READCH for non-TTX (GPT) -- MOS11 0015 D75C ;16/11/81 Fix to READCH change (15/11) -- MOS11 0016 D75C ;15/11/81 READCH returns mode in Y, char. in X -- MOS11 0017 D75C ;09/11/81 (Paul) Read start of VDU space coping with model A -- MOS11 0018 D75C -- MOS11 0019 D75C ;READCH Reads the character at the current cursor location, -- MOS11 0020 D75C ;returning the result in A. -- MOS11 0021 D75C ;If the character is not found, 0 is returned. -- MOS11 0022 D75C ;Assumes new font splitting, using FNTFLG & PGSFNT -- MOS11 0023 D75C -- MOS11 0024 D75C READCH -- MOS11 0025 D75C AC 60 03 LDY NCOLOR ;Is it TTX? -- MOS11 0026 D75F D0 0E BNE READCE MOS11 0026 D75F v71 MOS11 0027 D761 B1 D8 LDAIY ZMEMT ;Yes, then read character direct (Y=0) MOS11 0026 D75F v71 MOS11 0028 D763 [ MOS125 = &FF MOS11 0026 D75F v71 MOS11 0036 D763 | MOS11 0026 D75F v71 MOS11 0037 D763 ;CS from OSB or RDCHK->RDCHGY->COPYCH MOS11 0026 D75F v71 MOS11 0038 D763 ;(or RDCHGS->GKEY..RDCHGY->COPYCH after hacking) MOS11 0026 D75F v71 MOS11 0039 D763 18 CLC ;transform only MOS11 0026 D75F v71 MOS11 0040 D764 20 F0 CF JSR TTXFRM ;convert ASCII to Teletext MOS11 0026 D75F v71 MOS11 0041 D767 20 F0 CF JSR TTXFRM ;and again to convert Teletext to ASCII MOS11 0026 D75F v71 MOS11 0042 D76A ] MOS11 0026 D75F v71 MOS11 0043 D76A AC 55 03 READKE LDY MODE ;Only way of getting the mode MOS11 0077 D798 ^50 MOS11 0044 D76D AA TAX MOS11 0077 D798 ^50 MOS11 0045 D76E 60 RTS MOS11 0077 D798 ^50 MOS11 0046 D76F MOS11 0077 D798 ^50 MOS11 0047 D76F MOS11 0077 D798 ^50 MOS11 0048 D76F 20 9A D7 READCE JSR PTCNV ;Get the bit pattern to READWS MOS11 0077 D798 ^50 MOS11 0049 D772 [ MOS125 = &FF MOS11 0077 D798 ^50 MOS11 0052 D772 | MOS11 0077 D798 ^50 MOS11 0053 D772 A9 20 LDAIM &20 ;First character to be checked MOS11 0077 D798 ^50 MOS11 0054 D774 READKF ;Address charcter MOS11 0077 D798 ^50 MOS11 0055 D774 ] MOS11 0077 D798 ^50 MOS11 0056 D774 48 PHA MOS11 0077 D798 ^50 MOS11 0057 D775 20 50 D0 JSR CHADDR ;Result to ZTEMPC MOS11 0077 D798 ^50 MOS11 0058 D778 68 PLA MOS11 0077 D798 ^50 MOS11 0059 D779 AA TAX MOS11 0077 D798 ^50 MOS11 0060 D77A A0 07 READKA LDYIM &07 ;Compare this character MOS11 0077 D798 ^50 MOS11 0061 D77C B9 28 03 READKB LDAAY READWS ;Get bit pattern MOS11 0077 D798 ^50 MOS11 0062 D77F D1 DE CMPIY ZTEMPC ;Compare with font MOS11 0077 D798 ^50 MOS11 0063 D781 D0 08 BNE READKC ;Different?, then not this character MOS11 0077 D798 ^50 MOS11 0064 D783 88 DEY ;Same?, then look at next row down MOS11 0077 D798 ^50 MOS11 0065 D784 10 F6 BPL READKB MOS11 0077 D798 ^50 MOS11 0066 D786 8A TXA MOS11 0077 D798 ^50 MOS11 0067 D787 E0 7F CPXIM &7F ;Is it a DEL? MOS11 0077 D798 ^50 MOS11 0068 D789 D0 DF BNE READKE ;No?, then you have found it MOS11 0077 D798 ^50 MOS11 0069 D78B E8 READKC INX ;Next character up MOS11 0077 D798 ^50 MOS11 0070 D78C A5 DE LDA ZTEMPC ;LSB of font pointer up by 8 MOS11 0077 D798 ^50 MOS11 0071 D78E 18 CLC MOS11 0077 D798 ^50 MOS11 0072 D78F 69 08 ADCIM &08 MOS11 0077 D798 ^50 MOS11 0073 D791 85 DE STA ZTEMPC MOS11 0077 D798 ^50 MOS11 0074 D793 D0 E5 BNE READKA ;More on this page? MOS11 0077 D798 ^50 MOS11 0075 D795 8A TXA ;Finished search? MOS11 0077 D798 ^50 MOS11 0076 D796 D0 DC BNE READKF ;No?, then try next page MOS11 0077 D798 ^50 MOS11 0077 D798 F0 D0 BEQ READKE ;(branch always taken) -- MOS11 0078 D79A -- MOS11 0079 D79A ;Converts the 8,16 or 32 byte character on the screen to an 8 byte -- MOS11 0080 D79A ;bit pattern in Q .. Q+07. Not very fast, in particular, the 8 byte -- MOS11 0081 D79A ;version could be speeded up. Background text colour is recognized -- MOS11 0082 D79A ;as 'background', even if cursors are joined. Anything else is -- MOS11 0083 D79A ;recognised as 'foreground' -- MOS11 0084 D79A -- MOS11 0085 D79A ;ZTEMP is the row number (7..0) -- MOS11 0086 D79A ;ZTEMP +01 is he bit pattern being formed from this row -- MOS11 0087 D79A ;ZTEMPB is the mask being used to isolate the current pixel -- MOS11 0088 D79A -- MOS11 0089 D79A A0 07 PTCNV LDYIM &07 ;The row to be converted -- MOS11 0090 D79C [ MOS125 = &FF -- MOS11 0106 D79C | -- MOS11 0107 D79C ;Adds 4 bytes but OS 1.25 gets them anyway -- MOS11 0108 D79C ;to avoid diverging from 1.26 before GADDR -- MOS11 0109 D79C PTCNVA ;Start of 'convert 1 row' loop -- MOS11 0110 D79C A9 01 LDAIM &01 ;The bit pattern to be formed MOS11 0143 D7CB ^4F MOS11 0111 D79E 85 DB STA ZTEMP +&01 ;Finshed when a carry shifted out MOS11 0143 D7CB ^4F MOS11 0112 D7A0 CD 63 03 CMP MASKR ;C=0 if >1bpp MOS11 0143 D7CB ^4F MOS11 0113 D7A3 PTCNVB MOS11 0143 D7CB ^4F MOS11 0114 D7A3 B1 D8 LDAIY ZMEMT ;Get the byte to be tested MOS11 0143 D7CB ^4F MOS11 0115 D7A5 4D 58 03 EOR BTCOLF ;Isolate back from foreground MOS11 0143 D7CB ^4F MOS11 0116 D7A8 B0 1D BCS PTCNVF ;Write byte directly if 1bpp MOS11 0143 D7CB ^4F MOS11 0117 D7AA 85 DC STA ZTEMPB MOS11 0143 D7CB ^4F MOS11 0118 D7AC AD 62 03 LDA MASKL ;Isolates the pixel to be tested in the current byte MOS11 0143 D7CB ^4F MOS11 0119 D7AF 24 DC PTCNVC BIT ZTEMPB ;Are any of the bits in this pixel set ? MOS11 0143 D7CB ^4F MOS11 0120 D7B1 F0 01 BEQ PTCNVD ;No?, then this pixel was background MOS11 0143 D7CB ^4F MOS11 0121 D7B3 38 SEC ;Yes?, then it was foreground MOS11 0143 D7CB ^4F MOS11 0122 D7B4 26 DB PTCNVD ROL ZTEMP +&01 ;Shift this bit into the bit pattern MOS11 0143 D7CB ^4F MOS11 0123 D7B6 6A RORA ;Isolate the next pixel MOS11 0143 D7CB ^4F MOS11 0124 D7B7 90 F6 BCC PTCNVC ;carry clear, then continue MOS11 0143 D7CB ^4F MOS11 0125 D7B9 30 06 BMI PTCNVE ;pattern overflow?, then this pattern is complete MOS11 0143 D7CB ^4F MOS11 0126 D7BB ] MOS11 0143 D7CB ^4F MOS11 0127 D7BB 98 TYA ;c=1, then examine the next byte in the row MOS11 0143 D7CB ^4F MOS11 0128 D7BC 69 07 ADCIM &07 ;(c=1), by adding 8 to Y MOS11 0143 D7CB ^4F MOS11 0129 D7BE A8 TAY MOS11 0143 D7CB ^4F MOS11 0130 D7BF 90 E2 BCC PTCNVB ;and continue (branch always taken) MOS11 0143 D7CB ^4F MOS11 0131 D7C1 [ MOS125 = &FF MOS11 0143 D7CB ^4F MOS11 0134 D7C1 | MOS11 0143 D7CB ^4F MOS11 0135 D7C1 98 PTCNVE TYA ;Restore Y MOS11 0143 D7CB ^4F MOS11 0136 D7C2 29 07 ANDIM &07 MOS11 0143 D7CB ^4F MOS11 0137 D7C4 A8 TAY MOS11 0143 D7CB ^4F MOS11 0138 D7C5 A5 DB LDA ZTEMP +&01 ;bit pattern finished, store it in the READWS MOS11 0143 D7CB ^4F MOS11 0139 D7C7 PTCNVF MOS11 0143 D7CB ^4F MOS11 0140 D7C7 ] MOS11 0143 D7CB ^4F MOS11 0141 D7C7 99 28 03 STAAY READWS MOS11 0143 D7CB ^4F MOS11 0142 D7CA 88 DEY ;& do the next row up MOS11 0143 D7CB ^4F MOS11 0143 D7CB 10 CF BPL PTCNVA -- MOS11 0144 D7CD [ MOS125 = &FF -- MOS11 0145 D7CD | -- MOS11 0146 D7CD 60 RTS ;removable, padding until next GXR release -- MOS11 0147 D7CE A9 FF RPXLC LDAIM &FF ;Return $FF if point was outside graphics window MOS11 0162 D7DB ^71 MOS11 0148 D7D0 ] MOS11 0162 D7DB ^71 MOS11 0149 D7D0 60 RTS ;or return MOS11 0162 D7DB ^71 MOS11 0150 D7D1 MOS11 MOS11 MOS11 MOS11 Acorn macro assembler Page 41 MOS11 VDU File - MOS11 MOS11 MOS11 0162 D7DB ^71 MOS11 0151 D7D1 ;RPXL Reads the pixel at V+(A), MOS11 0162 D7DB ^71 MOS11 0152 D7D1 ;returning $FF if the cursor is out of the window, else the logical MOS11 0162 D7DB ^71 MOS11 0153 D7D1 ;colour at the cursor. MOS11 0162 D7DB ^71 MOS11 0154 D7D1 ;Assumes the current cursor in internal representation is GCSIY... MOS11 0162 D7DB ^71 MOS11 0155 D7D1 MOS11 0162 D7DB ^71 MOS11 0156 D7D1 48 RPXLD PHA MOS11 0162 D7DB ^71 MOS11 0157 D7D2 AA TAX ;Convert to Ico-ords MOS11 0162 D7DB ^71 MOS11 0158 D7D3 20 5B D1 JSR EIGABS MOS11 0162 D7DB ^71 MOS11 0159 D7D6 68 PLA MOS11 0162 D7DB ^71 MOS11 0160 D7D7 AA TAX MOS11 0162 D7DB ^71 MOS11 0161 D7D8 20 F1 D7 JSR GADDV MOS11 0162 D7DB ^71 MOS11 0162 D7DB D0 F1 BNE RPXLC ;Out of window?, then return $FF. -- MOS11 0163 D7DD B1 D6 LDAIY ZMEMG -- MOS11 0164 D7DF [ MOS125 = &FF -- MOS11 0177 D7DF | -- MOS11 0178 D7DF 85 DA STA ZTEMP -- MOS11 0179 D7E1 B0 01 RPXLA BCS RPXLB ;kick the bit out again if it wasn't relevant MOS11 0184 D7E9 ^76 MOS11 0180 D7E3 4A LSRA MOS11 0184 D7E9 ^76 MOS11 0181 D7E4 06 DA RPXLB ASL ZTEMP ;Shift out the leftmost bit MOS11 0184 D7E9 ^76 MOS11 0182 D7E6 2A ROLA ;& shift into the byte to receive the pixel's logical colour MOS11 0184 D7E9 ^76 MOS11 0183 D7E7 06 D1 ASL ZMASK ;unless the bit was irrelevant MOS11 0184 D7E9 ^76 MOS11 0184 D7E9 D0 F6 BNE RPXLA ;Have we finished ? -- MOS11 0185 D7EB 2D 60 03 AND NCOLOR -- MOS11 0186 D7EE ] -- MOS11 0187 D7EE 60 RPXLX RTS ;& finish MOS11 0193 D7F4 ^78 MOS11 0188 D7EF MOS11 0193 D7F4 ^78 MOS11 0189 D7EF ;Window a point, & plot if in window MOS11 0193 D7F4 ^78 MOS11 0190 D7EF MOS11 0193 D7F4 ^78 MOS11 0191 D7EF A2 20 GADDW LDXIM NEWPT-V ;Do this for new point MOS11 0193 D7F4 ^78 MOS11 0192 D7F1 20 21 D1 GADDV JSR WIND ;Do this for general point. Is it in window ? MOS11 0193 D7F4 ^78 MOS11 0193 D7F4 D0 F8 BNE RPXLX ;No, then skip the windowing -- MOS11 0194 D7F6 -- MOS11 0195 D7F6 ;otherwise fall through to ... -- MOS11 0196 D7F6 -- MOS11 0197 D7F6 ;GADDR Addresses a single pixel on the graphics screen -- MOS11 0198 D7F6 ;Results are not guaranteed unless point is on screen -- MOS11 0199 D7F6 ;Requires :- -- MOS11 0200 D7F6 ;(X) = offset from V of point to be addressed. -- MOS11 0201 D7F6 ;Format of the pointed at point is INTERNAL co-ords, non-inverted Y axis -- MOS11 0202 D7F6 ;with 4 bytes of XL,XH,YL,YH. -- MOS11 0203 D7F6 ;ZTBL points to row offset table as per character writing -- MOS11 0204 D7F6 ;TOPSCN as usual. -- MOS11 0205 D7F6 ;NPIX = No. pixles per byte -- MOS11 0206 D7F6 ;Wraparound may occur on ends of lines only, thus hardware must display -- MOS11 0207 D7F6 ;ALL the characters in the display area (OK for modes as proposed). -- MOS11 0208 D7F6 ;Sets the following variables -- MOS11 0209 D7F6 ;YLINE = line offset within character cell (0..7) -- MOS11 0210 D7F6 ;ZMEMG = 1st byte of character cell -- MOS11 0211 D7F6 ;ZMASK = mask -- MOS11 0212 D7F6 -- MOS11 0213 D7F6 BD 02 03 GADDR LDAAX V+&02 ;(Y,LSB) MSB assumed 0 -- MOS11 0214 D7F9 49 FF EORIM &FF ;Invert Y axis -- MOS11 0215 D7FB A8 TAY -- MOS11 0216 D7FC 29 07 ANDIM &07 ;Get YLINE = 3 least significant bits of Y -- MOS11 0217 D7FE 8D 1A 03 STA YLINE -- MOS11 0218 D801 98 TYA -- MOS11 0219 D802 4A LSRA ;Get twice the character row (for 2 byte entry lookup table) -- MOS11 0220 D803 4A LSRA -- MOS11 0221 D804 4A LSRA -- MOS11 0222 D805 0A ASLA ;c=0 guaranteed (better than AND $FE : CLC) -- MOS11 0223 D806 A8 TAY ;Character row offset -- MOS11 0224 D807 B1 E0 LDAIY ZTBL ;Add row offset to TOPSCN -- MOS11 0225 D809 85 DA STA ZTEMP ;MSB -- MOS11 0226 D80B C8 INY -- MOS11 0227 D80C B1 E0 LDAIY ZTBL ;LSB -- MOS11 0228 D80E AC 56 03 LDY MEMODE -- MOS11 0229 D811 F0 03 BEQ GADDRD ; Divide by 2 if 10K mode (can only be 0 or 2) MOS11 0229 D811 v7C MOS11 0230 D813 46 DA LSR ZTEMP MOS11 0229 D811 v7C MOS11 0231 D815 6A RORA MOS11 0229 D811 v7C MOS11 0232 D816 6D 50 03 GADDRD ADC TOPSCN ;c=0 guaranteed before this add -- MOS11 0233 D819 85 D6 STA ZMEMG -- MOS11 0234 D81B A5 DA LDA ZTEMP -- MOS11 0235 D81D 6D 51 03 ADC TOPSCN+&01 -- MOS11 0236 D820 85 D7 STA ZMEMG +&01 -- MOS11 0237 D822 -- MOS11 0238 D822 ;Now calculate the X offset -- MOS11 0239 D822 -- MOS11 0240 D822 BD 01 03 LDAAX V+&01 ;(MSB,X) -- MOS11 0241 D825 85 DA STA ZTEMP -- MOS11 0242 D827 BD 00 03 LDAAX V ;(LSB,X) -- MOS11 0243 D82A 48 PHA ;Push the LSB of the X co-ordinate -- MOS11 0244 D82B 2D 61 03 AND NPIX ;Calc. ZMASK (NB, c=0 from prev. addition) -- MOS11 0245 D82E 6D 61 03 ADC NPIX ;This gives the correct starting position -- MOS11 0246 D831 A8 TAY ;within the table, plus 1 -- MOS11 0247 D832 B9 06 C4 LDAAY MASKTB-&01 ;So compensate by subtracting one here -- MOS11 0248 D835 85 D1 STA ZMASK -- MOS11 0249 D837 68 PLA ;Retrieve the LSB of X co-ordinate -- MOS11 0250 D838 AC 61 03 LDY NPIX -- MOS11 0251 D83B C0 03 CPYIM &03 ;Divide by NPIX, and mult. by 8 -- MOS11 0252 D83D F0 05 BEQ GADDRA ;4 pixles/byte - mult. by 2 MOS11 0252 D83D v7A MOS11 0253 D83F B0 06 BCS GADDRB ;8 pixles/byte - don't do anything MOS11 0253 D83F v79 MOS11 0254 D841 0A ASLA ;2 pixles per byte - mult. by 4 MOS11 0253 D83F v79 MOS11 0255 D842 26 DA ROL ZTEMP MOS11 0253 D83F v79 MOS11 0256 D844 0A GADDRA ASLA MOS11 0253 D83F v79 MOS11 0257 D845 26 DA ROL ZTEMP MOS11 0253 D83F v79 MOS11 0258 D847 29 F8 GADDRB ANDIM &F8 ;Ignore any low order bits -- MOS11 0259 D849 18 CLC ;Calculate the final address, LSB 1st -- MOS11 0260 D84A 65 D6 ADC ZMEMG -- MOS11 0261 D84C 85 D6 STA ZMEMG -- MOS11 0262 D84E A5 DA LDA ZTEMP -- MOS11 0263 D850 65 D7 ADC ZMEMG +&01 -- MOS11 0264 D852 10 04 BPL GADDRC ;Skip wraparound if < $8000 MOS11 0264 D852 v7B MOS11 0265 D854 38 SEC ;Correct by subtracting off screen if it is MOS11 0264 D852 v7B MOS11 0266 D855 ED 54 03 SBC BYTSCN MOS11 0264 D852 v7B MOS11 0267 D858 85 D7 GADDRC STA ZMEMG +&01 ;Store final address, MSB -- MOS11 0268 D85A AC 1A 03 LDY YLINE -- MOS11 0269 D85D A9 00 COPYZX LDAIM &00 ;Sets z=1 MOS11 0306 D89D ^3E MOS11 0270 D85F 60 RTS MOS11 0306 D89D ^3E MOS11 0271 D860 MOS11 0306 D89D ^3E MOS11 0272 D860 ;VDUB for cursor control keys MOS11 0306 D89D ^3E MOS11 0273 D860 MOS11 0306 D89D ^3E MOS11 0274 D860 VDUB MOS11 0306 D89D ^3E MOS11 0275 D860 48 PHA MOS11 0306 D89D ^3E MOS11 0276 D861 A9 A0 LDAIM &A0 ;To see if the cursors are joined or drivers disabled when BIT is done MOS11 0306 D89D ^3E MOS11 0277 D863 AE 6A 02 LDX QPOSN ;Qing bytes ? MOS11 0306 D89D ^3E MOS11 0278 D866 D0 40 BNE VDUBEX ;Yes?, then ignore this MOS11 0306 D89D ^3E MOS11 0279 D868 24 D0 BIT STATS ;Are the drivers enabled ? MOS11 0306 D89D ^3E MOS11 0280 D86A D0 3C BNE VDUBEX ;Leave if not, or cursors joined MOS11 0306 D89D ^3E MOS11 0281 D86C 70 19 BVS VDUBA ;Are we in cursor edit mode ? Yes?, then skip MOS11 0306 D89D ^3E MOS11 0282 D86E AD 5F 03 LDA CSTEMP ;Flash the cursor at twice the rate MOS11 0306 D89D ^3E MOS11 0283 D871 29 9F ANDIM &9F ;Sets b5=0, b6=1 of r10 of 6845, giving fast flashing cursor MOS11 MOS11 MOS11 MOS11 Acorn macro assembler Page 42 MOS11 VDU File - MOS11 MOS11 MOS11 0306 D89D ^3E MOS11 0284 D873 09 40 ORAIM &40 MOS11 0306 D89D ^3E MOS11 0285 D875 20 2A C9 JSR ETCB ;Store in r10 of 6845, don't save to CSTEMP MOS11 0306 D89D ^3E MOS11 0286 D878 A2 18 LDXIM CSX-V ;Set b1 of STATS or store CSX to PCSX MOS11 0306 D89D ^3E MOS11 0287 D87A A0 64 LDYIM PCSX-V MOS11 0306 D89D ^3E MOS11 0288 D87C 20 39 D4 JSR COPY2 MOS11 0306 D89D ^3E MOS11 0289 D87F 20 70 CD JSR OCSRWR ;Print the output cursor MOS11 0306 D89D ^3E MOS11 0290 D882 A9 02 LDAIM &02 ;Set b1 of STATS MOS11 0306 D89D ^3E MOS11 0291 D884 20 9C C5 JSR STTOR MOS11 0306 D89D ^3E MOS11 0292 D887 A9 BF VDUBA LDAIM &BF ;Clear b6 of STATS MOS11 0306 D89D ^3E MOS11 0293 D889 20 A7 C5 JSR STTAND MOS11 0306 D89D ^3E MOS11 0294 D88C 68 PLA ;Restore input character to routine MOS11 0306 D89D ^3E MOS11 0295 D88D 29 7F ANDIM &7F ;Kill the parity bit MOS11 0306 D89D ^3E MOS11 0296 D88F 20 C0 C4 JSR VDU ;Execute cursor movement on input cursor MOS11 0306 D89D ^3E MOS11 0297 D892 A9 40 LDAIM &40 ;Set b6 of STATS MOS11 0306 D89D ^3E MOS11 0298 D894 4C 9C C5 JMP STTOR MOS11 0306 D89D ^3E MOS11 0299 D897 MOS11 0306 D89D ^3E MOS11 0300 D897 ;Copy key in cursor editing MOS11 0306 D89D ^3E MOS11 0301 D897 MOS11 0306 D89D ^3E MOS11 0302 D897 COPYCH MOS11 0306 D89D ^3E MOS11 0303 D897 A9 20 LDAIM &20 ;Cursors joined ? MOS11 0306 D89D ^3E MOS11 0304 D899 24 D0 BIT STATS MOS11 0306 D89D ^3E MOS11 0305 D89B 50 C0 BVC COPYZX ;Not C.E. mode, then do nothing MOS11 0306 D89D ^3E MOS11 0306 D89D D0 BE BNE COPYZX ;Cursors joined, so do nothing MOS11 0278 D866 v3F MOS11 0307 D89F 20 5C D7 JSR READCH ;Read character at cursor position MOS11 0278 D866 v3F MOS11 0308 D8A2 F0 05 BEQ COPYCX ;Not recognised?, then exit with no further action MOS11 0278 D866 v3F MOS11 0309 D8A4 48 PHA ;Move input cursor right MOS11 0278 D866 v3F MOS11 0310 D8A5 20 63 C6 JSR HT ;But with no scrolling MOS11 0278 D866 v3F MOS11 0311 D8A8 68 VDUBEX PLA MOS11 0308 D8A2 v7A MOS11 0312 D8A9 60 COPYCX RTS -- MOS11 0313 D8AA -- MOS11 0314 D8AA ;CSEDEX Finish cursor edit mode -- MOS11 0315 D8AA -- MOS11 0316 D8AA A9 BD CSEDEX LDAIM &BD ;Clear b1 & b6 from STATS -- MOS11 0317 D8AC 20 A7 C5 JSR STTAND -- MOS11 0318 D8AF 20 27 C9 JSR ETCA ;Restore cursor from CSTEMP to r10 of 6845 -- MOS11 0319 D8B2 A9 0D LDAIM TRMCH ;Restore (A) -- MOS11 0320 D8B4 60 RTS -- MOS11 0321 D8B5 -- MOS11 0322 D8B5 TOPCMD -- MOS11 0323 D8B5 AE 55 03 LDX MODE ;~~~ Beginning of screen memory ~~~ -- MOS11 0324 D8B8 -- MOS11 0325 D8B8 ;& fall through to .... -- MOS11 0326 D8B8 -- MOS11 0327 D8B8 TOPMDX -- MOS11 0328 D8B8 8A TXA ;Don't trust (X) anymore .... -- MOS11 0329 D8B9 29 07 ANDIM &07 -- MOS11 0330 D8BB A8 TAY -- MOS11 0331 D8BC ; read VDU low water mark for mode Y -- MOS11 0332 D8BC BE 40 C4 LDXAY MODETB ;~~~ Read beginning of memory for mode (Y) ~~~ -- MOS11 0333 D8BF BD 5E C4 LDAAX STSCTB ;A := hi-byte of lwm address -- MOS11 0334 D8C2 A2 00 LDXIM &00 ;Used later -- MOS11 0335 D8C4 ; check model type -- MOS11 0336 D8C4 2C 8E 02 BIT MODEL -- MOS11 0337 D8C7 30 07 BMI PRBB1 ;[model B, all modes permissable] MOS11 0337 D8C7 v78 MOS11 0338 D8C9 ; model A MOS11 0337 D8C7 v78 MOS11 0339 D8C9 ; return HWM of zero for modes 0 to 3 MOS11 0337 D8C7 v78 MOS11 0340 D8C9 ; (cos they require between 16K and 20K) MOS11 0337 D8C7 v78 MOS11 0341 D8C9 29 3F ANDIM &3F ;correct for 16K m/c (model A) MOS11 0337 D8C7 v78 MOS11 0342 D8CB C0 04 CPYIM &04 ;fault modes<=3 on model A MOS11 0337 D8C7 v78 MOS11 0343 D8CD B0 01 BCS PRBB1 ;[mode>=4] MOS11 0337 D8C7 v78 MOS11 0344 D8CF 8A TXA ;model A and mode<=3. Sets (A):=0 MOS11 0337 D8C7 v78 MOS11 0345 D8D0 PRBB1 ;return low water mark MOS11 0337 D8C7 v78 MOS11 0346 D8D0 A8 TAY -- MOS11 0347 D8D1 60 RTS -- MOS11 0348 D8D2 -- MOS11 0349 D8D2 ENDVDU ;end of VDU code -- MOS11 0350 D8D2 ; Now test code layout for correctness -- MOS11 0351 D8D2 -- MOS11 0352 D8D2 0000 T1 * SOH:SHR:&8-CODORG:SHR:&3 -- MOS11 0353 D8D2 0000 T2 * DCA:SHR:&8-CODORG:SHR:&3 -- MOS11 0354 D8D2 0000 T3 * DCB:SHR:&8-CODORG:SHR:&3 -- MOS11 0355 D8D2 0000 T4 * DCC:SHR:&8-CODORG:SHR:&3 -- MOS11 0356 D8D2 0000 T5 * SYN:SHR:&8-CODORG:SHR:&3 -- MOS11 0357 D8D2 0000 T6 * ETB:SHR:&8-CODORG:SHR:&3 -- MOS11 0358 D8D2 0000 T7 * CAN:SHR:&8-CODORG:SHR:&3 -- MOS11 0359 D8D2 0000 T8 * EM:SHR:&8-CODORG:SHR:&3 -- MOS11 0360 D8D2 0000 T9 * FS:SHR:&8-CODORG:SHR:&3 -- MOS11 0361 D8D2 0000 TA * GS:SHR:&8-CODORG:SHR:&3 -- MOS11 0362 D8D2 0000 TB * US:SHR:&8-CODORG:SHR:&3 -- MOS11 0363 D8D2 [ T1=0 -- MOS11 0364 D8D2 | -- MOS11 0366 D8D2 ] -- MOS11 0367 D8D2 [ T2=0 -- MOS11 0368 D8D2 | -- MOS11 0370 D8D2 ] -- MOS11 0371 D8D2 [ T3=0 -- MOS11 0372 D8D2 | -- MOS11 0374 D8D2 ] -- MOS11 0375 D8D2 [ T4=0 -- MOS11 0376 D8D2 | -- MOS11 0378 D8D2 ] -- MOS11 0379 D8D2 [ T5=0 -- MOS11 0380 D8D2 | -- MOS11 0382 D8D2 ] -- MOS11 0383 D8D2 [ T6=0 -- MOS11 0384 D8D2 | -- MOS11 0386 D8D2 ] -- MOS11 0387 D8D2 [ T7=0 -- MOS11 0388 D8D2 | -- MOS11 0390 D8D2 ] -- MOS11 0391 D8D2 [ T8=0 -- MOS11 0392 D8D2 | -- MOS11 0394 D8D2 ] -- MOS11 0395 D8D2 [ T9=0 -- MOS11 0396 D8D2 | -- MOS11 0398 D8D2 ] -- MOS11 0399 D8D2 [ TA=0 -- MOS11 0400 D8D2 | -- MOS11 0402 D8D2 ] -- MOS11 0403 D8D2 [ TB=0 -- MOS11 0404 D8D2 | -- MOS11 0406 D8D2 ] -- MOS11 0407 D8D2 -- MOS11 0408 D8D2 00C3 TC * HRGTB:SHR: 8 -- MOS11 0409 D8D2 00C3 TD * TXTTB:SHR: 8 -- MOS11 0410 D8D2 [ TC-TD=0 -- MOS11 0411 D8D2 | -- MOS11 0413 D8D2 ] -- MOS11 0414 D8D2 -- MOS11 0415 D8D2 00CC TE * CLASCA:SHR: 8 -- MOS11 0416 D8D2 00CC TF * CLASCE:SHR: 8 MOS11 MOS11 MOS11 MOS11 Acorn macro assembler Page 43 MOS11 VDU File - MOS11 MOS11 -- MOS11 0417 D8D2 -- MOS11 0418 D8D2 [ TE-TF=0 -- MOS11 0419 D8D2 | -- MOS11 0421 D8D2 ] -- MOS11 0422 D8D2 -- MOS11 0423 D8D2 OPT OPPON -- MOS11 0424 D8D2 < 3 -- MOS11 0425 D8D2 -- MOS11 0426 D8D2 LNK MOS30 -- MOS30 0001 D8D2 ; MOS30 -- MOS30 0002 D8D2 OPT &01 -- MOS30 0003 D8D2 TTL MOS30 Manifests -- MOS30 0004 D8D2 -- MOS30 0005 D8D2 ;Change record: -- MOS30 0006 D8D2 -- MOS30 0007 D8D2 -- MOS30 0008 D8D2 < &0003 -- MOS30 0009 D8D2 > &0002 -- MOS30 0010 D8D2 -- MOS30 0011 D8D2 -- MOS30 0012 D8D2 -- MOS30 0013 D8D2 -- MOS30 0014 D8D2 ; module print selections -- MOS30 0015 D8D2 ; -- MOS30 0016 D8D2 0005 MOS30 * DEFOPT -- MOS30 0017 D8D2 0005 MOS32 * DEFOPT -- MOS30 0018 D8D2 0005 MOS34 * DEFOPT -- MOS30 0019 D8D2 0005 MOS36 * DEFOPT -- MOS30 0020 D8D2 0005 MOS38 * DEFOPT -- MOS30 0021 D8D2 0005 MOS39 * DEFOPT -- MOS30 0022 D8D2 0005 MOS40 * DEFOPT -- MOS30 0023 D8D2 0005 MOS42 * DEFOPT -- MOS30 0024 D8D2 0005 MOS44 * DEFOPT -- MOS30 0025 D8D2 0005 MOS46 * DEFOPT -- MOS30 0026 D8D2 0005 MOS48 * DEFOPT -- MOS30 0027 D8D2 -- MOS30 0028 D8D2 0005 MOS52 * DEFOPT -- MOS30 0029 D8D2 0005 MOS54 * DEFOPT -- MOS30 0030 D8D2 0005 MOS56 * DEFOPT -- MOS30 0031 D8D2 -- MOS30 0032 D8D2 0005 MOS99 * DEFOPT -- MOS30 0033 D8D2 -- MOS30 0034 D8D2 -- MOS30 0035 D8D2 OPT MOS30 MOS30 MOS30 MOS30 MOS30 Acorn macro assembler Page 44 MOS30 MOS30 Manifests MOS30 -- MOS30 0036 D8D2 ;(c) 1981 ACORN Computers Limited -- MOS30 0037 D8D2 ;BBC Microcomputer Machine Operating System (MOS) -- MOS30 0038 D8D2 ;Change record: -- MOS30 0039 D8D2 ;Author(s): -- MOS30 0040 D8D2 ;PB Paul Bond -- MOS30 0041 D8D2 ;MP Mike Prees -- MOS30 0042 D8D2 -- MOS30 0043 D8D2 -- MOS30 0044 D8D2 ; version number -- MOS30 0045 D8D2 ; -- MOS30 0046 D8D2 0001 MCVER * &01 ;OS binary version number -- MOS30 0047 D8D2 0031 VERA * "1" -- MOS30 0048 D8D2 0032 VERB * "2" -- MOS30 0049 D8D2 [ MOS125 = &FF -- MOS30 0051 D8D2 ] -- MOS30 0052 D8D2 [ MOS125 = &7F -- MOS30 0053 D8D2 0036 VERC * "6" -- MOS30 0054 D8D2 ] -- MOS30 0055 D8D2 [ MOS125 = &00 -- MOS30 0057 D8D2 ] -- MOS30 0058 D8D2 -- MOS30 0059 D8D2 -- MOS30 0060 D8D2 ; composition -- MOS30 0061 D8D2 ; -- MOS30 0062 D8D2 0000 TRUE * &00 ;for conditional assembly -- MOS30 0063 D8D2 00FF FALSE * &FF ;for conditional assembly -- MOS30 0064 D8D2 -- MOS30 0065 D8D2 -- MOS30 0066 D8D2 ; options -- MOS30 0067 D8D2 ; -- MOS30 0068 D8D2 0000 INKYSW * TRUE -- MOS30 0069 D8D2 -- MOS30 0070 D8D2 -- MOS30 0071 D8D2 ; VDU software interface -- MOS30 0072 D8D2 ; -- MOS30 0073 D8D2 C300 VDUORG * &C300 ;VDU software module origin -- MOS30 0074 D8D2 C300 VDINIT * VDUORG +&00 ;initialise RAM and VDU -- MOS30 0075 D8D2 D8D2 ORIGIN * ENDVDU -- MOS30 0076 D8D2 -- MOS30 0077 D8D2 -- MOS30 0078 D8D2 ; tube interface -- MOS30 0079 D8D2 ; -- MOS30 0080 D8D2 ^ &0400 -- MOS30 0081 D8D2 0400 TBLANG # &03 ;enter language -- MOS30 0082 D8D2 0403 TBESC # &03 ;alter escape condition -- MOS30 0083 D8D2 0406 TBADDR # &03 ;address translation -- MOS30 0084 D8D2 -- MOS30 0085 D8D2 -- MOS30 0086 D8D2 -- MOS30 0087 D8D2 ; error codes -- MOS30 0088 D8D2 -- MOS30 0089 D8D2 ; special reports -- MOS30 0090 D8D2 ; -- MOS30 0091 D8D2 -- MOS30 0092 D8D2 -- MOS30 0093 D8D2 -- MOS30 0094 D8D2 ; infamous BASIC error number assignment boob -- MOS30 0095 D8D2 ; -- MOS30 0096 D8D2 -- MOS30 0097 D8D2 -- MOS30 0098 D8D2 -- MOS30 0099 D8D2 ; MOS errors -- MOS30 0100 D8D2 ; -- MOS30 0101 D8D2 -- MOS30 0102 D8D2 -- MOS30 0103 D8D2 -- MOS30 0104 D8D2 ; $FF is reserved for a non-trappable error in future systems -- MOS30 0105 D8D2 ; -- MOS30 0106 D8D2 00FE BADCMD * &FE ;'Bad command' -- MOS30 0107 D8D2 00FD BADST * &FD ;'Bad string' -- MOS30 0108 D8D2 00FC BADADR * &FC ;'Bad address' -- MOS30 0109 D8D2 00FB BADKY * &FB ;'Bad key' -- MOS30 0110 D8D2 00FA KEYUSE * &FA ;'Key in use' -- MOS30 0111 D8D2 00F9 NOLROM * &F9 ;'No language ROM' -- MOS30 0112 D8D2 00F8 NOFSYS * &F8 ;'No filing system' -- MOS30 0113 D8D2 00F7 FX0MSG * &F7 ;operating system version number -- MOS30 0114 D8D2 -- MOS30 0115 D8D2 -- MOS30 0116 D8D2 ; file system control operations -- MOS30 0117 D8D2 ; -- MOS30 0118 D8D2 0000 FSOPT * &00 ;*OPT x,y value assumed by FX code -- MOS30 0119 D8D2 0001 FSEOF * &01 ;EOF#chan value assumed by FX code -- MOS30 0120 D8D2 0002 FSNOTA * &02 ;*non-alpha -- MOS30 0121 D8D2 0003 FSNAME * &03 ;*name -- MOS30 0122 D8D2 0004 FSRUN * &04 ;*RUN name -- MOS30 0123 D8D2 0005 FSCAT * &05 ;*CAT name -- MOS30 0124 D8D2 0006 FSDIE * &06 ;kill filing system -- MOS30 0125 D8D2 0007 FSHRNG * &07 ;return handle range in X (lo) and Y (hi) -- MOS30 0126 D8D2 -- MOS30 0127 D8D2 0008 FSCLI * &08 ;*command encountered -- MOS30 0128 D8D2 -- MOS30 0129 D8D2 -- MOS30 0130 D8D2 ; user print operations -- MOS30 0131 D8D2 ; -- MOS30 0132 D8D2 0000 UPTIME * &00 ;timer interrupt -- MOS30 0133 D8D2 0001 UPWRCH * &01 ;write character -- MOS30 0134 D8D2 ; return C=0 => printer busy, C=1 => printer free -- MOS30 0135 D8D2 -- MOS30 0136 D8D2 -- MOS30 0137 D8D2 -- MOS30 0138 D8D2 -- MOS30 0139 D8D2 ; NET operations -- MOS30 0140 D8D2 ; -- MOS30 0141 D8D2 ; hi-level -- MOS30 0142 D8D2 ; -- MOS30 0143 D8D2 ; VALUES $01-$03,$05 RESERVED FOR PRINTER INTERFACE -- MOS30 0144 D8D2 0004 NTWRCH * &04 ;WRCH -- MOS30 0145 D8D2 0006 NTRDCH * &06 ;RDCH -- MOS30 0146 D8D2 -- MOS30 0147 D8D2 0008 NTWORD * &08 ;OSWORD call (c.f. SVWORD) -- MOS30 0148 D8D2 -- MOS30 0149 D8D2 -- MOS30 0150 D8D2 -- MOS30 0151 D8D2 ; service ROM operations -- MOS30 0152 D8D2 ; -- MOS30 0153 D8D2 0010 NROM * &0010 ;number of paged ROMs -- MOS30 0154 D8D2 -- MOS30 0155 D8D2 0000 SVNOP * &00 ;no operation -- MOS30 0156 D8D2 0001 SVSTAT * &01 ;offer static allocation -- MOS30 0157 D8D2 0002 SVDYN * &02 ;offer dynamic allocation -- MOS30 0158 D8D2 0003 SVBOOT * &03 ;offer bootstrap MOS30 MOS30 MOS30 MOS30 Acorn macro assembler Page 45 MOS30 MOS30 Manifests MOS30 -- MOS30 0159 D8D2 0004 SVNAME * &04 ;offer command -- MOS30 0160 D8D2 0005 SVINT * &05 ;unknown interrupt -- MOS30 0161 D8D2 0006 SVBRK * &06 ;offer BRK -- MOS30 0162 D8D2 0007 SVBYTE * &07 ;offer bad OSBYTE (N.B. also NTxxxx code) -- MOS30 0163 D8D2 0008 SVWORD * &08 ;offer bad OSWORD (N.B. also NTxxxx code) -- MOS30 0164 D8D2 ; -- MOS30 0165 D8D2 [ FALSE=0 -- MOS30 0167 D8D2 | -- MOS30 0168 D8D2 0009 SVHELP * &09 ;*HELP facility -- MOS30 0169 D8D2 ] -- MOS30 0170 D8D2 ; -- MOS30 0171 D8D2 000A SVCSHR * &0A ;claim shared workspace -- MOS30 0172 D8D2 000B SVRNMI * &0B ;release NMI -- MOS30 0173 D8D2 000C SVCNMI * &0C ;claim NMI -- MOS30 0174 D8D2 000D SVISFS * &0D ;initialise speech filing system -- MOS30 0175 D8D2 000E SVRSFS * &0E ;read from speech filing system -- MOS30 0176 D8D2 000F SVFSIC * &0F ;changed filing system indirections -- MOS30 0177 D8D2 -- MOS30 0178 D8D2 0010 SVSHES * &10 ;shut EXEC and SPOOL files -- MOS30 0179 D8D2 0011 SVHWMC * &11 ;change of HWM ******** DO NOT CHANGE ******** -- MOS30 0180 D8D2 0012 SVSTFS * &12 ;start filing system N -- MOS30 0181 D8D2 00FE SVTPIN * &FE ;tube post-initialisation **** VALUE ASSUMED BY RESET **** -- MOS30 0182 D8D2 00FF SVTUBE * &FF ;initialise tube software -- MOS30 0183 D8D2 -- MOS30 0184 D8D2 -- MOS30 0185 D8D2 ; language entry reasons -- MOS30 0186 D8D2 ; -- MOS30 0187 D8D2 0000 LGNONE * &00 ;no language ROM (tube entry reason) -- MOS30 0188 D8D2 0001 LGENTR * &01 ;enter language -- MOS30 0189 D8D2 -- MOS30 0190 D8D2 -- MOS30 0191 D8D2 ; RS423 transmitter control bits -- MOS30 0192 D8D2 ; -- MOS30 0193 D8D2 0000 RHITXD * &00 ;RTS hi, Tx interrupt disabled -- MOS30 0194 D8D2 0020 RHITXE * &20 ;RTS hi, Tx interrupt enabled -- MOS30 0195 D8D2 0040 RLOTXD * &40 ;RTS lo, Tx interrupt disabled -- MOS30 0196 D8D2 0060 RHITXB * &60 ;RTS hi, Tx break -- MOS30 0197 D8D2 0056 RSCDEF * &16+RLOTXD ;Rx interrupt disabled ... -- MOS30 0198 D8D2 ; ... RTS lo, Tx interrupt disabled, divide by 64, 8 data bits, 1 stop bit -- MOS30 0199 D8D2 -- MOS30 0200 D8D2 -- MOS30 0201 D8D2 ; speech processor opcodes -- MOS30 0202 D8D2 ; -- MOS30 0203 D8D2 0010 SPOPRB * &10 ;read byte -- MOS30 0204 D8D2 0060 SPOPSE * &60 ;speak external -- MOS30 0205 D8D2 0030 SPOPBR * &30 ;read and branch -- MOS30 0206 D8D2 0040 SPOPLA * &40 ;load address -- MOS30 0207 D8D2 0050 SPOPSP * &50 ;speak -- MOS30 0208 D8D2 00FF SPOPRT * &FF ;reset -- MOS30 0209 D8D2 -- MOS30 0210 D8D2 -- MOS30 0211 D8D2 ; memory map assignments -- MOS30 0212 D8D2 ; -- MOS30 0213 D8D2 FC00 FRED * &FC00 -- MOS30 0214 D8D2 FCFF MEG1P * &FCFF ;1MHz bus page selector -- MOS30 0215 D8D2 FD00 JIM * &FD00 -- MOS30 0216 D8D2 FE00 SHEIL * &FE00 -- MOS30 0217 D8D2 FE08 ACIA * &FE08 -- MOS30 0218 D8D2 FE10 SERPRC * &FE10 ;serial processor -- MOS30 0219 D8D2 -- MOS30 0220 D8D2 FE20 VPROC0 * &FE20 ;video processor -- MOS30 0221 D8D2 FE21 VPROC1 * VPROC0 +&01 -- MOS30 0222 D8D2 FE20 STNID * &FE20 ;ECONET station identifier -- MOS30 0223 D8D2 FE30 ROM * &FE30 ;ROM select latch -- MOS30 0224 D8D2 FE40 VIAA * &FE40 ;first 6522 -- MOS30 0225 D8D2 FE60 VIAB * &FE60 ;second 6522 -- MOS30 0226 D8D2 -- MOS30 0227 D8D2 -- MOS30 0228 D8D2 ; analog to digital converter -- MOS30 0229 D8D2 ; -- MOS30 0230 D8D2 FEC0 ADCONV * &FEC0 -- MOS30 0231 D8D2 FEC0 ADCCTL * ADCONV +&00 -- MOS30 0232 D8D2 FEC1 ADCHI * ADCONV +&01 -- MOS30 0233 D8D2 FEC2 ADCLO * ADCONV +&02 -- MOS30 0234 D8D2 -- MOS30 0235 D8D2 -- MOS30 0236 D8D2 ; tube register(s) -- MOS30 0237 D8D2 ; -- MOS30 0238 D8D2 FEE0 TREG0 * &FEE0 -- MOS30 0239 D8D2 FEE5 TREG3 * &FEE5 -- MOS30 0240 D8D2 -- MOS30 0241 D8D2 -- MOS30 0242 D8D2 -- MOS30 0243 D8D2 ; test software indirection -- MOS30 0244 D8D2 ; -- MOS30 0245 D8D2 FDFE TSTSFT * &FDFE -- MOS30 0246 D8D2 -- MOS30 0247 D8D2 -- MOS30 0248 D8D2 ; language ROM address -- MOS30 0249 D8D2 ; -- MOS30 0250 D8D2 8000 LANG * &8000 -- MOS30 0251 D8D2 8000 ROMHRD * LANG +&00 ;hard ROM entry point -- MOS30 0252 D8D2 8003 ROMSFT * LANG +&03 ;soft ROM entry point -- MOS30 0253 D8D2 -- MOS30 0254 D8D2 8006 ROMTYP * LANG +&06 ;ROM type -- MOS30 0255 D8D2 8007 COPYRP * LANG +&07 ;relative offset (from LANG) to copyright string -- MOS30 0256 D8D2 8008 ROMVER * LANG +&08 ;version byte -- MOS30 0257 D8D2 8009 ROMMSG * LANG +&09 ;name -- MOS30 0258 D8D2 -- MOS30 0259 D8D2 -- MOS30 0260 D8D2 ; miscellaneous constants -- MOS30 0261 D8D2 ; -- MOS30 0262 D8D2 0000 ZERO * &00 -- MOS30 0263 D8D2 0000 NULL * ZERO ;don't care value -- MOS30 0264 D8D2 0020 SPACE * &20 -- MOS30 0265 D8D2 0040 AT * &40 -- MOS30 0266 D8D2 0041 ALPHAA * "A" -- MOS30 0267 D8D2 0022 DQUOTE * """" -- MOS30 0268 D8D2 002A SPLAT * "*" -- MOS30 0269 D8D2 0060 POUND * &60 -- MOS30 0270 D8D2 -- MOS30 0271 D8D2 -- MOS30 0272 D8D2 -- MOS30 0273 D8D2 0007 BEL * &07 -- MOS30 0274 D8D2 -- MOS30 0275 D8D2 0009 MHT * &09 -- MOS30 0276 D8D2 0009 TAB * MHT -- MOS30 0277 D8D2 000A MLF * &0A -- MOS30 0278 D8D2 000D MCR * &0D -- MOS30 0279 D8D2 0015 MNAK * &15 -- MOS30 0280 D8D2 MOS30 MOS30 MOS30 MOS30 Acorn macro assembler Page 46 MOS30 MOS30 Manifests MOS30 -- MOS30 0281 D8D2 001B ESC * &1B -- MOS30 0282 D8D2 007F MDEL * &7F -- MOS30 0283 D8D2 -- MOS30 0284 D8D2 -- MOS30 0285 D8D2 ; real softkeys -- MOS30 0286 D8D2 ; -- MOS30 0287 D8D2 0080 SOFTK0 * &0080 ;f0 (value must NOT be altered) -- MOS30 0288 D8D2 0081 SOFTK1 * SOFTK0 +&01 ;f1 -- MOS30 0289 D8D2 0082 SOFTK2 * SOFTK1 +&01 ;f2 -- MOS30 0290 D8D2 0083 SOFTK3 * SOFTK2 +&01 ;f3 -- MOS30 0291 D8D2 0084 SOFTK4 * SOFTK3 +&01 ;f4 -- MOS30 0292 D8D2 0085 SOFTK5 * SOFTK4 +&01 ;f5 -- MOS30 0293 D8D2 0086 SOFTK6 * SOFTK5 +&01 ;f6 -- MOS30 0294 D8D2 0087 SOFTK7 * SOFTK6 +&01 ;f7 -- MOS30 0295 D8D2 0088 SOFTK8 * SOFTK7 +&01 ;f8 -- MOS30 0296 D8D2 0089 SOFTK9 * SOFTK8 +&01 ;f9 -- MOS30 0297 D8D2 -- MOS30 0298 D8D2 -- MOS30 0299 D8D2 ; pseudo softkeys, including cursor controls -- MOS30 0300 D8D2 ; -- MOS30 0301 D8D2 008A SOFTKA * SOFTK9 +&01 -- MOS30 0302 D8D2 008B SOFTKB * SOFTKA +&01 ;COPY -- MOS30 0303 D8D2 008B MCOPY * SOFTKB -- MOS30 0304 D8D2 008C SOFTKC * SOFTKB +&01 ;cursor left arrow -- MOS30 0305 D8D2 008C CURLFT * SOFTKC -- MOS30 0306 D8D2 008D SOFTKD * SOFTKC +&01 ;cursor right arrow -- MOS30 0307 D8D2 008D CURRHT * SOFTKD -- MOS30 0308 D8D2 008E SOFTKE * SOFTKD +&01 ;cursor down -- MOS30 0309 D8D2 008E CURDWN * SOFTKE -- MOS30 0310 D8D2 008F SOFTKF * SOFTKE +&01 ;cursor up -- MOS30 0311 D8D2 008F CURUP * SOFTKF -- MOS30 0312 D8D2 00BF MAXSK * &BF ;maximum value of SHIFT/CTRL softkey code -- MOS30 0313 D8D2 00CA BREKEY * &CA ;softkey 10 feature -- MOS30 0314 D8D2 -- MOS30 0315 D8D2 -- MOS30 0316 D8D2 ; default auto-repeat rates -- MOS30 0317 D8D2 ; -- MOS30 0318 D8D2 0032 DAUTOD * 50 ;delay (centiseconds) -- MOS30 0319 D8D2 0008 DAUTOP * 8 ;period (centiseconds) -- MOS30 0320 D8D2 -- MOS30 0321 D8D2 -- MOS30 0322 D8D2 ; default RS423 baud rates -- MOS30 0323 D8D2 ; -- MOS30 0324 D8D2 0064 B9600 * &64 ;Tx9600 and Rx9600 -- MOS30 0325 D8D2 -- MOS30 0326 D8D2 -- MOS30 0327 D8D2 ; RS423 printer timeout period -- MOS30 0328 D8D2 ; -- MOS30 0329 D8D2 00E7 PTIMUT * &E7 ;(-) 25/50 second -- MOS30 0330 D8D2 -- MOS30 0331 D8D2 -- MOS30 0332 D8D2 ; OS constants -- MOS30 0333 D8D2 0E00 OSHWM * &0E00 ;default high water mark -- MOS30 0334 D8D2 0D00 NMI * &0D00 -- MOS30 0335 D8D2 -- MOS30 0336 D8D2 -- MOS30 0337 D8D2 ; buffer indices -- MOS30 0338 D8D2 ; -- MOS30 0339 D8D2 0000 BRDCH * &0000 ;RDCH (keyboard) -- MOS30 0340 D8D2 0001 BRSI * &0001 ;RS423 input -- MOS30 0341 D8D2 0001 INPUT * BRSI -- MOS30 0342 D8D2 0002 BRSO * &0002 ;RS423 output -- MOS30 0343 D8D2 0002 OUTPUT * BRSO -- MOS30 0344 D8D2 0003 BPRNT * &0003 ;print -- MOS30 0345 D8D2 0004 BSND1 * &0004 ;sound channel 1 -- MOS30 0346 D8D2 0005 BSND2 * BSND1+&1 ;sound channel 2 -- MOS30 0347 D8D2 0006 BSND3 * BSND2+&1 ;sound channel 3 -- MOS30 0348 D8D2 0007 BSND4 * BSND3+&1 ;sound channel 4 -- MOS30 0349 D8D2 0008 BSPCH * BSND4+&1 ;speech -- MOS30 0350 D8D2 0008 BUPB * BSPCH -- MOS30 0351 D8D2 -- MOS30 0352 D8D2 -- MOS30 0353 D8D2 ; keyboard status bits -- MOS30 0354 D8D2 ; -- MOS30 0355 D8D2 0008 SHFT * &08 ;SHIFT active -- MOS30 0356 D8D2 0010 CAPSL * &10 ;not CAPITALS lock -- MOS30 0357 D8D2 0020 SHFTL * &20 ;not SHIFT lock -- MOS30 0358 D8D2 0040 CTRL * &40 ;CTRL active -- MOS30 0359 D8D2 0080 INVERT * &80 ;SHIFT enable -- MOS30 0360 D8D2 00B7 CTLSHI * &B7 ;inverted (CTRL and SHIFT status bits) -- MOS30 0361 D8D2 -- MOS30 0362 D8D2 -- MOS30 0363 D8D2 ; keyboard matrix element values -- MOS30 0364 D8D2 ; -- MOS30 0365 D8D2 00C0 CPLKKY * &C0 ;CAPITALS lock key -- MOS30 0366 D8D2 00D0 SHLKKY * &D0 ;SHIFT lock key -- MOS30 0367 D8D2 -- MOS30 0368 D8D2 -- MOS30 0369 D8D2 ; FX numbers -- MOS30 0370 D8D2 ; -- MOS30 0371 D8D2 0088 FXCODE * &88 -- MOS30 0372 D8D2 0089 FXMOTR * &89 -- MOS30 0373 D8D2 008B FXOPT * &8B -- MOS30 0374 D8D2 008C FXTAPE * &8C -- MOS30 0375 D8D2 008D FXSROM * &8D -- MOS30 0376 D8D2 0090 FXTV * &90 -- MOS30 0377 D8D2 -- MOS30 0378 D8D2 -- MOS30 0379 D8D2 ; MC6850 addresses -- MOS30 0380 D8D2 ; -- MOS30 0381 D8D2 FE08 RSCTL * ACIA -- MOS30 0382 D8D2 FE08 RSTAT * ACIA -- MOS30 0383 D8D2 FE09 RSDATA * ACIA +&01 -- MOS30 0384 D8D2 -- MOS30 0385 D8D2 -- MOS30 0386 D8D2 ; miscellaneous -- MOS30 0387 D8D2 ; -- MOS30 0388 D8D2 0004 NADC * &04 ;number of ADC channels -- MOS30 0389 D8D2 -- MOS30 0390 D8D2 -- MOS30 0391 D8D2 ; 6522 addresses -- MOS30 0392 D8D2 ; -- MOS30 0393 D8D2 FE40 PBQ * VIAA -- MOS30 0394 D8D2 FE41 PAQ * VIAA +&01 -- MOS30 0395 D8D2 FE42 DDRBQ * VIAA +&02 -- MOS30 0396 D8D2 FE43 DDRAQ * VIAA +&03 -- MOS30 0397 D8D2 FE44 TQCLQ * VIAA +&04 -- MOS30 0398 D8D2 FE45 TQCHQ * VIAA +&05 -- MOS30 0399 D8D2 FE46 TQLLQ * VIAA +&06 -- MOS30 0400 D8D2 FE47 TQLHQ * VIAA +&07 -- MOS30 0401 D8D2 FE48 TRCLQ * VIAA +&08 MOS30 MOS30 MOS30 MOS30 Acorn macro assembler Page 47 MOS30 MOS30 Manifests MOS30 -- MOS30 0402 D8D2 FE49 TRCHQ * VIAA +&09 -- MOS30 0403 D8D2 FE4A SRQ * VIAA +&0A -- MOS30 0404 D8D2 FE4B ACRQ * VIAA +&0B -- MOS30 0405 D8D2 FE4C PCRQ * VIAA +&0C -- MOS30 0406 D8D2 000A CAPULS * &0A -- MOS30 0407 D8D2 000C CA2LO * &0C -- MOS30 0408 D8D2 000E CA2HI * &0E -- MOS30 0409 D8D2 00A0 CBPULS * &A0 -- MOS30 0410 D8D2 00C0 CB2LO * &C0 -- MOS30 0411 D8D2 00E0 CB2HI * &E0 -- MOS30 0412 D8D2 FE4D IFRQ * VIAA +&0D -- MOS30 0413 D8D2 FE4E IERQ * VIAA +&0E -- MOS30 0414 D8D2 FE4F PAPQ * VIAA +&0F -- MOS30 0415 D8D2 FE60 PBR * VIAB -- MOS30 0416 D8D2 FE61 PAR * VIAB +&01 -- MOS30 0417 D8D2 FE62 DDRBR * VIAB +&02 -- MOS30 0418 D8D2 FE63 DDRAR * VIAB +&03 -- MOS30 0419 D8D2 FE64 TQCLR * VIAB +&04 -- MOS30 0420 D8D2 FE65 TQCHR * VIAB +&05 -- MOS30 0421 D8D2 FE66 TQLLR * VIAB +&06 -- MOS30 0422 D8D2 FE67 TQLHR * VIAB +&07 -- MOS30 0423 D8D2 FE68 TRCLR * VIAB +&08 -- MOS30 0424 D8D2 FE69 TRCHR * VIAB +&09 -- MOS30 0425 D8D2 FE6A SRR * VIAB +&0A -- MOS30 0426 D8D2 FE6B ACRR * VIAB +&0B -- MOS30 0427 D8D2 FE6C PCRR * VIAB +&0C -- MOS30 0428 D8D2 FE6D IFRR * VIAB +&0D -- MOS30 0429 D8D2 FE6E IERR * VIAB +&0E -- MOS30 0430 D8D2 FE6F PAPR * VIAB +&0F -- MOS30 0431 D8D2 -- MOS30 0432 D8D2 -- MOS30 0433 D8D2 ; interrupt flags in 6522 IER and IFR -- MOS30 0434 D8D2 ; -- MOS30 0435 D8D2 0002 CA1 * &0002 -- MOS30 0436 D8D2 0001 CA2 * &0001 -- MOS30 0437 D8D2 0010 CB1 * &0010 -- MOS30 0438 D8D2 0008 CB2 * &0008 -- MOS30 0439 D8D2 0040 TIMER1 * &0040 -- MOS30 0440 D8D2 0020 TIMER2 * &0020 -- MOS30 0441 D8D2 -- MOS30 0442 D8D2 -- MOS30 0443 D8D2 ; VIA pin assignments -- MOS30 0444 D8D2 ; -- MOS30 0445 D8D2 ; VIAA:- -- MOS30 0446 D8D2 ; PA7-PA0 keyboard -- MOS30 0447 D8D2 ; CA1 VSYNC interrupt -- MOS30 0448 D8D2 0002 VSYNC * CA1 -- MOS30 0449 D8D2 ; CA2 keyboard interrupt ('any key down') -- MOS30 0450 D8D2 0001 KEYBD * CA2 -- MOS30 0451 D8D2 ; PB7 VSP interrupt -- MOS30 0452 D8D2 ; PB6 VSP ready -- MOS30 0453 D8D2 ; PB5,PB4 paddle -- MOS30 0454 D8D2 ; PB3-PB0 addressable latch -- MOS30 0455 D8D2 ; PB3 data value -- MOS30 0456 D8D2 ; PB2-PB0 latch register -- MOS30 0457 D8D2 ; 0 sound enable -- MOS30 0458 D8D2 ; 1 speech RS -- MOS30 0459 D8D2 ; 2 speech WS -- MOS30 0460 D8D2 ; 3 keyboard disable -- MOS30 0461 D8D2 ; 4,5 hardware scroll -- MOS30 0462 D8D2 ; 6,7 ROM select -- MOS30 0463 D8D2 ; CB1 ADC -- MOS30 0464 D8D2 0010 ADC * CB1 -- MOS30 0465 D8D2 ; CB2 light pen -- MOS30 0466 D8D2 -- MOS30 0467 D8D2 ; VIAB:- -- MOS30 0468 D8D2 ; PA7-PA0 printer output -- MOS30 0469 D8D2 ; CA1 printer acknowledge -- MOS30 0470 D8D2 0002 PRNT * CA1 -- MOS30 0471 D8D2 ; CA2 printer strobe -- MOS30 0472 D8D2 ; PB7-PB0 reserved for user -- MOS30 0473 D8D2 ; CB1 reserved for user -- MOS30 0474 D8D2 ; CB2 reserved for user -- MOS30 0475 D8D2 ; TIMER 1 = MAIN CLOCK -- MOS30 0476 D8D2 0040 CLOCK * TIMER1 -- MOS30 0477 D8D2 -- MOS30 0478 D8D2 -- MOS30 0479 D8D2 ; page one is main system stack -- MOS30 0480 D8D2 ; -- MOS30 0481 D8D2 00FF STACK * &FF -- MOS30 0482 D8D2 -- MOS30 0483 D8D2 -- MOS30 0484 D8D2 -- MOS30 0485 D8D2 ; BUFFERS -- MOS30 0486 D8D2 -- MOS30 0487 D8D2 -- MOS30 0488 D8D2 ; keyboard -- MOS30 0489 D8D2 ; -- MOS30 0490 D8D2 03E0 RDCHBF * &03E0 ;RDCH (keyboard) buffer -- MOS30 0491 D8D2 0020 RDCHSZ * &0020 -- MOS30 0492 D8D2 -- MOS30 0493 D8D2 -- MOS30 0494 D8D2 ; sound -- MOS30 0495 D8D2 ; -- MOS30 0496 D8D2 0800 SNDWRK * &0800 ;sound workspace -- MOS30 0497 D8D2 0804 MACTIV * SNDWRK+&04 ;activation flags -- MOS30 0498 D8D2 -- MOS30 0499 D8D2 0840 SNDBF1 * &0840 ;sound buffer channel 1 -- MOS30 0500 D8D2 0010 SBSIZE * &0010 ;sound buffer size -- MOS30 0501 D8D2 0850 SNDBF2 * SNDBF1+SBSIZE ;sound buffer channel 2 -- MOS30 0502 D8D2 0860 SNDBF3 * SNDBF2+SBSIZE ;sound buffer channel 3 -- MOS30 0503 D8D2 0870 SNDBF4 * SNDBF3+SBSIZE ;sound buffer channel 4 -- MOS30 0504 D8D2 -- MOS30 0505 D8D2 -- MOS30 0506 D8D2 ; printer -- MOS30 0507 D8D2 ; -- MOS30 0508 D8D2 0880 PRNBF * &0880 ;print buffer -- MOS30 0509 D8D2 0040 PRNSZ * &0040 -- MOS30 0510 D8D2 -- MOS30 0511 D8D2 -- MOS30 0512 D8D2 ; envelopes -- MOS30 0513 D8D2 ; -- MOS30 0514 D8D2 08C0 ENVEL * &08C0 ;sound envelopes -- MOS30 0515 D8D2 0010 ENVSIZ * &0010 ;size of each envelope -- MOS30 0516 D8D2 0004 NENV * &0004 ;number of envelopes -- MOS30 0517 D8D2 -- MOS30 0518 D8D2 -- MOS30 0519 D8D2 ; RS423 output -- MOS30 0520 D8D2 ; -- MOS30 0521 D8D2 0900 RSROBF * &0900 ;RS423 output -- MOS30 0522 D8D2 00C0 RSROSZ * &00C0 MOS30 MOS30 MOS30 MOS30 Acorn macro assembler Page 48 MOS30 MOS30 Manifests MOS30 -- MOS30 0523 D8D2 -- MOS30 0524 D8D2 -- MOS30 0525 D8D2 ; speech -- MOS30 0526 D8D2 ; -- MOS30 0527 D8D2 09C0 SPCHBF * &09C0 ;speech buffer -- MOS30 0528 D8D2 0040 SPCHSZ * &0040 -- MOS30 0529 D8D2 -- MOS30 0530 D8D2 -- MOS30 0531 D8D2 ; RS423 input -- MOS30 0532 D8D2 ; -- MOS30 0533 D8D2 0A00 RSRIBF * &0A00 ;RS423 input -- MOS30 0534 D8D2 0100 RSRISZ * &0100 -- MOS30 0535 D8D2 0008 RSOVR * 8 ;handshake overflow allowance -- MOS30 0536 D8D2 -- MOS30 0537 D8D2 -- MOS30 0538 D8D2 ; soft key buffer -- MOS30 0539 D8D2 ; -- MOS30 0540 D8D2 0B00 SKPTR * &0B00 ;pointers to soft key strings -- MOS30 0541 D8D2 0010 NSOFTK * 16 -- MOS30 0542 D8D2 0B01 SKBUF * SKPTR+&01 ;N.B. soft key pointers are relative to this origin -- MOS30 0543 D8D2 0B10 SKEND * SKPTR+NSOFTK ;logical end of string -- MOS30 0544 D8D2 00EF TOTSFT * SKPTR+&0100-SKEND-&01 ;soft key data byte size -- MOS30 0545 D8D2 -- MOS30 0546 D8D2 -- MOS30 0547 D8D2 LNK MOS32 -- MOS32 0001 D8D2 -- MOS32 0002 D8D2 ; -> MOS32 -- MOS32 0003 D8D2 TTL MOS32 Initialisation and external interfaces -- MOS32 0004 D8D2 OPT MOS32 MOS32 MOS32 MOS32 MOS32 Acorn macro assembler Page 49 MOS32 MOS32 Initialisation and external interfaces MOS32 -- MOS32 0005 D8D2 ;(c) 1981 ACORN Computers Limited -- MOS32 0006 D8D2 ;BBC Microcomputer Machine Operating System (MOS) -- MOS32 0007 D8D2 ;Change record: -- MOS32 0008 D8D2 ;Author(s): -- MOS32 0009 D8D2 ;PB Paul Bond -- MOS32 0010 D8D2 ;MP Mike Prees -- MOS32 0011 D8D2 -- MOS32 0012 D8D2 -- MOS32 0013 D8D2 ; origin of real code -- MOS32 0014 D8D2 ORG ORIGIN ;MOS starts where VDU ends -- MOS32 0015 D8D2 -- MOS32 0016 D8D2 -- MOS32 0017 D8D2 IPAGE0 ;page zero values -- MOS32 0018 D8D2 ; externally accessed zero page values -- MOS32 0019 D8D2 ^ &00FF -- MOS32 0020 D8D2 ; -- MOS32 0021 D8D2 00FF ESCFLG # 0 ;Bit 7 of this is the escape flag -- MOS32 0022 D8D2 -- MOS32 0023 D8D2 -- MOS32 0024 D8D2 ; bit7 escape pending -- MOS32 0025 D8D2 ;= ZERO -- MOS32 0026 D8D2 -- MOS32 0027 D8D2 00FF # -2 -- MOS32 0028 D8D2 00FD REPTR # &00 ;pointer after BRK -- MOS32 0029 D8D2 ;= NULL /;hi-byte -- MOS32 0030 D8D2 ;= NULL ;lo-byte -- MOS32 0031 D8D2 -- MOS32 0032 D8D2 00FD # -1 -- MOS32 0033 D8D2 00FC TEMPA # &00 ;user IRQ routine save slot for register A -- MOS32 0034 D8D2 ;= NULL -- MOS32 0035 D8D2 -- MOS32 0036 D8D2 00FC # -2 -- MOS32 0037 D8D2 00FA SEIWK # &00 ;two work slots used whilst interrupts disabled -- MOS32 0038 D8D2 ; -- MOS32 0039 D8D2 00FA JMILO * SEIWK +&00 ;used by OSBYTE/OSWORD -- MOS32 0040 D8D2 00FB JMIHI * SEIWK +&01 ;used by OSBYTE/OSWORD -- MOS32 0041 D8D2 ; -- MOS32 0042 D8D2 00FA KEYSV * SEIWK +&00 ;work area for ... -- MOS32 0043 D8D2 00FB SKSZWK * SEIWK +&01 ; ... soft key compaction (also SKSIZE) -- MOS32 0044 D8D2 ; -- MOS32 0045 D8D2 00FA KTEMP * SEIWK +&00 ;work area for keyboard -- MOS32 0046 D8D2 ; -- MOS32 0047 D8D2 00FA BUFFLO * SEIWK +&00 ;work slots used by buffer management -- MOS32 0048 D8D2 00FB BUFFHI * SEIWK +&01 -- MOS32 0049 D8D2 ; -- MOS32 0050 D8D2 00FA CRLO * SEIWK +&00 ;work slots used during ROM compare -- MOS32 0051 D8D2 00FB CRHI * SEIWK +&01 -- MOS32 0052 D8D2 ; -- MOS32 0053 D8D2 00FA MASK * SEIWK +&00 ;work slots used by set Rx/Tx RS423 baud rates -- MOS32 0054 D8D2 00FB BAUD * SEIWK +&01 -- MOS32 0055 D8D2 ; -- MOS32 0056 D8D2 00FA RSOP * SEIWK +&00 ;work slot used by RSUCTL -- MOS32 0057 D8D2 ; -- MOS32 0058 D8D2 00FA NOTEWK * SEIWK +&00 ;work slot used by NOTE -- MOS32 0059 D8D2 ; -- MOS32 0060 D8D2 00FA EVENTA * SEIWK +&00 ;work slot used by EVENT (hopefully no clashes) -- MOS32 0061 D8D2 ; -- MOS32 0062 D8D2 00FA PEEKLO * SEIWK +&00 ;work slot used by OSWORD read-byte/write-byte -- MOS32 0063 D8D2 00FB PEEKHI * SEIWK +&01 -- MOS32 0064 D8D2 ; -- MOS32 0065 D8D2 00FA SPWK1 * SEIWK +&00 ;used by speech sprocessing -- MOS32 0066 D8D2 00FB SPWK2 * SEIWK +&01 ;used by TIMER2 (speech) interrupt routine -- MOS32 0067 D8D2 -- MOS32 0068 D8D2 00FA # -1 -- MOS32 0069 D8D2 00F9 SPARE0 # &00 ;**************** -- MOS32 0070 D8D2 ; = NULL -- MOS32 0071 D8D2 -- MOS32 0072 D8D2 00F9 # -1 -- MOS32 0073 D8D2 00F8 SPARE1 # &00 ;**************** -- MOS32 0074 D8D2 ;= NULL -- MOS32 0075 D8D2 -- MOS32 0076 D8D2 00F8 # -2 -- MOS32 0077 D8D2 00F6 ROMPTR # &00 ;pointer used by ROM filing system -- MOS32 0078 D8D2 ;= NULL -- MOS32 0079 D8D2 ;= NULL -- MOS32 0080 D8D2 -- MOS32 0081 D8D2 00F6 # -1 -- MOS32 0082 D8D2 00F5 SEROM # &00 ;serial ROM id -- MOS32 0083 D8D2 ;= NULL -- MOS32 0084 D8D2 -- MOS32 0085 D8D2 00F5 # -1 -- MOS32 0086 D8D2 00F4 ROMID # &00 ;currently selected ROM -- MOS32 0087 D8D2 -- MOS32 0088 D8D2 ;= NULL -- MOS32 0089 D8D2 -- MOS32 0090 D8D2 00F4 # -2 -- MOS32 0091 D8D2 00F2 WORK # &00 ;miscellaneous pointer -- MOS32 0092 D8D2 ;= NULL -- MOS32 0093 D8D2 ;= NULL -- MOS32 0094 D8D2 -- MOS32 0095 D8D2 00F2 # -2 -- MOS32 0096 D8D2 ; WORD values may be shared with other sei-routines -- MOS32 0097 D8D2 00F0 WORDX # &00 -- MOS32 0098 D8D2 00F0 BYTEX * WORDX -- MOS32 0099 D8D2 00F1 WORDY * WORDX +&01 -- MOS32 0100 D8D2 00F1 BYTEY * WORDY -- MOS32 0101 D8D2 -- MOS32 0102 D8D2 00F0 # -1 -- MOS32 0103 D8D2 00EF WORDA # &00 -- MOS32 0104 D8D2 00EF BYTEA * WORDA -- MOS32 0105 D8D2 ;= NULL -- MOS32 0106 D8D2 -- MOS32 0107 D8D2 00EF # -1 -- MOS32 0108 D8D2 00EE PAGE1M # &00 ;selected page for 1MHz bus -- MOS32 0109 D8D2 ;= ZERO -- MOS32 0110 D8D2 -- MOS32 0111 D8D2 00EE # -1 -- MOS32 0112 D8D2 00ED OKEY # &00 ;current key value -- MOS32 0113 D8D2 ;= ZERO -- MOS32 0114 D8D2 -- MOS32 0115 D8D2 00ED # -1 -- MOS32 0116 D8D2 00EC CKEY # &00 ;current key value -- MOS32 0117 D8D2 ;= ZERO -- MOS32 0118 D8D2 -- MOS32 0119 D8D2 00EC # -1 -- MOS32 0120 D8D2 00EB ESSEMA # &00 ;EXEC/SPOOL semaphore (used by CFS) -- MOS32 0121 D8D2 -- MOS32 0122 D8D2 -- MOS32 0123 D8D2 00EB # -1 -- MOS32 0124 D8D2 00EA RSTUT # &00 ;RS423 printer timeouT -- MOS32 0125 D8D2 ;= ZERO MOS32 MOS32 MOS32 MOS32 Acorn macro assembler Page 50 MOS32 MOS32 Initialisation and external interfaces MOS32 -- MOS32 0126 D8D2 -- MOS32 0127 D8D2 00EA # -2 -- MOS32 0128 D8D2 00E8 RDLNBF # &00 ;buffer address used by OSWORD readline routine -- MOS32 0129 D8D2 -- MOS32 0130 D8D2 00E8 # -1 -- MOS32 0131 D8D2 00E7 ARCTR # &00 ;auto-repeat counter -- MOS32 0132 D8D2 ;= ZERO -- MOS32 0133 D8D2 -- MOS32 0134 D8D2 00E7 # -1 -- MOS32 0135 D8D2 00E6 WRKCLI # &00 ;shared work slot with interrupts enabled -- MOS32 0136 D8D2 ; -- MOS32 0137 D8D2 00E6 RDCTEM * WRKCLI ;used by RDCH -- MOS32 0138 D8D2 00E6 CLIRY * WRKCLI ;used by CLI decoder -- MOS32 0139 D8D2 ; -- MOS32 0140 D8D2 00E6 NUMBER * WRKCLI ;work slot for GETNUM -- MOS32 0141 D8D2 00E6 CSKEY * NUMBER ;current softkey number (must not share with KMASK or KQUOTE) -- MOS32 0142 D8D2 ; -- MOS32 0143 D8D2 00E6 FILEY * WRKCLI ;save area for register Y -- MOS32 0144 D8D2 00E6 EXECY * FILEY ;save area used by EXEC -- MOS32 0145 D8D2 -- MOS32 0146 D8D2 00E6 SPOOLY * FILEY ;save area used by SPOOL -- MOS32 0147 D8D2 ;= NULL -- MOS32 0148 D8D2 -- MOS32 0149 D8D2 00E6 # -1 -- MOS32 0150 D8D2 00E5 FXREGX # &00 ;used by FX CLI command -- MOS32 0151 D8D2 00E5 KMASK # &00 ;used by GSREAD -- MOS32 0152 D8D2 ; must not be shared with CSKEY -- MOS32 0153 D8D2 ;= NULL -- MOS32 0154 D8D2 -- MOS32 0155 D8D2 00E5 # -1 -- MOS32 0156 D8D2 00E4 FXREGY # &00 ;used by FX CLI command -- MOS32 0157 D8D2 00E4 KQUOTE # &00 ;must not be shared with KMASK -- MOS32 0158 D8D2 ; must not be shared with CSKEY -- MOS32 0159 D8D2 ;= NULL -- MOS32 0160 D8D2 -- MOS32 0161 D8D2 00E4 # -1 -- MOS32 0162 D8D2 00E3 CFS1 # &00 ;reserved for CFS -- MOS32 0163 D8D2 -- MOS32 0164 D8D2 00E3 # -1 -- MOS32 0165 D8D2 ; -- MOS32 0166 D8D2 ; CFS workspace -- MOS32 0167 D8D2 ; ============= -- MOS32 0168 D8D2 ; -- MOS32 0169 D8D2 00E2 CFS0 # &00 ;reserved for CFS -- MOS32 0170 D8D2 00E2 CFSTAT * CFS0 -- MOS32 0171 D8D2 ;PAGE ZERO -- MOS32 0172 D8D2 -- MOS32 0173 D8D2 00B0 PZERO * &00B0 ;Start of p.0 workspace -- MOS32 0174 D8D2 -- MOS32 0175 D8D2 00B0 BKADDR * PZERO ;4 BYTE BLOCK PTR. -- MOS32 0176 D8D2 00B4 HIADDR * BKADDR +&04 ;Top of data being saved, -- MOS32 0177 D8D2 ;Must be contiguous with BKADDR -- MOS32 0178 D8D2 -- MOS32 0179 D8D2 00B4 BLOKNO * HIADDR -- MOS32 0180 D8D2 00B6 SRCHBK * BLOKNO +&02 ;Block numbers being searched for -- MOS32 0181 D8D2 ;Not used in SAVE, hence can overlap HIADDR -- MOS32 0182 D8D2 -- MOS32 0183 D8D2 00B8 FTPTR * HIADDR +&04 ;Used in VSTRIN -- MOS32 0184 D8D2 00BA ERRSW * FTPTR +&02 ;In p.0 to save space -- MOS32 0185 D8D2 00BB USFLGS * ERRSW +&01 -- MOS32 0186 D8D2 00BC TEMP * USFLGS +&01 -- MOS32 0187 D8D2 00BD IBUF * TEMP +&01 -- MOS32 0188 D8D2 00BE CHKSUM * IBUF +&01 -- MOS32 0189 D8D2 00C0 IFLAG * CHKSUM +&02 -- MOS32 0190 D8D2 00C1 HDRCRC * IFLAG +&01 -- MOS32 0191 D8D2 00C2 ITYPE * HDRCRC +&01 -- MOS32 0192 D8D2 00C3 CURDRV * ITYPE +&01 ;Currently selected cassette -- MOS32 0193 D8D2 00C4 IADDR * CURDRV +&01 -- MOS32 0194 D8D2 00C6 SPEED * IADDR +&02 -- MOS32 0195 D8D2 00C7 GAPTIM * SPEED +&01 -- MOS32 0196 D8D2 00C8 GENPTR * GAPTIM +&01 ;Used in FILEGO/LOAD only -- MOS32 0197 D8D2 00CA TXFLAG * GENPTR +&02 ;"We are transmitting" flag -- MOS32 0198 D8D2 00CB CRCCNT * TXFLAG +&01 ;Used in CRC check -- MOS32 0199 D8D2 00CC FSIZE * CRCCNT + 1 ;File size to modify control block in LOAD -- MOS32 0200 D8D2 -- MOS32 0201 D8D2 00E3 OPTS * CFS1 ;Retained over filing system change -- MOS32 0202 D8D2 ;************************************** -- MOS32 0203 D8D2 -- MOS32 0204 D8D2 00E2 BPAGE0 # &00 -- MOS32 0205 D8D2 -- MOS32 0206 D8D2 -- MOS32 0207 D8D2 -- MOS32 0208 D8D2 IPAGE2 -- MOS32 0209 D8D2 ; page two values -- MOS32 0210 D8D2 ^ &0200 -- MOS32 0211 D8D2 0200 APAGE2 # &00 -- MOS32 0212 D8D2 0200 USRVEC # &02 ;user vector -- MOS32 0213 D8D2 73 = BADFX -- MOS32 0214 D8D3 E3 = /(BADFX ) -- MOS32 0215 D8D4 0202 BRKVEC # &02 ;BRK handling -- MOS32 0216 D8D4 6A = DEFBRK -- MOS32 0217 D8D5 DB = /(DEFBRK ) -- MOS32 0218 D8D6 0204 IRQALL # &02 ;all IRQs indirect thru here -- MOS32 0219 D8D6 23 = DEFIRQ -- MOS32 0220 D8D7 DE = /(DEFIRQ ) -- MOS32 0221 D8D8 0206 IRQVEC # &02 ;unrecognised IRQ -- MOS32 0222 D8D8 35 = IRQTWO -- MOS32 0223 D8D9 DE = /(IRQTWO ) -- MOS32 0224 D8DA 0208 COMVEC # &02 ;command line intepreter -- MOS32 0225 D8DA CC = CLINT -- MOS32 0226 D8DB DF = /(CLINT ) -- MOS32 0227 D8DC 020A BYTVEC # &02 ;MOS routine, 0 1 or 2 arguments -- MOS32 0228 D8DC D1 = BYTE -- MOS32 0229 D8DD E7 = /(BYTE ) -- MOS32 0230 D8DE 020C WORVEC # &02 ;MOS routine, >2 arguments -- MOS32 0231 D8DE 3B = WORD -- MOS32 0232 D8DF E8 = /(WORD ) -- MOS32 0233 D8E0 020E WRCVEC # &02 ;write character -- MOS32 0234 D8E0 00 = WRCH -- MOS32 0235 D8E1 E1 = /(WRCH ) -- MOS32 0236 D8E2 0210 RDCVEC # &02 ;read character -- MOS32 0237 D8E2 71 = RDCH -- MOS32 0238 D8E3 DE = /(RDCH ) -- MOS32 0239 D8E4 CFSTAB -- MOS32 0240 D8E4 0212 FILVEC # &02 ;load/save memory image -- MOS32 0241 D8E4 D7 = FILEGO -- MOS32 0242 D8E5 F1 = /(FILEGO ) -- MOS32 0243 D8E6 0214 ARGVEC # &02 ;read/set file attributes -- MOS32 0244 D8E6 90 = ARGGO -- MOS32 0245 D8E7 F1 = /(ARGGO ) -- MOS32 0246 D8E8 0216 BGTVEC # &02 ;get byte from random file MOS32 MOS32 MOS32 MOS32 Acorn macro assembler Page 51 MOS32 MOS32 Initialisation and external interfaces MOS32 -- MOS32 0247 D8E8 C4 = GETBYT -- MOS32 0248 D8E9 F4 = /(GETBYT ) -- MOS32 0249 D8EA 0218 BPTVEC # &02 ;put byte to random file -- MOS32 0250 D8EA 27 = PUTBYT -- MOS32 0251 D8EB F5 = /(PUTBYT ) -- MOS32 0252 D8EC 021A GPBVEC # &02 ;get/put bytes -- MOS32 0253 D8EC B2 = RTS -- MOS32 0254 D8ED FF = /(RTS ) -- MOS32 0255 D8EE 021C FNDVEC # &02 ;open/close random file -- MOS32 0256 D8EE C5 = FIND -- MOS32 0257 D8EF F3 = /(FIND ) -- MOS32 0258 D8F0 021E FSCVEC # &02 ;file system control entry -- MOS32 0259 D8F0 A2 = FSFUNC -- MOS32 0260 D8F1 F1 = /(FSFUNC ) -- MOS32 0261 D8F2 0220 EVTVEC # &02 ;event interrupt -- MOS32 0262 D8F2 B2 = DEFEVT -- MOS32 0263 D8F3 FF = /(DEFEVT ) -- MOS32 0264 D8F4 0222 UPTVEC # &02 ;user print routine -- MOS32 0265 D8F4 ; default hangs printer -- MOS32 0266 D8F4 B2 = DEFUPT -- MOS32 0267 D8F5 FF = /(DEFUPT ) -- MOS32 0268 D8F6 0224 NETVEC # &02 ;ECONET effects -- MOS32 0269 D8F6 ; default hangs printer -- MOS32 0270 D8F6 B2 = DEFNET -- MOS32 0271 D8F7 FF = /(DEFNET ) -- MOS32 0272 D8F8 0226 VDUVEC # &02 ;VDU command indirection -- MOS32 0273 D8F8 -- MOS32 0274 D8F8 B2 = RTS -- MOS32 0275 D8F9 FF = /(RTS ) -- MOS32 0276 D8FA 0228 KEYVEC # &02 ;keyboard control indirection -- MOS32 0277 D8FA 39 = DEFKEY -- MOS32 0278 D8FB EF = /(DEFKEY ) -- MOS32 0279 D8FC 022A INSVEC # &02 ;buffer insert indirection -- MOS32 0280 D8FC 15 = INS -- MOS32 0281 D8FD E5 = /(INS ) -- MOS32 0282 D8FE 022C REMVEC # &02 ;buffer remove indirection -- MOS32 0283 D8FE C6 = REM -- MOS32 0284 D8FF E4 = /(REM ) -- MOS32 0285 D900 022E CNPVEC # &02 ;buffer count / purge buffer indirection -- MOS32 0286 D900 40 = CNP -- MOS32 0287 D901 E2 = /(CNP ) -- MOS32 0288 D902 0230 INDONE # &02 -- MOS32 0289 D902 B2 = RTS -- MOS32 0290 D903 FF = /(RTS ) -- MOS32 0291 D904 0232 INDTWO # &02 -- MOS32 0292 D904 B2 = RTS -- MOS32 0293 D905 FF = /(RTS ) -- MOS32 0294 D906 0234 INDTRH # &02 -- MOS32 0295 D906 B2 = RTS -- MOS32 0296 D907 FF = /(RTS ) -- MOS32 0297 D908 0036 VLEN * @-APAGE2 -- MOS32 0298 D908 ; -- MOS32 0299 D908 001B NP2IND * VLEN:SHR: 1 ;number of page 2 indirections -- MOS32 0300 D908 0051 ROMIVS * NP2IND* 3 ;page ROM indirection vector size -- MOS32 0301 D908 0D9F ROMVEC * &0DF0-ROMIVS ;paged ROM routine vectors -- MOS32 0302 D908 -- MOS32 0303 D908 -- MOS32 0304 D908 0236 VARS # &00 -- MOS32 0305 D908 ; -- MOS32 0306 D908 0236 # &02 ;variables origin -- MOS32 0307 D908 90 = VBASE ;166 -- MOS32 0308 D909 01 = /(VBASE ) -- MOS32 0309 D90A -- MOS32 0310 D90A 0238 # &02 ;origin of 3-byte ROM indirection vectors -- MOS32 0311 D90A 9F = ROMVEC ;168 -- MOS32 0312 D90B 0D = /(ROMVEC ) -- MOS32 0313 D90C -- MOS32 0314 D90C 023A # &02 ;paged ROM info -- MOS32 0315 D90C A1 = ROMS ;170 -- MOS32 0316 D90D 02 = /(ROMS ) -- MOS32 0317 D90E -- MOS32 0318 D90E 023C # &02 ;keyboard matrix info -- MOS32 0319 D90E 58 = KTBL ;172 -- MOS32 0320 D90F F0 = /(KTBL ) -- MOS32 0321 D910 -- MOS32 0322 D910 023E # &02 ;VDU module origin of variables -- MOS32 0323 D910 00 = VARBLE ;174 -- MOS32 0324 D911 03 = /(VARBLE ) -- MOS32 0325 D912 -- MOS32 0326 D912 0240 CYCLE # &01 ;filing system timeout byte -- MOS32 0327 D912 -- MOS32 0328 D912 00 = NULL -- MOS32 0329 D913 -- MOS32 0330 D913 0241 RDCHSW # &01 ;RDCH source switch (assumed not in page zero, see KTBL) -- MOS32 0331 D913 00 = ZERO ;177 BRDCH (zero) -- MOS32 0332 D914 -- MOS32 0333 D914 0242 KSEMA # &01 ;keyboard semaphore -- MOS32 0334 D914 FF = &FF ;178 -- MOS32 0335 D915 -- MOS32 0336 D915 0243 IHWM # &01 -- MOS32 0337 D915 -- MOS32 0338 D915 00 = ZERO ;179 -- MOS32 0339 D916 -- MOS32 0340 D916 0244 HWM # &01 -- MOS32 0341 D916 -- MOS32 0342 D916 00 = NULL ;180 -- MOS32 0343 D917 -- MOS32 0344 D917 0245 RS8BIT # &01 -- MOS32 0345 D917 01 = &01 ;181 1 => 8 bits, 0 => soft key processing -- MOS32 0346 D918 -- MOS32 0347 D918 -- MOS32 0348 D918 0246 FONTSW # &01 ;current state of font explosion/implosion -- MOS32 0349 D918 -- MOS32 0350 D918 00 = ZERO ;182 -- MOS32 0351 D919 ; -- MOS32 0352 D919 0247 SROMSW # &01 ;SEROM/cassette switch -- MOS32 0353 D919 -- MOS32 0354 D919 00 = ZERO ;183 cassette by default -- MOS32 0355 D91A -- MOS32 0356 D91A -- MOS32 0357 D91A 0248 VPREGA # &01 ;video ULA control register 0 -- MOS32 0358 D91A 00 = NULL ;184 -- MOS32 0359 D91B ; -- MOS32 0360 D91B 0249 VPREGB # &01 ;video ULA control register 1 -- MOS32 0361 D91B 00 = NULL ;185 -- MOS32 0362 D91C -- MOS32 0363 D91C -- MOS32 0364 D91C 024A REPROM # &01 ;ROM id after BRK -- MOS32 0365 D91C 00 = NULL ;186 -- MOS32 0366 D91D ; -- MOS32 0367 D91D 024B BROMID # &01 ;BASIC ROM id MOS32 MOS32 MOS32 MOS32 Acorn macro assembler Page 52 MOS32 MOS32 Initialisation and external interfaces MOS32 -- MOS32 0368 D91D FF = &FF ;187 -- MOS32 0369 D91E -- MOS32 0370 D91E -- MOS32 0371 D91E 024C ADCHAN # &01 ;ADC channel number -- MOS32 0372 D91E 04 = NADC ;188 -- MOS32 0373 D91F ; -- MOS32 0374 D91F 024D MAXADC # &01 ;maximum ADC channel in use -- MOS32 0375 D91F 04 = NADC ;189 -- MOS32 0376 D920 ; -- MOS32 0377 D920 024E ADCCNV # &01 -- MOS32 0378 D920 00 = ZERO ;190 ADC conversion type (12 bits) -- MOS32 0379 D921 -- MOS32 0380 D921 -- MOS32 0381 D921 024F RSFLAG # &01 ;RS423 use flag -- MOS32 0382 D921 -- MOS32 0383 D921 ; 1xxx xxxx => dormant -- MOS32 0384 D921 ; 0xxx xxxx => busy -- MOS32 0385 D921 FF = &FF ;191 -- MOS32 0386 D922 ; -- MOS32 0387 D922 0250 RSCTFL # &01 -- MOS32 0388 D922 -- MOS32 0389 D922 56 = RSCDEF ;192 -- MOS32 0390 D923 -- MOS32 0391 D923 -- MOS32 0392 D923 ; -- MOS32 0393 D923 0251 FLCNT # &01 ;flash period counter -- MOS32 0394 D923 19 = &19 ;193 1/2 SECOND -- MOS32 0395 D924 ; -- MOS32 0396 D924 0252 FLASHB # &00 ;used by flash FX calls -- MOS32 0397 D924 0252 FLSPC # &01 ;flash space period -- MOS32 0398 D924 19 = &19 ;194 1/2 SECOND -- MOS32 0399 D925 0253 FLMRK # &01 ;flash mark period -- MOS32 0400 D925 19 = &19 ;195 1/2 SECOND -- MOS32 0401 D926 ; -- MOS32 0402 D926 -- MOS32 0403 D926 -- MOS32 0404 D926 ;**** FOLLOWING MUST BE CONTIGUOUS (c.f. *FX11 and *FX12) **** -- MOS32 0405 D926 0254 FARSET # &01 ;first auto-repeat reset -- MOS32 0406 D926 32 = DAUTOD ;196 -- MOS32 0407 D927 0255 ARSET # &01 ;reset for above -- MOS32 0408 D927 08 = DAUTOP ;197 -- MOS32 0409 D928 -- MOS32 0410 D928 -- MOS32 0411 D928 0256 EXECH # &01 ;*EXEC handle -- MOS32 0412 D928 -- MOS32 0413 D928 00 = ZERO ;198 -- MOS32 0414 D929 ; -- MOS32 0415 D929 0257 SPOOLH # &01 ;*SPOOL handle -- MOS32 0416 D929 -- MOS32 0417 D929 00 = ZERO ;199 -- MOS32 0418 D92A ; -- MOS32 0419 D92A 0258 CRIT # &01 ;critical region indicator -- MOS32 0420 D92A -- MOS32 0421 D92A 00 = &00 ;200 not within critical region -- MOS32 0422 D92B ; -- MOS32 0423 D92B 0259 NETKDS # &01 ;net keyboard disable -- MOS32 0424 D92B 00 = ZERO ;201 default: not disabled -- MOS32 0425 D92C ; -- MOS32 0426 D92C 025A KSTAT # &01 ;keyboard status (see MOS56) -- MOS32 0427 D92C 20 = SHFTL ;202 -- MOS32 0428 D92D ; -- MOS32 0429 D92D 025B RSHLVL # &01 ;RS423 handshake level -- MOS32 0430 D92D 09 = RSOVR+&01 ;203 -- MOS32 0431 D92E ; -- MOS32 0432 D92E 025C RSSHUT # &01 ;suppress RS423 input -- MOS32 0433 D92E 00 = ZERO ;204 default: enable RS423 input -- MOS32 0434 D92F ; -- MOS32 0435 D92F 025D RSCASS # &01 ;cassette/RS423 serial processor select -- MOS32 0436 D92F 00 = ZERO ;205 $00 => select RS423, $40 => select cassette -- MOS32 0437 D930 ; -- MOS32 0438 D930 025E NETIOC # &01 ;net interception of OS calls -- MOS32 0439 D930 00 = ZERO ;206 default: not intercepted -- MOS32 0440 D931 ; -- MOS32 0441 D931 025F NETRDC # &01 ;net interception of RDCH -- MOS32 0442 D931 00 = ZERO ;207 default: not intercepted -- MOS32 0443 D932 ; -- MOS32 0444 D932 0260 NETWRC # &01 ;net interception of WRCH -- MOS32 0445 D932 00 = ZERO ;208 default: not intercepted -- MOS32 0446 D933 ; -- MOS32 0447 D933 0261 SHUTSP # &01 ;speech suppressor -- MOS32 0448 D933 50 = SPOPSP ;209 -- MOS32 0449 D934 ; -- MOS32 0450 D934 0262 SHUTUP # &01 ;sound suppressor -- MOS32 0451 D934 00 = ZERO ;210 allow sound by default -- MOS32 0452 D935 ; -- MOS32 0453 D935 0263 BELLC # &01 ;bell channel -- MOS32 0454 D935 03 = &03 ;211 -- MOS32 0455 D936 ; -- MOS32 0456 D936 0264 BELLI # &01 ;bell envelope and chord information -- MOS32 0457 D936 90 = &90 ;212 -- MOS32 0458 D937 ; -- MOS32 0459 D937 0265 BELLN # &01 ;bell frequency -- MOS32 0460 D937 64 = &64 ;213 -- MOS32 0461 D938 ; -- MOS32 0462 D938 0266 BELLD # &01 ;bell duration -- MOS32 0463 D938 06 = &06 ;214 -- MOS32 0464 D939 ; -- MOS32 0465 D939 0267 QUIET # &01 -- MOS32 0466 D939 81 = &81 ;215 suppress start-up message / !BOOT option -- MOS32 0467 D93A ; -- MOS32 0468 D93A 0268 SOFKL # &01 ;soft key string length -- MOS32 0469 D93A 00 = ZERO ;216 -- MOS32 0470 D93B ; -- MOS32 0471 D93B 0269 LINES # &01 ;used by VDU software -- MOS32 0472 D93B -- MOS32 0473 D93B 00 = ZERO ;217 used by VDU software in page mode -- MOS32 0474 D93C ; -- MOS32 0475 D93C 026A QPOSN # &01 ;VDU queue count -- MOS32 0476 D93C -- MOS32 0477 D93C 00 = ZERO ;218 -- MOS32 0478 D93D ; -- MOS32 0479 D93D 026B TABCOD # &01 ;TAB key code -- MOS32 0480 D93D 09 = TAB ;219 -- MOS32 0481 D93E ; -- MOS32 0482 D93E 026C INTCH # &01 -- MOS32 0483 D93E 1B = ESC ;220 interrupt character (normally ESC) -- MOS32 0484 D93F ; -- MOS32 0485 D93F 026D SOFTLO # &00 -- MOS32 0486 D93F ;221 softkey 10 feature -- MOS32 0487 D93F 026D EXBREK # &01 -- MOS32 0488 D93F 01 = &01 ;expand softkey MOS32 MOS32 MOS32 MOS32 Acorn macro assembler Page 53 MOS32 MOS32 Initialisation and external interfaces MOS32 -- MOS32 0489 D940 ;222 reserved -- MOS32 0490 D940 026E # &01 -- MOS32 0491 D940 D0 = &D0 -- MOS32 0492 D941 ;223 reserved -- MOS32 0493 D941 026F # &01 -- MOS32 0494 D941 E0 = &E0 -- MOS32 0495 D942 ;224 reserved -- MOS32 0496 D942 0270 # &01 -- MOS32 0497 D942 F0 = &F0 -- MOS32 0498 D943 ;225 -- MOS32 0499 D943 ; 0 => enable softkey expansion on fnkey -- MOS32 0500 D943 ; N => return code N+i for fnkey(i), i=0..9 -- MOS32 0501 D943 0271 # &01 -- MOS32 0502 D943 01 = &01 ;return soft strings by default -- MOS32 0503 D944 ;226 -- MOS32 0504 D944 ; 0 => enable softkey expansion on SHIFT/fnkey -- MOS32 0505 D944 ; N => return code N+i for SHIFT/fnkey(i), i=0..9 -- MOS32 0506 D944 0272 # &01 -- MOS32 0507 D944 80 = &80 ;return codes $80..$89 by default (user definable characters) -- MOS32 0508 D945 ;227 -- MOS32 0509 D945 ; 0 => enable softkey expansion on CTRL/fnkey -- MOS32 0510 D945 ; N => return code N+i for CTRL/fnkey(i), i=0..9 -- MOS32 0511 D945 0273 # &01 -- MOS32 0512 D945 90 = &90 ;return codes $90..$99 by default (user definable characters) -- MOS32 0513 D946 ;228 -- MOS32 0514 D946 ; 0 => enable softkey expansion on SHIFT/CTRL/fnkey -- MOS32 0515 D946 ; N => return code N+i for SHIFT/CTRL/fnkey(i), i=0..9 -- MOS32 0516 D946 0274 # &01 -- MOS32 0517 D946 00 = ZERO ;ingnore key combination by default -- MOS32 0518 D947 -- MOS32 0519 D947 0275 ESCHAR # &01 ;make INTERRUPT CHARACTER return normal value -- MOS32 0520 D947 00 = ZERO ;229 <>0 => return normal value -- MOS32 0521 D948 -- MOS32 0522 D948 0276 EAOPT # &01 ;suppress normal escape acknowledge actions -- MOS32 0523 D948 00 = ZERO ;230 suppress if <> 0 -- MOS32 0524 D949 -- MOS32 0525 D949 0277 B6522 # &01 ;$00 => no, $FF => second 6522 present -- MOS32 0526 D949 FFBYT -- MOS32 0527 D949 FF = &FF ;231 assume 6522B present -- MOS32 0528 D94A -- MOS32 0529 D94A 0278 C6850 # &01 ;$00 => no, $FF => 6850 present -- MOS32 0530 D94A FF = &FF ;232 assume 6850 present -- MOS32 0531 D94B -- MOS32 0532 D94B 0279 A6522 # &01 ;$00 => no, $FF => primary 6522 present -- MOS32 0533 D94B FF = &FF ;233 assume 6522A present -- MOS32 0534 D94C -- MOS32 0535 D94C 027A TUBEM # &01 ;$FF if tube present -- MOS32 0536 D94C 027A TUBE * TUBEM -- MOS32 0537 D94C 00 = ZERO ;234 assume tube not present -- MOS32 0538 D94D -- MOS32 0539 D94D 027B SPFLAG # &01 ;$FF if speech chip present -- MOS32 0540 D94D 00 = ZERO ;235 -- MOS32 0541 D94E -- MOS32 0542 D94E 027C WRCHSW # &01 ;OSWRCH destinations flag -- MOS32 0543 D94E 0001 WRRS * &01 ;WRCH is RS423 -- MOS32 0544 D94E 0002 WRVDU * &02 ;WRCH is ***NOT*** VDU -- MOS32 0545 D94E 0004 WRPREN * &04 ;0 => ENABLE PRINT -- MOS32 0546 D94E 0008 WRPRNT * &08 ;WRCH is ***NOT*** print -- MOS32 0547 D94E 0010 WRSPL * &10 ;WRCH is ***NOT*** spool -- MOS32 0548 D94E 0040 WRVDU1 * &40 ;WRCH to printer only by VDU1 -- MOS32 0549 D94E 00 = ZERO ;236 WRCH is VDU/print/spool -- MOS32 0550 D94F ; ******** DO NOT ALTER ******** -- MOS32 0551 D94F -- MOS32 0552 D94F 027D CURSED # &01 -- MOS32 0553 D94F 00 = ZERO ;237 -- MOS32 0554 D950 -- MOS32 0555 D950 007E MPAGE2 * @-APAGE2 -- MOS32 0556 D950 -- MOS32 0557 D950 027E SPARE8 # &03 -- MOS32 0558 D950 00 = ZERO -- MOS32 0559 D951 00 = ZERO -- MOS32 0560 D952 00 = ZERO -- MOS32 0561 D953 ; 238, 239, 240 -- MOS32 0562 D953 -- MOS32 0563 D953 0281 UFX1 # &01 ;FX 1 value -- MOS32 0564 D953 00 = ZERO ;241 -- MOS32 0565 D954 ; ******** DO NOT ALTER ******** -- MOS32 0566 D954 -- MOS32 0567 D954 0282 SPREGA # &01 ;serial processor register contents -- MOS32 0568 D954 -- MOS32 0569 D954 64 = B9600 ;242 -- MOS32 0570 D955 -- MOS32 0571 D955 0283 TIMESW # &01 ;TIME pointer, either 5 or 10 -- MOS32 0572 D955 05 = &05 ;243 -- MOS32 0573 D956 -- MOS32 0574 D956 0284 USKFLG # &01 ;soft key consistency flag -- MOS32 0575 D956 FF = &FF ;244 =0 => soft keys consistent -- MOS32 0576 D957 -- MOS32 0577 D957 0285 PRNTSW # &01 ;PRINT destination flag -- MOS32 0578 D957 0001 PCEN * &01 ;print is (C)ENTRONICS -- MOS32 0579 D957 0002 PRS * &02 ;print is (RS)232 -- MOS32 0580 D957 0003 PUSE * &03 ;print is (user) routine -- MOS32 0581 D957 0004 PNET * &04 ;print is ECO(NET) -- MOS32 0582 D957 01 = PCEN ;245 -- MOS32 0583 D958 ; ******** DO NOT ALTER ******** -- MOS32 0584 D958 -- MOS32 0585 D958 0286 PIGNOR # &01 ;printer ignore character -- MOS32 0586 D958 0A = MLF ;246 support auto-linefeed printers by default -- MOS32 0587 D959 ; ******** DO NOT ALTER ******** -- MOS32 0588 D959 -- MOS32 0589 D959 0087 PPAGE2 * @-APAGE2 -- MOS32 0590 D959 -- MOS32 0591 D959 0287 BREAKI # &03 ;used for interception of BREAK -- MOS32 0592 D959 00 = ZERO ;247 change to $4C to intercept BREAK -- MOS32 0593 D95A 00 = ZERO ;248 -- MOS32 0594 D95B 00 = ZERO ;249 -- MOS32 0595 D95C -- MOS32 0596 D95C 028A SPARE9 # &02 ;spare -- MOS32 0597 D95C 00 = ZERO ;250 -- MOS32 0598 D95D 00 = ZERO ;251 -- MOS32 0599 D95E -- MOS32 0600 D95E 028C LROMID # &01 ;current language ROM id -- MOS32 0601 D95E FF = &FF ;252 -- MOS32 0602 D95F -- MOS32 0603 D95F 008D NPAGE2 * @-APAGE2 -- MOS32 0604 D95F -- MOS32 0605 D95F 028D TYPE # &01 ;restart type -- MOS32 0606 D95F ;= ZERO ;253 -- MOS32 0607 D95F -- MOS32 0608 D95F 028E MODELB # &01 -- MOS32 0609 D95F 028E MODEL * MODELB MOS32 MOS32 MOS32 MOS32 Acorn macro assembler Page 54 MOS32 MOS32 Initialisation and external interfaces MOS32 -- MOS32 0610 D95F ;= ZERO ;254 -- MOS32 0611 D95F -- MOS32 0612 D95F 028F OPTION # &01 ;start up options -- MOS32 0613 D95F ;= ZERO ;255 -- MOS32 0614 D95F -- MOS32 0615 D95F 0190 VBASE * @-&100 -- MOS32 0616 D95F 00A6 VORG * VARS-VBASE -- MOS32 0617 D95F [ VARS-VBASE- 166=0 -- MOS32 0618 D95F | -- MOS32 0620 D95F ] -- MOS32 0621 D95F ; -- MOS32 0622 D95F -- MOS32 0623 D95F 0290 DPAGE2 # &00 -- MOS32 0624 D95F -- MOS32 0625 D95F 0290 VERTIC # &01 ;VDU vertical adjust -- MOS32 0626 D95F -- MOS32 0627 D95F ;= ZERO -- MOS32 0628 D95F -- MOS32 0629 D95F 0291 INTERL # &01 ;interlace invert -- MOS32 0630 D95F -- MOS32 0631 D95F ;= ZERO -- MOS32 0632 D95F -- MOS32 0633 D95F ; time -- MOS32 0634 D95F 0292 TIME1 # &05 ;first absolute time counter -- MOS32 0635 D95F 0292 TIME * TIME1 -- MOS32 0636 D95F ;= ZERO -- MOS32 0637 D95F ;= ZERO -- MOS32 0638 D95F ;= ZERO -- MOS32 0639 D95F ;= ZERO -- MOS32 0640 D95F ;= ZERO -- MOS32 0641 D95F 0297 TIME2 # &05 ;second absolute time counter -- MOS32 0642 D95F ;= ZERO -- MOS32 0643 D95F ;= ZERO -- MOS32 0644 D95F ;= ZERO -- MOS32 0645 D95F ;= ZERO -- MOS32 0646 D95F ;= ZERO -- MOS32 0647 D95F ; N.B. soft restart zeroes from here onwards -- MOS32 0648 D95F 029C STPW # &05 ;stopwatch counter -- MOS32 0649 D95F 029C CPAGE2 * STPW -- MOS32 0650 D95F ;= ZERO -- MOS32 0651 D95F ;= ZERO -- MOS32 0652 D95F ;= ZERO -- MOS32 0653 D95F ;= ZERO -- MOS32 0654 D95F ;= ZERO -- MOS32 0655 D95F -- MOS32 0656 D95F 02A1 ROMS # NROM -- MOS32 0657 D95F -- MOS32 0658 D95F ;= ZERO (NROM times) -- MOS32 0659 D95F -- MOS32 0660 D95F ; work slots used by CLI -- MOS32 0661 D95F 02B1 RDCTLO # &01 ;INKEY wait counter 1 -- MOS32 0662 D95F ;= ZERO -- MOS32 0663 D95F 02B2 RDCTHI # &01 ;INKEY wait counter 2 -- MOS32 0664 D95F ;= ZERO -- MOS32 0665 D95F -- MOS32 0666 D95F ; work slots used by RDLN -- MOS32 0667 D95F ; values must not be altered by any sei-routine -- MOS32 0668 D95F 02B3 RDLNN # &01 -- MOS32 0669 D95F ;= NULL -- MOS32 0670 D95F 02B4 RDLNLC # &01 -- MOS32 0671 D95F ;= NULL -- MOS32 0672 D95F 02B5 RDLNHC # &01 -- MOS32 0673 D95F ;= NULL -- MOS32 0674 D95F -- MOS32 0675 D95F ; ADC control -- MOS32 0676 D95F ; may not be shared -- MOS32 0677 D95F 02B6 ADCLOV # NADC ;ADC lo byte values (0 to 3) -- MOS32 0678 D95F ;= ZERO -- MOS32 0679 D95F ;= ZERO -- MOS32 0680 D95F ;= ZERO -- MOS32 0681 D95F ;= ZERO -- MOS32 0682 D95F 02BA ADCHIV # NADC ;ADC hi byte values (0 to 3) -- MOS32 0683 D95F ;= ZERO -- MOS32 0684 D95F ;= ZERO -- MOS32 0685 D95F ;= ZERO -- MOS32 0686 D95F ;= ZERO -- MOS32 0687 D95F 02BE ADCFLG # &01 -- MOS32 0688 D95F ;= ZERO -- MOS32 0689 D95F -- MOS32 0690 D95F ; event interrupt vectors -- MOS32 0691 D95F 000A NEVENT * &000A ;total number of events -- MOS32 0692 D95F 02BF EVENTS # NEVENT ;event flags -- MOS32 0693 D95F 0000 EVMPTY * &00 ;output buffer empty -- MOS32 0694 D95F ;= ZERO -- MOS32 0695 D95F 0001 EVFULL * &01 ;input buffer full -- MOS32 0696 D95F ;= ZERO -- MOS32 0697 D95F 0002 EVKYBD * &02 ;keyboard interrupt -- MOS32 0698 D95F ;= ZERO -- MOS32 0699 D95F 0003 EVADC * &03 ;ADC conversion complete -- MOS32 0700 D95F ;= ZERO -- MOS32 0701 D95F 0004 EVVSYN * &04 ;VSYNC -- MOS32 0702 D95F ;= ZERO -- MOS32 0703 D95F 0005 EVSWCH * &05 ;(timer) stopwatch -- MOS32 0704 D95F ;= ZERO -- MOS32 0705 D95F 0006 EVESC * &06 ;escape detected -- MOS32 0706 D95F ;= ZERO -- MOS32 0707 D95F 0007 EVRS * &07 ;RS423 Rx error -- MOS32 0708 D95F ;= ZERO -- MOS32 0709 D95F 0008 EVUSER * &08 ;user allocated event -- MOS32 0710 D95F ;= ZERO -- MOS32 0711 D95F -- MOS32 0712 D95F ; miscellaneous -- MOS32 0713 D95F 02C9 SOFKP # &01 ;pointer to soft key string -- MOS32 0714 D95F ;= NULL -- MOS32 0715 D95F ; -- MOS32 0716 D95F 02CA FARCTR # &01 ;first auto-repeat count -- MOS32 0717 D95F ;= NULL -- MOS32 0718 D95F -- MOS32 0719 D95F 02CB KSCSTA # &03 ;keyboard scan start address work vector -- MOS32 0720 D95F ;= NULL -- MOS32 0721 D95F -- MOS32 0722 D95F ; values to be initialised to $FF -- MOS32 0723 D95F 02CE FFBYTE # &00 -- MOS32 0724 D95F ; -- MOS32 0725 D95F 02CE SSEMA # &01 ;sound semaphore -- MOS32 0726 D95F ; -- MOS32 0727 D95F ; buffer activity flags -- MOS32 0728 D95F 02CF BACTIV # &00 -- MOS32 0729 D95F 02CF DUMMY # 3 ;Not used - necessary for padding (see PURGE) -- MOS32 0730 D95F 02D2 PFLAG # &01 ;print flag -- MOS32 0731 D95F ; 1xxx xxxx => dormant MOS32 MOS32 MOS32 MOS32 Acorn macro assembler Page 55 MOS32 MOS32 Initialisation and external interfaces MOS32 -- MOS32 0732 D95F ; 0xxx xxxx => busy -- MOS32 0733 D95F 02D3 SFLUSH # &04 ;sound flush flags -- MOS32 0734 D95F 02D7 SPSTAT # &01 ;speech processor status -- MOS32 0735 D95F ; -- MOS32 0736 D95F ; buffer control -- MOS32 0737 D95F ; buffer start page offsets -- MOS32 0738 D95F 02D8 BFSTRT # BUPB+&01 -- MOS32 0739 D95F ; buffer end page offsets -- MOS32 0740 D95F 02E1 BFEND # BUPB+&01 -- MOS32 0741 D95F ; -- MOS32 0742 D95F 02EA CFSA # &03 -- MOS32 0743 D95F -- MOS32 0744 D95F ; -- MOS32 0745 D95F 02ED CFSD # &01 -- MOS32 0746 D95F -- MOS32 0747 D95F 02EE FBLOCK # &12 ;load/save control block -- MOS32 0748 D95F 0000 FSTR * &0000 ;pointer to filename (2 bytes) -- MOS32 0749 D95F 0002 FLOAD * &0002 ;load address (4 bytes) -- MOS32 0750 D95F 0006 FEXEC * &0006 ;execute address (4 bytes) -- MOS32 0751 D95F 000A FFROM * &000A ;from address (4 bytes) -- MOS32 0752 D95F 000E FTO * &000E ;to address (4 bytes) -- MOS32 0753 D95F ;= 18*NULL -- MOS32 0754 D95F -- MOS32 0755 D95F 0300 ZPAGE2 # &00 -- MOS32 0756 D95F -- MOS32 0757 D95F LNK MOS34 -- MOS34 0001 D95F -- MOS34 0002 D95F ; MOS34 -- MOS34 0003 D95F TTL MOS34 Initialisation -- MOS34 0004 D95F OPT MOS34 MOS34 MOS34 MOS34 MOS34 Acorn macro assembler Page 56 MOS34 MOS34 Initialisation MOS34 -- MOS34 0005 D95F -- MOS34 0006 D95F ;(c) 1981 ACORN Computers Limited -- MOS34 0007 D95F ;BBC Microcomputer MOS -- MOS34 0008 D95F -- MOS34 0009 D95F ;Change record: -- MOS34 0010 D95F ;100 15-Apr-82 PB Use PCEN=1 -- MOS34 0011 D95F ;039 15-Aug-81 PB Start of change to PROTON interface -- MOS34 0012 D95F ;004 29-Jul-81 MP Prototype version -- MOS34 0013 D95F -- MOS34 0014 D95F ;Author(s): -- MOS34 0015 D95F ;PB Paul Bond -- MOS34 0016 D95F ;MP Mike Prees -- MOS34 0017 D95F TTL Entry point after hardware break/reset -- MOS34 0018 D95F OPT OPNEWP MOS34 MOS34 MOS34 MOS34 Acorn macro assembler Page 57 MOS34 Entry point after hardware break/reset MOS34 -- MOS34 0019 D95F -- MOS34 0020 D95F -- MOS34 0021 D95F MRESET ;entered here after reset -- MOS34 0022 D95F -- MOS34 0023 D95F ; ensure NMIs are ignored as sson as possible -- MOS34 0024 D95F ; -- MOS34 0025 D95F A9 40 LDAIM &40 ;A := RTI opcode -- MOS34 0026 D961 8D 00 0D STA NMI -- MOS34 0027 D964 -- MOS34 0028 D964 ; ensure interrupts disabled (useful for JMP -4 freaks) -- MOS34 0029 D964 ; -- MOS34 0030 D964 78 SEI -- MOS34 0031 D965 -- MOS34 0032 D965 ; clear decimal mode -- MOS34 0033 D965 ; -- MOS34 0034 D965 D8 CLD -- MOS34 0035 D966 -- MOS34 0036 D966 ; reset stack -- MOS34 0037 D966 ; -- MOS34 0038 D966 A2 FF LDXIM &FF -- MOS34 0039 D968 9A TXS -- MOS34 0040 D969 -- MOS34 0041 D969 ; push hard reset status -- MOS34 0042 D969 ; -- MOS34 0043 D969 AD 4E FE LDA IERQ -- MOS34 0044 D96C 0A ASLA -- MOS34 0045 D96D 48 PHA ;A=0 => hard, A<>0 => soft -- MOS34 0046 D96E F0 09 BEQ HRDRST ;[hard reset, A=0] MOS34 0046 D96E v76 MOS34 0047 D970 ; MOS34 0046 D96E v76 MOS34 0048 D970 ; prepare for possible soft reset MOS34 0046 D96E v76 MOS34 0049 D970 ; MOS34 0046 D96E v76 MOS34 0050 D970 ; check for critical region MOS34 0046 D96E v76 MOS34 0051 D970 ; MOS34 0046 D96E v76 MOS34 0052 D970 AD 58 02 LDA CRIT MOS34 0046 D96E v76 MOS34 0053 D973 4A LSRA MOS34 0046 D96E v76 MOS34 0054 D974 C9 01 CMPIM &01 MOS34 0046 D96E v76 MOS34 0055 D976 D0 38 BNE SFTRST ;[not within a critical region] MOS34 0055 D976 v47 MOS34 0056 D978 ; A=1 MOS34 0055 D976 v47 MOS34 0057 D978 4A LSRA MOS34 0055 D976 v47 MOS34 0058 D979 ; A=0 MOS34 0055 D976 v47 MOS34 0059 D979 ; MOS34 0055 D976 v47 MOS34 0060 D979 ; within a critical region - clear store MOS34 0055 D976 v47 MOS34 0061 D979 ; MOS34 0055 D976 v47 MOS34 0062 D979 HRDRST ;hard reset MOS34 0055 D976 v47 MOS34 0063 D979 ; A=0 MOS34 0055 D976 v47 MOS34 0064 D979 ; hard reset MOS34 0055 D976 v47 MOS34 0065 D979 ; clear store MOS34 0055 D976 v47 MOS34 0066 D979 [ MOS125 = &FF MOS34 0055 D976 v47 MOS34 0092 D979 ] MOS34 0055 D976 v47 MOS34 0093 D979 MOS34 0055 D976 v47 MOS34 0094 D979 [ MOS125 = &7F MOS34 0055 D976 v47 MOS34 0095 D979 A2 04 LDXIM &04 ;start clearing at page 4 MOS34 0055 D976 v47 MOS34 0096 D97B A8 TAY ;Y := 0 MOS34 0055 D976 v47 MOS34 0097 D97C 85 00 STA &0000 MOS34 0055 D976 v47 MOS34 0098 D97E CLRPG MOS34 0055 D976 v47 MOS34 0099 D97E 86 01 STX &0001 MOS34 0055 D976 v47 MOS34 0100 D980 C8 INY MOS34 0055 D976 v47 MOS34 0101 D981 91 00 STAIY &0000 ;saves 163 ms MOS34 0055 D976 v47 MOS34 0102 D983 E4 01 CPX &0001 MOS34 0055 D976 v47 MOS34 0103 D985 D0 23 BNE CLEAR0 ;[16K RAM] MOS34 0055 D976 v47 MOS34 0104 D987 E8 INX MOS34 0055 D976 v47 MOS34 0105 D988 E0 0D CPXIM /(NMI ) MOS34 0055 D976 v47 MOS34 0106 D98A 85 F2 STA WORK MOS34 0055 D976 v47 MOS34 0107 D98C 86 F3 STX WORK+1 MOS34 0055 D976 v47 MOS34 0108 D98E F0 06 BEQ CLEARA ;leave RTI in place MOS34 0055 D976 v47 MOS34 0109 D990 88 DEY ;otherwise Y=0 MOS34 0055 D976 v47 MOS34 0110 D991 MOS34 0055 D976 v47 MOS34 0111 D991 ; clear store to $00 (no blobs on screen) MOS34 0055 D976 v47 MOS34 0112 D991 ; done: 0000 even . 0 . . MOS34 0055 D976 v47 MOS34 0113 D991 ; X WORK odd x . . . MOS34 0055 D976 v47 MOS34 0114 D991 ; Y MOS34 0055 D976 v47 MOS34 0115 D991 CLEAR MOS34 0055 D976 v47 MOS34 0116 D991 91 F2 STAIY WORK ;saves 4 ms MOS34 0055 D976 v47 MOS34 0117 D993 C8 INY ;1 MOS34 0055 D976 v47 MOS34 0118 D994 91 00 STAIY &0000 MOS34 0055 D976 v47 MOS34 0119 D996 CLEARA MOS34 0055 D976 v47 MOS34 0120 D996 91 F2 STAIY WORK ;saves 4 ms MOS34 0055 D976 v47 MOS34 0121 D998 C8 INY ;2 MOS34 0055 D976 v47 MOS34 0122 D999 91 00 STAIY &0000 ;saves 24 ms MOS34 0055 D976 v47 MOS34 0123 D99B 91 F2 STAIY WORK ;saves 4 ms MOS34 0055 D976 v47 MOS34 0124 D99D C8 INY ;3 MOS34 0055 D976 v47 MOS34 0125 D99E 91 00 STAIY &0000 ;saves 8 ms MOS34 0055 D976 v47 MOS34 0126 D9A0 91 F2 STAIY WORK ;saves 4 ms MOS34 0055 D976 v47 MOS34 0127 D9A2 C8 INY ;0 MOS34 0055 D976 v47 MOS34 0128 D9A3 91 00 STAIY &0000 ;saves 4 ms MOS34 0055 D976 v47 MOS34 0129 D9A5 D0 EA BNE CLEAR MOS34 0055 D976 v47 MOS34 0130 D9A7 E8 INX MOS34 0055 D976 v47 MOS34 0131 D9A8 10 D4 BPL CLRPG MOS34 0055 D976 v47 MOS34 0132 D9AA ; 32K RAM MOS34 0055 D976 v47 MOS34 0133 D9AA ; MOS34 0055 D976 v47 MOS34 0134 D9AA CLEAR0 MOS34 0055 D976 v47 MOS34 0135 D9AA ; $0001 = $80 (model B) or $40 (model A) MOS34 0055 D976 v47 MOS34 0136 D9AA 8E 8E 02 STX MODELB MOS34 0055 D976 v47 MOS34 0137 D9AD ; MOS34 0055 D976 v47 MOS34 0138 D9AD ; force soft keys reset MOS34 0055 D976 v47 MOS34 0139 D9AD 8E 84 02 STX USKFLG ;USKFLG := non-zero MOS34 0055 D976 v47 MOS34 0140 D9B0 ] MOS34 0055 D976 v47 MOS34 0141 D9B0 MOS34 0055 D976 v47 MOS34 0142 D9B0 [ MOS125 = &00 MOS34 0055 D976 v47 MOS34 0169 D9B0 ] MOS34 0055 D976 v47 MOS34 0170 D9B0 MOS34 0055 D976 v47 MOS34 0171 D9B0 ; MOS34 0055 D976 v47 MOS34 0172 D9B0 SFTRST MOS34 0055 D976 v47 MOS34 0173 D9B0 ; MOS34 0055 D976 v47 MOS34 0174 D9B0 ; initialise addressable latch outputs hi MOS34 0055 D976 v47 MOS34 0175 D9B0 ; MOS34 0055 D976 v47 MOS34 0176 D9B0 A2 0F LDXIM &0F ;for latch driving -- MOS34 0177 D9B2 8E 42 FE STX DDRBQ ;set PB3-PB0 as outputs to drive addressable latch -- MOS34 0178 D9B5 ; -- MOS34 0179 D9B5 IALTCH -- MOS34 0180 D9B5 CA DEX MOS34 0183 D9BB ^78 MOS34 0181 D9B6 8E 40 FE STX PBQ ;first store value = $0E, last store value = $08 MOS34 0183 D9BB ^78 MOS34 0182 D9B9 E0 09 CPXIM &09 MOS34 0183 D9BB ^78 MOS34 0183 D9BB B0 F8 BCS IALTCH -- MOS34 0184 D9BD ; fall thru when X=$08 -- MOS34 0185 D9BD -- MOS34 0186 D9BD -- MOS34 0187 D9BD ; check for hard restart -- MOS34 0188 D9BD ; -- MOS34 0189 D9BD ; read start-up options -- MOS34 0190 D9BD ; MOS34 MOS34 MOS34 MOS34 Acorn macro assembler Page 58 MOS34 Entry point after hardware break/reset MOS34 -- MOS34 0191 D9BD E8 INX ;X := $09, scan down from last start-up option -- MOS34 0192 D9BE ; -- MOS34 0193 D9BE RDOPT1 -- MOS34 0194 D9BE 8A TXA ;save X in A MOS34 0203 D9C8 ^74 MOS34 0195 D9BF 20 57 F0 JSR KC ;read state of matrix element addressed by X (A maintained) MOS34 0203 D9C8 ^74 MOS34 0196 D9C2 ; MOS34 0203 D9C8 ^74 MOS34 0197 D9C2 ; N.B. does not corrupt A MOS34 0203 D9C8 ^74 MOS34 0198 D9C2 ; MOS34 0203 D9C8 ^74 MOS34 0199 D9C2 E0 80 CPXIM &80 ;C=0 => option open, C=1 => option closed MOS34 0203 D9C8 ^74 MOS34 0200 D9C4 66 FC ROR TEMPA ;rotate state of start-up option into TEMPA byte MOS34 0203 D9C8 ^74 MOS34 0201 D9C6 AA TAX ;restore X MOS34 0203 D9C8 ^74 MOS34 0202 D9C7 CA DEX MOS34 0203 D9C8 ^74 MOS34 0203 D9C8 D0 F4 BNE RDOPT1 ;execute loop 9 times -- MOS34 0204 D9CA ; -- MOS34 0205 D9CA ; N.B. exits with X=0, SHIFT key has not been scanned -- MOS34 0206 D9CA ; state of CTRL key has been rotated into TEMPA -- MOS34 0207 D9CA ; -- MOS34 0208 D9CA 8E 8D 02 STX TYPE ;restart type := 0 -- MOS34 0209 D9CD 26 FC ROL TEMPA ;C = state of CTRL key, TEMPA = start-up options -- MOS34 0210 D9CF 20 22 EF JSR KBDIS ;disable keyboard (and resume hardware scan) -- MOS34 0211 D9D2 ; -- MOS34 0212 D9D2 6A RORA ;C=1 => CTRL pressed (KBDIS does PHP ... PLA) -- MOS34 0213 D9D3 ; -- MOS34 0214 D9D3 A2 9C LDXIM CPAGE2 ;(do not set to reset timer if soft restart) -- MOS34 0215 D9D5 A0 8D LDYIM NPAGE2 ;reset BREAKI if power up -- MOS34 0216 D9D7 68 PLA ;pull hard restart status -- MOS34 0217 D9D8 F0 09 BEQ POWER ;[power up] MOS34 0217 D9D8 v76 MOS34 0218 D9DA ; MOS34 0217 D9D8 v76 MOS34 0219 D9DA A0 7E LDYIM MPAGE2 ;prepare for BREAK MOS34 0217 D9D8 v76 MOS34 0220 D9DC 90 11 BCC SOFT ;[CTRL not pressed - force soft reset, b1b0(TYPE) := 0] MOS34 0220 D9DC v6E MOS34 0221 D9DE ; MOS34 0220 D9DC v6E MOS34 0222 D9DE ; b1b0(TYPE) := 2 MOS34 0220 D9DC v6E MOS34 0223 D9DE ; MOS34 0220 D9DC v6E MOS34 0224 D9DE A0 87 LDYIM PPAGE2 ;CTRL/BREAK MOS34 0220 D9DC v6E MOS34 0225 D9E0 EE 8D 02 INC TYPE MOS34 0220 D9DC v6E MOS34 0226 D9E3 ; MOS34 0220 D9DC v6E MOS34 0227 D9E3 POWER ;power up, b1b0(TYPE) := 1 MOS34 0220 D9DC v6E MOS34 0228 D9E3 ;HARD ;hard restart MOS34 0220 D9DC v6E MOS34 0229 D9E3 EE 8D 02 INC TYPE MOS34 0220 D9DC v6E MOS34 0230 D9E6 ; MOS34 0220 D9DC v6E MOS34 0231 D9E6 ; initialise OPTION MOS34 0220 D9DC v6E MOS34 0232 D9E6 ; MOS34 0220 D9DC v6E MOS34 0233 D9E6 A5 FC LDA TEMPA MOS34 0220 D9DC v6E MOS34 0234 D9E8 49 FF EORIM &FF ;invert VDU mode selection MOS34 0220 D9DC v6E MOS34 0235 D9EA 8D 8F 02 STA OPTION MOS34 0220 D9DC v6E MOS34 0236 D9ED ; MOS34 0220 D9DC v6E MOS34 0237 D9ED A2 90 LDXIM DPAGE2 ;set to reset timer MOS34 0220 D9DC v6E MOS34 0238 D9EF MOS34 0220 D9DC v6E MOS34 0239 D9EF MOS34 0220 D9DC v6E MOS34 0240 D9EF SOFT MOS34 0220 D9DC v6E MOS34 0241 D9EF ; initialise other page two locations to zero/$FF MOS34 0220 D9DC v6E MOS34 0242 D9EF ; N.B. X has been set to an appropriate value MOS34 0220 D9DC v6E MOS34 0243 D9EF A9 00 LDAIM ZERO -- MOS34 0244 D9F1 IP0SX -- MOS34 0245 D9F1 E0 CE CPXIM FFBYTE MOS34 0258 DA00 ^6F MOS34 0246 D9F3 [ MOS125 = &FF MOS34 0258 DA00 ^6F MOS34 0249 D9F3 | MOS34 0258 DA00 ^6F MOS34 0250 D9F3 D0 07 BNE Z0BYTE MOS34 0258 DA00 ^6F MOS34 0251 D9F5 A9 FF LDAIM &FF MOS34 0258 DA00 ^6F MOS34 0252 D9F7 8D CE 02 STA SSEMA MOS34 0258 DA00 ^6F MOS34 0253 D9FA A2 D2 LDXIM PFLAG MOS34 0258 DA00 ^6F MOS34 0254 D9FC ] MOS34 0258 DA00 ^6F MOS34 0255 D9FC Z0BYTE MOS34 0258 DA00 ^6F MOS34 0256 D9FC 9D 00 02 STAAX &0200 MOS34 0258 DA00 ^6F MOS34 0257 D9FF E8 INX MOS34 0258 DA00 ^6F MOS34 0258 DA00 D0 EF BNE IP0SX -- MOS34 0259 DA02 ; N.B. A=$FF, X=0 -- MOS34 0260 DA02 8D 63 FE STA DDRAR ;set all outputs on printer data direction register (6522B) -- MOS34 0261 DA05 -- MOS34 0262 DA05 -- MOS34 0263 DA05 ; initialise page zero locations to zero -- MOS34 0264 DA05 ; -- MOS34 0265 DA05 8A TXA ;A := 0 -- MOS34 0266 DA06 A2 E2 LDXIM BPAGE0 -- MOS34 0267 DA08 IP0SW -- MOS34 0268 DA08 95 00 STAAX ZERO MOS34 0270 DA0B ^7B MOS34 0269 DA0A E8 INX MOS34 0270 DA0B ^7B MOS34 0270 DA0B D0 FB BNE IP0SW -- MOS34 0271 DA0D ; X=0 -- MOS34 0272 DA0D -- MOS34 0273 DA0D -- MOS34 0274 DA0D ; initialise page two specific values -- MOS34 0275 DA0D ; -- MOS34 0276 DA0D IP2SV -- MOS34 0277 DA0D B9 D1 D8 LDAAY IPAGE2 -&01 MOS34 0280 DA14 ^77 MOS34 0278 DA10 99 FF 01 STAAY APAGE2 -&01 MOS34 0280 DA14 ^77 MOS34 0279 DA13 88 DEY MOS34 0280 DA14 ^77 MOS34 0280 DA14 D0 F7 BNE IP2SV -- MOS34 0281 DA16 ; Y=0 -- MOS34 0282 DA16 -- MOS34 0283 DA16 -- MOS34 0284 DA16 ; make old key space in case CFS auto-boot selected -- MOS34 0285 DA16 ; -- MOS34 0286 DA16 A9 62 LDAIM &62 -- MOS34 0287 DA18 85 ED STA OKEY -- MOS34 0288 DA1A ; X=0, Y=0 -- MOS34 0289 DA1A -- MOS34 0290 DA1A -- MOS34 0291 DA1A ; setup MC6850 -- MOS34 0292 DA1A ; -- MOS34 0293 DA1A 20 FE FA JSR MC6850 ;N.B. does not corrupt X or Y -- MOS34 0294 DA1D ; X=0, Y=0 -- MOS34 0295 DA1D -- MOS34 0296 DA1D -- MOS34 0297 DA1D ; clear any 6522 interrupt status -- MOS34 0298 DA1D ; -- MOS34 0299 DA1D A9 7F LDAIM &7F -- MOS34 0300 DA1F E8 INX ;X=1 -- MOS34 0301 DA20 IFRIER ;X=1 initialises IERQ&IERR, X=0 initialises IFRQ&IFRR -- MOS34 0302 DA20 9D 4D FE STAAX IFRQ MOS34 0305 DA27 ^77 MOS34 0303 DA23 9D 6D FE STAAX IFRR MOS34 0305 DA27 ^77 MOS34 0304 DA26 CA DEX MOS34 0305 DA27 ^77 MOS34 0305 DA27 10 F7 BPL IFRIER ;[execute loop once more with X=0] -- MOS34 0306 DA29 ; X=$FF -- MOS34 0307 DA29 ; -- MOS34 0308 DA29 [ FALSE=0 -- MOS34 0311 DA29 ] -- MOS34 0312 DA29 -- MOS34 0313 DA29 ; TEMPA is now 0 -- MOS34 0314 DA29 ; if an interrupt occurs it will adopt the value $7F -- MOS34 0315 DA29 ; MOS34 MOS34 MOS34 MOS34 Acorn macro assembler Page 59 MOS34 Entry point after hardware break/reset MOS34 -- MOS34 0316 DA29 ; allow test equipment to interrupt if present -- MOS34 0317 DA29 ; -- MOS34 0318 DA29 58 CLI -- MOS34 0319 DA2A ; ** TEST EQUIPMENT INTERRUPT MAY OCCUR HERE ** -- MOS34 0320 DA2A 78 SEI -- MOS34 0321 DA2B ; -- MOS34 0322 DA2B 24 FC BIT TEMPA -- MOS34 0323 DA2D 50 03 BVC NOTST1 MOS34 0323 DA2D v7C MOS34 0324 DA2F ; C=0 MOS34 0323 DA2D v7C MOS34 0325 DA2F 20 82 F0 JSR JMITST ;enter test routine (first call) MOS34 0323 DA2D v7C MOS34 0326 DA32 NOTST1 MOS34 0323 DA2D v7C MOS34 0327 DA32 MOS34 0323 DA2D v7C MOS34 0328 DA32 MOS34 0323 DA2D v7C MOS34 0329 DA32 [ FALSE=0 MOS34 0323 DA2D v7C MOS34 0348 DA32 ] MOS34 0323 DA2D v7C MOS34 0349 DA32 MOS34 0323 DA2D v7C MOS34 0350 DA32 MOS34 0323 DA2D v7C MOS34 0351 DA32 ; initialise 6522s MOS34 0323 DA2D v7C MOS34 0352 DA32 ; MOS34 0323 DA2D v7C MOS34 0353 DA32 A2 F2 LDXIM &F2 ;enable TIMER1(clock,40), TIMER2(speech,20) -- MOS34 0354 DA34 ; CB1(ADC,10), CA1(VSYNC,02) and NOT[CA2(keyboard,01)] -- MOS34 0355 DA34 8E 4E FE STX IERQ -- MOS34 0356 DA37 -- MOS34 0357 DA37 -- MOS34 0358 DA37 ; initialise peripheral control register -- MOS34 0359 DA37 ; -- MOS34 0360 DA37 A2 04 LDXIM &04 -- MOS34 0361 DA39 8E 4C FE STX PCRQ ;select CA2 positive active edge -- MOS34 0362 DA3C -- MOS34 0363 DA3C -- MOS34 0364 DA3C ; setup centisecond timer -- MOS34 0365 DA3C ; -- MOS34 0366 DA3C A9 60 LDAIM &60 ;TIMER1 continuous, TIMER2 count pulses on PB6 -- MOS34 0367 DA3E 8D 4B FE STA ACRQ -- MOS34 0368 DA41 -- MOS34 0369 DA41 -- MOS34 0370 DA41 ; N.B. ACRR zeroed by reset -- MOS34 0371 DA41 ; -- MOS34 0372 DA41 ; set timer hi-byte -- MOS34 0373 DA41 ; -- MOS34 0374 DA41 A9 0E LDAIM &0E ;timer 1 period = 998 usec -- MOS34 0375 DA43 8D 46 FE STA TQLLQ -- MOS34 0376 DA46 8D 6C FE STA PCRR ;set CA2 hi (for printer) -- MOS34 0377 DA49 ; -- MOS34 0378 DA49 ; start conversion on analog/digital chip -- MOS34 0379 DA49 ; -- MOS34 0380 DA49 8D C0 FE STA ADCCTL ;12 bits from chip channel 2 -- MOS34 0381 DA4C -- MOS34 0382 DA4C -- MOS34 0383 DA4C ; check whether 6522B present -- MOS34 0384 DA4C ; -- MOS34 0385 DA4C CD 6C FE CMP PCRR -- MOS34 0386 DA4F F0 03 BEQ B6522E ;[6522B exists] MOS34 0386 DA4F v7C MOS34 0387 DA51 ; MOS34 0386 DA4F v7C MOS34 0388 DA51 ; 6522B does not exist MOS34 0386 DA4F v7C MOS34 0389 DA51 ; MOS34 0386 DA4F v7C MOS34 0390 DA51 EE 77 02 INC B6522 ;B6522 := $00 MOS34 0386 DA4F v7C MOS34 0391 DA54 B6522E MOS34 0386 DA4F v7C MOS34 0392 DA54 ; MOS34 0386 DA4F v7C MOS34 0393 DA54 ; set timer lo-byte MOS34 0386 DA4F v7C MOS34 0394 DA54 ; MOS34 0386 DA4F v7C MOS34 0395 DA54 A9 27 LDAIM &27 -- MOS34 0396 DA56 8D 47 FE STA TQLHQ -- MOS34 0397 DA59 8D 45 FE STA TQCHQ -- MOS34 0398 DA5C -- MOS34 0399 DA5C -- MOS34 0400 DA5C ; kill sound -- MOS34 0401 DA5C ; -- MOS34 0402 DA5C 20 A4 EC JSR SNDRST -- MOS34 0403 DA5F -- MOS34 0404 DA5F -- MOS34 0405 DA5F ; ensure motor off -- MOS34 0406 DA5F ; reinitialise serproc -- MOS34 0407 DA5F ; -- MOS34 0408 DA5F AD 82 02 LDA SPREGA -- MOS34 0409 DA62 29 7F ANDIM &7F -- MOS34 0410 DA64 20 07 E7 JSR STASP ;STA SPREGA, STA SERPRC -- MOS34 0411 DA67 ; X, Y corrupted -- MOS34 0412 DA67 -- MOS34 0413 DA67 -- MOS34 0414 DA67 ; conditionally reset soft keys -- MOS34 0415 DA67 ; soft keys are reset -- MOS34 0416 DA67 ; (a) after a hard reset -- MOS34 0417 DA67 ; (b) if reset occurred during a critical update of the soft keys -- MOS34 0418 DA67 ; -- MOS34 0419 DA67 AE 84 02 LDX USKFLG -- MOS34 0420 DA6A F0 03 BEQ SKOK MOS34 0420 DA6A v7C MOS34 0421 DA6C 20 EB E9 JSR RSOFT ;reset soft keys, sets X=0 MOS34 0420 DA6A v7C MOS34 0422 DA6F SKOK MOS34 0420 DA6A v7C MOS34 0423 DA6F ; X=0 MOS34 0420 DA6A v7C MOS34 0424 DA6F MOS34 0420 DA6A v7C MOS34 0425 DA6F MOS34 0420 DA6A v7C MOS34 0426 DA6F ; compare ROMs MOS34 0420 DA6A v7C MOS34 0427 DA6F ; MOS34 0420 DA6A v7C MOS34 0428 DA6F CRX MOS34 0420 DA6A v7C MOS34 0429 DA6F 20 DB DB JSR STXROM ;select ROM MOS34 0486 DAC1 ^2C MOS34 0430 DA72 ; MOS34 0486 DAC1 ^2C MOS34 0431 DA72 ; check for copyright string MOS34 0486 DAC1 ^2C MOS34 0432 DA72 ; MOS34 0486 DAC1 ^2C MOS34 0433 DA72 A2 03 LDXIM &03 MOS34 0486 DAC1 ^2C MOS34 0434 DA74 AC 07 80 LDY COPYRP MOS34 0486 DAC1 ^2C MOS34 0435 DA77 CRCPYR MOS34 0486 DAC1 ^2C MOS34 0436 DA77 B9 00 80 LDAAY LANG MOS34 0486 DAC1 ^2C MOS34 0437 DA7A DD 1E F5 CMPAX COPYR MOS34 0486 DAC1 ^2C MOS34 0438 DA7D D0 2E BNE CRBAD MOS34 0486 DAC1 ^2C MOS34 0439 DA7F C8 INY MOS34 0486 DAC1 ^2C MOS34 0440 DA80 CA DEX MOS34 0486 DAC1 ^2C MOS34 0441 DA81 10 F4 BPL CRCPYR MOS34 0486 DAC1 ^2C MOS34 0442 DA83 ; MOS34 0486 DAC1 ^2C MOS34 0443 DA83 ; ROM has copyright string MOS34 0486 DAC1 ^2C MOS34 0444 DA83 ; MOS34 0486 DAC1 ^2C MOS34 0445 DA83 A6 F4 LDX ROMID MOS34 0486 DAC1 ^2C MOS34 0446 DA85 A4 F4 LDY ROMID MOS34 0486 DAC1 ^2C MOS34 0447 DA87 CRY MOS34 0486 DAC1 ^2C MOS34 0448 DA87 C8 INY MOS34 0486 DAC1 ^2C MOS34 0449 DA88 C0 10 CPYIM NROM MOS34 0486 DAC1 ^2C MOS34 0450 DA8A B0 25 BCS CRNX ;[Y > number of ROMs] MOS34 0486 DAC1 ^2C MOS34 0451 DA8C 98 TYA MOS34 0486 DAC1 ^2C MOS34 0452 DA8D 49 FF EORIM &FF MOS34 0486 DAC1 ^2C MOS34 0453 DA8F 85 FA STA CRLO MOS34 0486 DAC1 ^2C MOS34 0454 DA91 A9 7F LDAIM &7F ;N.B. this is LANG / - 1 MOS34 MOS34 MOS34 MOS34 Acorn macro assembler Page 60 MOS34 Entry point after hardware break/reset MOS34 MOS34 0486 DAC1 ^2C MOS34 0455 DA93 85 FB STA CRHI MOS34 0486 DAC1 ^2C MOS34 0456 DA95 CRLOOP MOS34 0486 DAC1 ^2C MOS34 0457 DA95 8C 30 FE STY ROM ;select second (Y) ROM MOS34 0486 DAC1 ^2C MOS34 0458 DA98 B1 FA LDAIY CRLO MOS34 0486 DAC1 ^2C MOS34 0459 DA9A 8E 30 FE STX ROM ;select first (X) ROM MOS34 0486 DAC1 ^2C MOS34 0460 DA9D D1 FA CMPIY CRLO MOS34 0486 DAC1 ^2C MOS34 0461 DA9F D0 E6 BNE CRY ;[ROMs do not match] MOS34 0486 DAC1 ^2C MOS34 0462 DAA1 E6 FA INC CRLO MOS34 0486 DAC1 ^2C MOS34 0463 DAA3 D0 F0 BNE CRLOOP MOS34 0486 DAC1 ^2C MOS34 0464 DAA5 E6 FB INC CRHI MOS34 0486 DAC1 ^2C MOS34 0465 DAA7 A5 FB LDA CRHI MOS34 0486 DAC1 ^2C MOS34 0466 DAA9 C9 84 CMPIM &84 ;compare only first 1K of ROMs MOS34 0486 DAC1 ^2C MOS34 0467 DAAB 90 E8 BCC CRLOOP MOS34 0486 DAC1 ^2C MOS34 0468 DAAD ; ROMs match MOS34 0486 DAC1 ^2C MOS34 0469 DAAD CRBAD MOS34 0486 DAC1 ^2C MOS34 0470 DAAD A6 F4 LDX ROMID MOS34 0486 DAC1 ^2C MOS34 0471 DAAF 10 0D BPL CRNX1 ;[ALWAYS jump] MOS34 0486 DAC1 ^2C MOS34 0472 DAB1 ; NEVER fall thru MOS34 0486 DAC1 ^2C MOS34 0473 DAB1 ; MOS34 0486 DAC1 ^2C MOS34 0474 DAB1 CRNX MOS34 0486 DAC1 ^2C MOS34 0475 DAB1 AD 06 80 LDA ROMTYP MOS34 0486 DAC1 ^2C MOS34 0476 DAB4 9D A1 02 STAAX ROMS ;store type of recognised ROM MOS34 0486 DAC1 ^2C MOS34 0477 DAB7 ; check for BASIC ROM MOS34 0486 DAC1 ^2C MOS34 0478 DAB7 ;***** N.B. WHITE BASIC MAY NEED 'ANDIM $FE' ***** MOS34 0486 DAC1 ^2C MOS34 0479 DAB7 29 8F ANDIM &8F MOS34 0486 DAC1 ^2C MOS34 0480 DAB9 D0 03 BNE CRNX1 ;[not a BASIC ROM] MOS34 0486 DAC1 ^2C MOS34 0481 DABB ; BASIC ROM - remember ROM id for *BASIC command MOS34 0486 DAC1 ^2C MOS34 0482 DABB 8E 4B 02 STX BROMID MOS34 0486 DAC1 ^2C MOS34 0483 DABE CRNX1 MOS34 0486 DAC1 ^2C MOS34 0484 DABE E8 INX MOS34 0486 DAC1 ^2C MOS34 0485 DABF E0 10 CPXIM NROM MOS34 0486 DAC1 ^2C MOS34 0486 DAC1 90 AC BCC CRX ;[X a valid ROM number] -- MOS34 0487 DAC3 -- MOS34 0488 DAC3 [ NOSP = &00 -- MOS34 0490 DAC3 | -- MOS34 0491 DAC3 ; X=NROM -- MOS34 0492 DAC3 ; -- MOS34 0493 DAC3 ; if speech chip ready is still high then the chip has not been fitted -- MOS34 0494 DAC3 ; -- MOS34 0495 DAC3 2C 40 FE BIT PBQ -- MOS34 0496 DAC6 30 11 BMI START1 ;[chip does not exist] MOS34 0496 DAC6 v6E MOS34 0497 DAC8 ; X=NROM MOS34 0496 DAC6 v6E MOS34 0498 DAC8 ; speech chip present MOS34 0496 DAC6 v6E MOS34 0499 DAC8 ; MOS34 0496 DAC6 v6E MOS34 0500 DAC8 CE 7B 02 DEC SPFLAG ;SPFLAG := $FF MOS34 0496 DAC6 v6E MOS34 0501 DACB ; X=NROM MOS34 0496 DAC6 v6E MOS34 0502 DACB ; reset speech processor MOS34 0496 DAC6 v6E MOS34 0503 DACB ; MOS34 0496 DAC6 v6E MOS34 0504 DACB ; write NROM * $FF (reset) to speech processor MOS34 0496 DAC6 v6E MOS34 0505 DACB SPRST1 MOS34 0496 DAC6 v6E MOS34 0506 DACB A0 FF LDYIM SPOPRT MOS34 0496 DAC6 v6E MOS34 0507 DACD 20 B9 EE JSR WSPECH ;N.B. corrupts A and Y MOS34 0496 DAC6 v6E MOS34 0508 DAD0 CA DEX MOS34 0496 DAC6 v6E MOS34 0509 DAD1 D0 F8 BNE SPRST1 MOS34 0496 DAC6 v6E MOS34 0510 DAD3 ; X=0 MOS34 0496 DAC6 v6E MOS34 0511 DAD3 ; MOS34 0496 DAC6 v6E MOS34 0512 DAD3 8E 48 FE STX TRCLQ MOS34 0496 DAC6 v6E MOS34 0513 DAD6 8E 49 FE STX TRCHQ ;enable interrupt after one negative pulse on PB6 (speech int) MOS34 0496 DAC6 v6E MOS34 0514 DAD9 ] MOS34 0496 DAC6 v6E MOS34 0515 DAD9 MOS34 0496 DAC6 v6E MOS34 0516 DAD9 START1 MOS34 0496 DAC6 v6E MOS34 0517 DAD9 MOS34 0496 DAC6 v6E MOS34 0518 DAD9 MOS34 0496 DAC6 v6E MOS34 0519 DAD9 AD 8F 02 LDA OPTION ;initialise graphics mode from start-up options -- MOS34 0520 DADC 20 00 C3 JSR VDINIT ;initialise VDU module -- MOS34 0521 DADF -- MOS34 0522 DADF -- MOS34 0523 DADF ; set up reset soft key (fA) -- MOS34 0524 DADF ; -- MOS34 0525 DADF A0 CA LDYIM BREKEY -- MOS34 0526 DAE1 20 52 E5 JSR RDCHS ;set to expand softkeyA immediately -- MOS34 0527 DAE4 ; C=0 cos buffer empty -- MOS34 0528 DAE4 ; -- MOS34 0529 DAE4 ; let user intercept BREAK -- MOS34 0530 DAE4 ; -- MOS34 0531 DAE4 ; C=0 -- MOS34 0532 DAE4 20 43 EB JSR BREAK -- MOS34 0533 DAE7 ; -- MOS34 0534 DAE7 ; initialise CFS state -- MOS34 0535 DAE7 ; -- MOS34 0536 DAE7 20 3B F1 JSR INIT -- MOS34 0537 DAEA ; -- MOS34 0538 DAEA ; check for tube -- MOS34 0539 DAEA ; -- MOS34 0540 DAEA A9 81 LDAIM &81 -- MOS34 0541 DAEC 8D E0 FE STA TREG0 -- MOS34 0542 DAEF AD E0 FE LDA TREG0 -- MOS34 0543 DAF2 6A RORA -- MOS34 0544 DAF3 90 0A BCC NOTUBE ;[tube not present] MOS34 0544 DAF3 v75 MOS34 0545 DAF5 ; MOS34 0544 DAF3 v75 MOS34 0546 DAF5 ; tube present MOS34 0544 DAF3 v75 MOS34 0547 DAF5 ; MOS34 0544 DAF3 v75 MOS34 0548 DAF5 A2 FF LDXIM SVTUBE MOS34 0544 DAF3 v75 MOS34 0549 DAF7 20 6C F1 JSR SVOP ;initialise tube MOS34 0544 DAF3 v75 MOS34 0550 DAFA D0 03 BNE NOTUBE ;[tube software not present] MOS34 0544 DAF3 v75 MOS34 0551 DAFC CE 7A 02 DEC TUBEM ;TUBEM := $FF MOS34 0544 DAF3 v75 MOS34 0552 DAFF NOTUBE MOS34 0544 DAF3 v75 MOS34 0553 DAFF ; MOS34 0544 DAF3 v75 MOS34 0554 DAFF ; initialise service ROMs before writing to screen MOS34 0544 DAF3 v75 MOS34 0555 DAFF ; MOS34 0544 DAF3 v75 MOS34 0556 DAFF A0 0E LDYIM /(OSHWM ) ;Y := default high water mark -- MOS34 0557 DB01 ; -- MOS34 0558 DB01 A2 01 LDXIM SVSTAT ;offer static area -- MOS34 0559 DB03 20 6C F1 JSR SVOP -- MOS34 0560 DB06 ; -- MOS34 0561 DB06 A2 02 LDXIM SVDYN ;offer dynamic area -- MOS34 0562 DB08 20 6C F1 JSR SVOP -- MOS34 0563 DB0B ; -- MOS34 0564 DB0B 8C 43 02 STY IHWM ;save adjusted high water mark -- MOS34 0565 DB0E 8C 44 02 STY HWM ;save adjusted high water mark -- MOS34 0566 DB11 ; -- MOS34 0567 DB11 ; allow tube post-initialisation (e.g. exploding font) -- MOS34 0568 DB11 ; -- MOS34 0569 DB11 A2 FE LDXIM SVTPIN ;******** ASSUMED = $FE ******** -- MOS34 0570 DB13 AC 7A 02 LDY TUBEM ;pass tube flag as argument -- MOS34 0571 DB16 20 6C F1 JSR SVOP -- MOS34 0572 DB19 ; A=$00 (tube present) -- MOS34 0573 DB19 ; A=$FF (tube not present) -- MOS34 0574 DB19 ; -- MOS34 0575 DB19 ; conditionally output start-up message -- MOS34 0576 DB19 ; 'BBC Computer' MOS34 MOS34 MOS34 MOS34 Acorn macro assembler Page 61 MOS34 Entry point after hardware break/reset MOS34 -- MOS34 0577 DB19 ; -- MOS34 0578 DB19 2D 67 02 AND QUIET ;may be set by paged ROM -- MOS34 0579 DB1C 10 1B BPL ENTER ;[shshh ... you know who] MOS34 0579 DB1C v64 MOS34 0580 DB1E ; MOS34 0579 DB1C v64 MOS34 0581 DB1E ; output start up message MOS34 0579 DB1C v64 MOS34 0582 DB1E ; MOS34 0579 DB1C v64 MOS34 0583 DB1E A0 02 LDYIM MSGBBC-&01 MOS34 0579 DB1C v64 MOS34 0584 DB20 20 55 DE JSR WRSTR MOS34 0579 DB1C v64 MOS34 0585 DB23 ; MOS34 0579 DB1C v64 MOS34 0586 DB23 ; indicate model type MOS34 0579 DB1C v64 MOS34 0587 DB23 ; MOS34 0579 DB1C v64 MOS34 0588 DB23 AD 8D 02 LDA TYPE MOS34 0579 DB1C v64 MOS34 0589 DB26 F0 0C BEQ Z ;[soft restart] MOS34 0579 DB1C v64 MOS34 0590 DB28 ; MOS34 0579 DB1C v64 MOS34 0591 DB28 ; hard restart MOS34 0579 DB1C v64 MOS34 0592 DB28 ; complete message MOS34 0579 DB1C v64 MOS34 0593 DB28 ; MOS34 0579 DB1C v64 MOS34 0594 DB28 A0 16 LDYIM MSG32K-&01 MOS34 0579 DB1C v64 MOS34 0595 DB2A 2C 8E 02 BIT MODELB MOS34 0579 DB1C v64 MOS34 0596 DB2D 30 02 BMI B ;[model B] MOS34 0579 DB1C v64 MOS34 0597 DB2F ; MOS34 0579 DB1C v64 MOS34 0598 DB2F ; model A MOS34 0579 DB1C v64 MOS34 0599 DB2F ; MOS34 0579 DB1C v64 MOS34 0600 DB2F A0 11 LDYIM MSG16K-&01 MOS34 0579 DB1C v64 MOS34 0601 DB31 B MOS34 0579 DB1C v64 MOS34 0602 DB31 20 55 DE JSR WRSTR MOS34 0579 DB1C v64 MOS34 0603 DB34 Z MOS34 0579 DB1C v64 MOS34 0604 DB34 A0 1B LDYIM MSG2CR-&01 MOS34 0579 DB1C v64 MOS34 0605 DB36 20 55 DE JSR WRSTR MOS34 0579 DB1C v64 MOS34 0606 DB39 ; MOS34 0579 DB1C v64 MOS34 0607 DB39 ENTER ;initialise TAPE/DISC MOS34 0579 DB1C v64 MOS34 0608 DB39 ; MOS34 0579 DB1C v64 MOS34 0609 DB39 ; let user intercept BREAK after filing system initialisation MOS34 0579 DB1C v64 MOS34 0610 DB39 ; MOS34 0579 DB1C v64 MOS34 0611 DB39 38 SEC -- MOS34 0612 DB3A 20 43 EB JSR BREAK -- MOS34 0613 DB3D ; -- MOS34 0614 DB3D ; service ROMs again -- MOS34 0615 DB3D ; test for auto-boot condition (SHIFT and startup option bit3) -- MOS34 0616 DB3D ; -- MOS34 0617 DB3D 20 FC E9 JSR MOSTST ;test shift -- MOS34 0618 DB40 [ MOS125 = &FF -- MOS34 0621 DB40 | -- MOS34 0622 DB40 ;Slightly iffy using A directly as no other callers of MOSTST do -- MOS34 0623 DB40 ;however MOSTST always returns SHIFT state in both N and A b7 -- MOS34 0624 DB40 ] -- MOS34 0625 DB40 4A LSRA -- MOS34 0626 DB41 4A LSRA -- MOS34 0627 DB42 4A LSRA -- MOS34 0628 DB43 4A LSRA -- MOS34 0629 DB44 4D 8F 02 EOR OPTION -- MOS34 0630 DB47 29 08 ANDIM &08 ;use bit3 -- MOS34 0631 DB49 A8 TAY ;Y=0 => auto-boot, Y<>0 => do not auto-boot -- MOS34 0632 DB4A A2 03 LDXIM SVBOOT ;offer bootstrap -- MOS34 0633 DB4C 20 6C F1 JSR SVOP -- MOS34 0634 DB4F F0 30 BEQ SLANG ;[file system booted] MOS34 0634 DB4F v4F MOS34 0635 DB51 ; MOS34 0634 DB4F v4F MOS34 0636 DB51 ; file system not booted - try to auto-boot from SEROM MOS34 0634 DB4F v4F MOS34 0637 DB51 ; MOS34 0634 DB4F v4F MOS34 0638 DB51 98 TYA MOS34 0634 DB4F v4F MOS34 0639 DB52 D0 27 BNE NOAUTO ;[do not auto boot] MOS34 0634 DB4F v4F MOS34 0640 DB54 ; MOS34 0634 DB4F v4F MOS34 0641 DB54 ; auto-boot from SEROM MOS34 0634 DB4F v4F MOS34 0642 DB54 ; MOS34 0634 DB4F v4F MOS34 0643 DB54 A9 8D LDAIM FXSROM MOS34 0634 DB4F v4F MOS34 0644 DB56 20 47 F1 JSR CROM ;'*ROM' MOS34 0634 DB4F v4F MOS34 0645 DB59 A2 3C LDXIM SLBOOT MOS34 0634 DB4F v4F MOS34 0646 DB5B A0 EB LDYIM /(SLBOOT ) MOS34 0634 DB4F v4F MOS34 0647 DB5D CE 67 02 DEC QUIET ;flag as loading auto-boot program MOS34 0634 DB4F v4F MOS34 0648 DB60 20 F7 FF JSR OSCLI ;'/!BOOT' MOS34 0634 DB4F v4F MOS34 0649 DB63 EE 67 02 INC QUIET ;flag as not loading auto-boot program MOS34 0634 DB4F v4F MOS34 0650 DB66 ; if an error occurs whilst running the !BOOT program MOS34 0634 DB4F v4F MOS34 0651 DB66 ; then the MOS jumps to EBRK (early BRK) MOS34 0634 DB4F v4F MOS34 0652 DB66 D0 19 BNE DNRFS ;[ALWAYS jump, do not reset filing system] MOS34 0634 DB4F v4F MOS34 0653 DB68 ; MOS34 0634 DB4F v4F MOS34 0654 DB68 [ MOS125 = &FF MOS34 0634 DB4F v4F MOS34 0655 DB68 | MOS34 0634 DB4F v4F MOS34 0656 DB68 ;Restoring OS 1.20 behaviour: MOS34 0634 DB4F v4F MOS34 0657 DB68 ;*FX215,0 by early birds (or *FX215,255 by RFS !BOOT) MOS34 0634 DB4F v4F MOS34 0658 DB68 ;forces *TAPE12 on successful completion of RFS !BOOT MOS34 0634 DB4F v4F MOS34 0659 DB68 ;with no error message printed MOS34 0634 DB4F v4F MOS34 0660 DB68 F0 11 BEQ NOAUTO MOS34 0634 DB4F v4F MOS34 0661 DB6A ;NEVER fall through MOS34 0634 DB4F v4F MOS34 0662 DB6A MOS34 0634 DB4F v4F MOS34 0663 DB6A DEFBRK ;default BRK routine outputs error message MOS34 0634 DB4F v4F MOS34 0664 DB6A ; assume still decimal mode MOS34 0634 DB4F v4F MOS34 0665 DB6A A0 00 LDYIM ZERO MOS34 0634 DB4F v4F MOS34 0666 DB6C 20 5D DE JSR WRSTR1 ;output error message MOS34 0634 DB4F v4F MOS34 0667 DB6F ; check whether within auto-boot program MOS34 0634 DB4F v4F MOS34 0668 DB6F AD 67 02 LDA QUIET MOS34 0634 DB4F v4F MOS34 0669 DB72 6A RORA MOS34 0634 DB4F v4F MOS34 0670 DB73 STOP MOS34 0634 DB4F v4F MOS34 0671 DB73 B0 FE BCS STOP ;hang if not within auto-boot program MOS34 0634 DB4F v4F MOS34 0672 DB75 20 E7 FF JSR OSNEWL MOS34 0634 DB4F v4F MOS34 0673 DB78 20 E7 FF JSR OSNEWL ;place 2*CR/LF after error message MOS34 0634 DB4F v4F MOS34 0674 DB7B ;fall through MOS34 0634 DB4F v4F MOS34 0675 DB7B ] MOS34 0634 DB4F v4F MOS34 0676 DB7B MOS34 0634 DB4F v4F MOS34 0677 DB7B NOAUTO MOS34 0634 DB4F v4F MOS34 0678 DB7B EBRK ;unexpected (early) BRK (e.g. 'File not found') MOS34 0634 DB4F v4F MOS34 0679 DB7B ; MOS34 0634 DB4F v4F MOS34 0680 DB7B ; initialise cassette filing system (CFS) MOS34 0634 DB4F v4F MOS34 0681 DB7B ; MOS34 0634 DB4F v4F MOS34 0682 DB7B A9 00 LDAIM ZERO ;select CFS MOS34 0634 DB4F v4F MOS34 0683 DB7D AA TAX ;X:=0, select default baudrate (1200 baud) MOS34 0634 DB4F v4F MOS34 0684 DB7E 20 49 F1 JSR TAPE12 ;initialise CFS MOS34 0634 DB4F v4F MOS34 0685 DB81 ; MOS34 0634 DB4F v4F MOS34 0686 DB81 DNRFS ;do not reset filing system MOS34 0634 DB4F v4F MOS34 0687 DB81 ; MOS34 0634 DB4F v4F MOS34 0688 DB81 SLANG ;select a language ROM to enter MOS34 0634 DB4F v4F MOS34 0689 DB81 AD 8D 02 LDA TYPE -- MOS34 0690 DB84 D0 05 BNE SLANG1 ;[hard restart - use same language as last time] MOS34 0690 DB84 v7A MOS34 0691 DB86 ; MOS34 0690 DB84 v7A MOS34 0692 DB86 ; soft restart - ensure language exists MOS34 0690 DB84 v7A MOS34 0693 DB86 ; A b0=0 used by ILR2 enter ROM with C=0 MOS34 0690 DB84 v7A MOS34 0694 DB86 ; MOS34 0690 DB84 v7A MOS34 0695 DB86 AE 8C 02 LDX LROMID MOS34 0690 DB84 v7A MOS34 0696 DB89 10 1E BPL ILR2 ;[language does exist] MOS34 0696 DB89 v61 MOS34 0697 DB8B ; MOS34 0696 DB89 v61 MOS34 0698 DB8B SLANG1 ;find first language ROM MOS34 0696 DB89 v61 MOS34 0699 DB8B ; MOS34 MOS34 MOS34 MOS34 Acorn macro assembler Page 62 MOS34 Entry point after hardware break/reset MOS34 MOS34 0696 DB89 v61 MOS34 0700 DB8B A2 0F LDXIM NROM-&1 MOS34 0696 DB89 v61 MOS34 0701 DB8D ILR1 MOS34 0696 DB89 v61 MOS34 0702 DB8D BD A1 02 LDAAX ROMS MOS34 0696 DB89 v61 MOS34 0703 DB90 [ MOS125 = &FF MOS34 0696 DB89 v61 MOS34 0705 DB90 | MOS34 0696 DB89 v61 MOS34 0706 DB90 0A ASLA ;b0=0 used by ILR2 enter ROM with C=0 MOS34 0696 DB89 v61 MOS34 0707 DB91 ] MOS34 0696 DB89 v61 MOS34 0708 DB91 30 16 BMI ILR2 ;[found language ROM] MOS34 0696 DB89 v61 MOS34 0709 DB93 ; MOS34 0696 DB89 v61 MOS34 0710 DB93 CA DEX MOS34 0696 DB89 v61 MOS34 0711 DB94 10 F7 BPL ILR1 ;[continue search for language ROM] MOS34 0696 DB89 v61 MOS34 0712 DB96 ; MOS34 0696 DB89 v61 MOS34 0713 DB96 A9 00 LDAIM LGNONE MOS34 0696 DB89 v61 MOS34 0714 DB98 2C 7A 02 BIT TUBEM MOS34 0696 DB89 v61 MOS34 0715 DB9B 30 30 BMI TLANG ;[tube active] MOS34 0715 DB9B v4F MOS34 0716 DB9D ; neither language nor tube present MOS34 0715 DB9B v4F MOS34 0717 DB9D 00 BRK MOS34 0715 DB9B v4F MOS34 0718 DB9E F9 = NOLROM MOS34 0715 DB9B v4F MOS34 0719 DB9F 4C 61 6E = "Language?" MOS34 0715 DB9B v4F MOS34 0720 DBA8 00 = ZERO MOS34 0715 DB9B v4F MOS34 0721 DBA9 ; MOS34 0715 DB9B v4F MOS34 0722 DBA9 [ MOS125 = &FF MOS34 0715 DB9B v4F MOS34 0725 DBA9 | MOS34 0715 DB9B v4F MOS34 0726 DBA9 ILR2 ;*BASIC enters with A b0=1 indicate manual entry MOS34 0715 DB9B v4F MOS34 0727 DBA9 4A LSRA ;C=0 indicate to tube that this is a restart MOS34 0715 DB9B v4F MOS34 0728 DBAA ] MOS34 0715 DB9B v4F MOS34 0729 DBAA SELANG ;FX entry point, entered with C=1 (for tube) MOS34 0715 DB9B v4F MOS34 0730 DBAA ; found language ROM MOS34 0715 DB9B v4F MOS34 0731 DBAA ; select language ROM MOS34 0715 DB9B v4F MOS34 0732 DBAA 08 PHP ;save entry type (present in C) MOS34 0715 DB9B v4F MOS34 0733 DBAB [ MOS125 = &FF MOS34 0715 DB9B v4F MOS34 0735 DBAB ] MOS34 0715 DB9B v4F MOS34 0736 DBAB 20 DB DB JSR STXROM MOS34 0715 DB9B v4F MOS34 0737 DBAE ; output ROM message MOS34 0715 DB9B v4F MOS34 0738 DBAE A9 80 LDAIM /(LANG ) MOS34 0715 DB9B v4F MOS34 0739 DBB0 A0 08 LDYIM ROMMSG-&1 MOS34 0715 DB9B v4F MOS34 0740 DBB2 20 57 DE JSR WRSTRA MOS34 0715 DB9B v4F MOS34 0741 DBB5 ; N.B. Y offset left pointing to copyright message MOS34 0715 DB9B v4F MOS34 0742 DBB5 84 FD STY REPTR +&00 MOS34 0715 DB9B v4F MOS34 0743 DBB7 20 E7 FF JSR OSNEWL MOS34 0715 DB9B v4F MOS34 0744 DBBA 20 E7 FF JSR OSNEWL MOS34 0715 DB9B v4F MOS34 0745 DBBD ; MOS34 0715 DB9B v4F MOS34 0746 DBBD ; enter language MOS34 0715 DB9B v4F MOS34 0747 DBBD ; MOS34 0715 DB9B v4F MOS34 0748 DBBD 28 PLP ;restore entry type into C MOS34 0715 DB9B v4F MOS34 0749 DBBE [ MOS125 = &FF MOS34 0715 DB9B v4F MOS34 0750 DBBE | MOS34 0715 DB9B v4F MOS34 0751 DBBE ;preserve BRK handler until all printing done MOS34 0715 DB9B v4F MOS34 0752 DBBE A5 F4 LDA ROMID MOS34 0715 DB9B v4F MOS34 0753 DBC0 8D 8C 02 STA LROMID MOS34 0715 DB9B v4F MOS34 0754 DBC3 ] MOS34 0715 DB9B v4F MOS34 0755 DBC3 A9 01 LDAIM LGENTR ;entry reason MOS34 0715 DB9B v4F MOS34 0756 DBC5 2C 7A 02 BIT TUBEM MOS34 0715 DB9B v4F MOS34 0757 DBC8 30 03 BMI TLANG ;[tube active] MOS34 0715 DB9B v4F MOS34 0758 DBCA 4C 00 80 JMP ROMHRD ;ROM entry MOS34 0715 DB9B v4F MOS34 0759 DBCD TLANG MOS34 0715 DB9B v4F MOS34 0760 DBCD 4C 00 04 JMP TBLANG ;tube entry -- MOS34 0761 DBD0 -- MOS34 0762 DBD0 -- MOS34 0763 DBD0 LNK MOS36 -- MOS36 0001 DBD0 ; > MOS36 -- MOS36 0002 DBD0 TTL MOS36 Int servicing -- MOS36 0003 DBD0 OPT MOS36 MOS36 MOS36 MOS36 MOS36 Acorn macro assembler Page 63 MOS36 MOS36 Int servicing MOS36 -- MOS36 0004 DBD0 -- MOS36 0005 DBD0 ;(c) 1981 ACORN Computers Limited -- MOS36 0006 DBD0 ;BBC MOS -- MOS36 0007 DBD0 ;Change record: -- MOS36 0008 DBD0 -- MOS36 0009 DBD0 ;Author(s): -- MOS36 0010 DBD0 ;PB Paul Bond -- MOS36 0011 DBD0 -- MOS36 0012 DBD0 ; interrupt service mainline -- MOS36 0013 DBD0 ; priority sequence:- -- MOS36 0014 DBD0 ; [6850] -- MOS36 0015 DBD0 ; 1. RS423 -- MOS36 0016 DBD0 ; [6522a] -- MOS36 0017 DBD0 ; 2. VSYNC -- MOS36 0018 DBD0 ; 3. centisecond timer -- MOS36 0019 DBD0 ; 4. ADC -- MOS36 0020 DBD0 ; 5. keyboard -- MOS36 0021 DBD0 ; [6522b] -- MOS36 0022 DBD0 ; 6. printer (parallel interface) -- MOS36 0023 DBD0 -- MOS36 0024 DBD0 -- MOS36 0025 DBD0 RPROM ;read byte from paged ROM -- MOS36 0026 DBD0 ; read byte at ROMPTR in ROM Y into A -- MOS36 0027 DBD0 A6 F4 LDX ROMID -- MOS36 0028 DBD2 84 F4 STY ROMID -- MOS36 0029 DBD4 8C 30 FE STY ROM -- MOS36 0030 DBD7 A0 00 LDYIM ZERO -- MOS36 0031 DBD9 B1 F6 LDAIY ROMPTR -- MOS36 0032 DBDB STXROM -- MOS36 0033 DBDB 86 F4 STX ROMID -- MOS36 0034 DBDD 8E 30 FE STX ROM -- MOS36 0035 DBE0 60 RTS -- MOS36 0036 DBE1 -- MOS36 0037 DBE1 -- MOS36 0038 DBE1 -- MOS36 0039 DBE1 IRQ ;entered at IRQ or BRK -- MOS36 0040 DBE1 85 FC STA TEMPA -- MOS36 0041 DBE3 68 PLA -- MOS36 0042 DBE4 48 PHA ;A := processor status -- MOS36 0043 DBE5 29 10 ANDIM &10 -- MOS36 0044 DBE7 D0 03 BNE BRK MOS36 0044 DBE7 v7C MOS36 0045 DBE9 6C 04 02 JMI IRQALL ;indirect thru 'all IRQs' routine MOS36 0044 DBE7 v7C MOS36 0046 DBEC ; (defaults to DEFIRQ) MOS36 0044 DBE7 v7C MOS36 0047 DBEC ; MOS36 0044 DBE7 v7C MOS36 0048 DBEC BRK MOS36 0044 DBE7 v7C MOS36 0049 DBEC 8A TXA -- MOS36 0050 DBED 48 PHA ;save X -- MOS36 0051 DBEE BA TSX -- MOS36 0052 DBEF BD 03 01 LDAAX &0100+&03 ;get address low -- MOS36 0053 DBF2 D8 CLD -- MOS36 0054 DBF3 38 SEC -- MOS36 0055 DBF4 E9 01 SBCIM &01 -- MOS36 0056 DBF6 85 FD STA REPTR +&00 -- MOS36 0057 DBF8 BD 04 01 LDAAX &0100+&04 ;get address high -- MOS36 0058 DBFB E9 00 SBCIM ZERO -- MOS36 0059 DBFD 85 FE STA REPTR +&01 -- MOS36 0060 DBFF ; record ROM source of BRK -- MOS36 0061 DBFF A5 F4 LDA ROMID -- MOS36 0062 DC01 8D 4A 02 STA REPROM -- MOS36 0063 DC04 ; offer BRK to service ROMs -- MOS36 0064 DC04 86 F0 STX BYTEX ;provide clean way for service ROM to access relevant stack area -- MOS36 0065 DC06 A2 06 LDXIM SVBRK -- MOS36 0066 DC08 20 6C F1 JSR SVOP -- MOS36 0067 DC0B ; force language ROM (may be BASIC in pre-interface days) -- MOS36 0068 DC0B AE 8C 02 LDX LROMID -- MOS36 0069 DC0E 20 DB DB JSR STXROM ;reset to language ROM -- MOS36 0070 DC11 ; -- MOS36 0071 DC11 ; restore X -- MOS36 0072 DC11 ; -- MOS36 0073 DC11 68 PLA -- MOS36 0074 DC12 AA TAX -- MOS36 0075 DC13 ; -- MOS36 0076 DC13 ; restore A -- MOS36 0077 DC13 ; -- MOS36 0078 DC13 A5 FC LDA TEMPA -- MOS36 0079 DC15 ; -- MOS36 0080 DC15 ; enable interrupts and let user process BRK -- MOS36 0081 DC15 ; -- MOS36 0082 DC15 58 CLI -- MOS36 0083 DC16 6C 02 02 JMI BRKVEC ;process BRK, N.B. default is DEFBRK -- MOS36 0084 DC19 ; -- MOS36 0085 DC19 [ MOS125 = &FF -- MOS36 0098 DC19 ] -- MOS36 0099 DC19 -- MOS36 0100 DC19 -- MOS36 0101 DC19 TTL IRQ processing -- MOS36 0102 DC19 OPT OPNEWP MOS36 MOS36 MOS36 MOS36 Acorn macro assembler Page 64 MOS36 IRQ processing MOS36 -- MOS36 0103 DC19 -- MOS36 0104 DC19 -- MOS36 0105 DC19 TXDINT ;disable Tx interrupt -- MOS36 0106 DC19 ; -- MOS36 0107 DC19 ; RS423 printer selected but printer buffer empty -- MOS36 0108 DC19 ; -- MOS36 0109 DC19 38 SEC MOS36 0267 DC77 ^20 MOS36 0110 DC1A 6E 4F 02 ROR RSFLAG ;flag RS423 available MOS36 0267 DC77 ^20 MOS36 0111 DC1D ; MOS36 0267 DC77 ^20 MOS36 0112 DC1D ; no more characters to print MOS36 0267 DC77 ^20 MOS36 0113 DC1D ; MOS36 0267 DC77 ^20 MOS36 0114 DC1D ; disable RS423 Tx MOS36 0267 DC77 ^20 MOS36 0115 DC1D ; find whether to set RTS hi or lo MOS36 0267 DC77 ^20 MOS36 0116 DC1D ; MOS36 0267 DC77 ^20 MOS36 0117 DC1D ; check whether RS423 Rx enabled MOS36 0267 DC77 ^20 MOS36 0118 DC1D ; MOS36 0267 DC77 ^20 MOS36 0119 DC1D 2C 50 02 BIT RSCTFL MOS36 0267 DC77 ^20 MOS36 0120 DC20 10 07 BPL RLO ;[Rx disabled] MOS36 0267 DC77 ^20 MOS36 0121 DC22 ; MOS36 0267 DC77 ^20 MOS36 0122 DC22 ; Rx enabled MOS36 0267 DC77 ^20 MOS36 0123 DC22 ; MOS36 0267 DC77 ^20 MOS36 0124 DC22 ; check bytes in RS423 input buffer MOS36 0267 DC77 ^20 MOS36 0125 DC22 ; MOS36 0267 DC77 ^20 MOS36 0126 DC22 20 A1 E7 JSR CNTRS MOS36 0267 DC77 ^20 MOS36 0127 DC25 ; MOS36 0267 DC77 ^20 MOS36 0128 DC25 ; C=0 => overflow, C=1 => no overflow MOS36 0267 DC77 ^20 MOS36 0129 DC25 ; check whether within overflow region MOS36 0267 DC77 ^20 MOS36 0130 DC25 ; MOS36 0267 DC77 ^20 MOS36 0131 DC25 A2 00 LDXIM RHITXD MOS36 0267 DC77 ^20 MOS36 0132 DC27 B0 02 BCS RSOK ;[not overflowing] MOS36 0267 DC77 ^20 MOS36 0133 DC29 ; MOS36 0267 DC77 ^20 MOS36 0134 DC29 ; within overflow region MOS36 0267 DC77 ^20 MOS36 0135 DC29 ; MOS36 0267 DC77 ^20 MOS36 0136 DC29 RLO ;set RTS lo, Tx interrupt disabled (unfortunately) MOS36 0267 DC77 ^20 MOS36 0137 DC29 A2 40 LDXIM RLOTXD MOS36 0267 DC77 ^20 MOS36 0138 DC2B ; MOS36 0267 DC77 ^20 MOS36 0139 DC2B RSOK ;set RTS hi/lo, Tx interrupt disabled MOS36 0267 DC77 ^20 MOS36 0140 DC2B 4C 0D E2 JMP RSED ;disable Tx interrupts AND return from interrupt MOS36 0267 DC77 ^20 MOS36 0141 DC2E MOS36 0267 DC77 ^20 MOS36 0142 DC2E MOS36 0267 DC77 ^20 MOS36 0143 DC2E RX68 ;RS423 Rx interrupt MOS36 0267 DC77 ^20 MOS36 0144 DC2E ; MOS36 0267 DC77 ^20 MOS36 0145 DC2E ; A = 0|0|PE|OVRN|FE|CTS|DCD|TDRE MOS36 0267 DC77 ^20 MOS36 0146 DC2E ; MOS36 0267 DC77 ^20 MOS36 0147 DC2E AC 09 FE LDY RSDATA ;read data byte to clear interrupt MOS36 0267 DC77 ^20 MOS36 0148 DC31 29 3A ANDIM &3A ;CTS & TDRE are not relevant to Rx MOS36 0267 DC77 ^20 MOS36 0149 DC33 D0 26 BNE RX68BD ;[bad Rx, PE|OVRN|FE|DCD] MOS36 0267 DC77 ^20 MOS36 0150 DC35 ; MOS36 0267 DC77 ^20 MOS36 0151 DC35 ; good reception - move byte into RS423 input buffer MOS36 0267 DC77 ^20 MOS36 0152 DC35 ; MOS36 0267 DC77 ^20 MOS36 0153 DC35 AE 5C 02 LDX RSSHUT MOS36 0267 DC77 ^20 MOS36 0154 DC38 D0 09 BNE NRSI ;[suppress RS423 input] MOS36 0267 DC77 ^20 MOS36 0155 DC3A ; MOS36 0267 DC77 ^20 MOS36 0156 DC3A ; X=0 MOS36 0267 DC77 ^20 MOS36 0157 DC3A ; MOS36 0267 DC77 ^20 MOS36 0158 DC3A E8 INX ;X = BRSI = $01 MOS36 0267 DC77 ^20 MOS36 0159 DC3B 20 54 E5 JSR RNSRT ;insert character into RS423 buffer MOS36 0267 DC77 ^20 MOS36 0160 DC3E ; MOS36 0267 DC77 ^20 MOS36 0161 DC3E ; check number of characters in buffer MOS36 0267 DC77 ^20 MOS36 0162 DC3E ; MOS36 0267 DC77 ^20 MOS36 0163 DC3E 20 A1 E7 JSR CNTRS MOS36 0267 DC77 ^20 MOS36 0164 DC41 ; MOS36 0267 DC77 ^20 MOS36 0165 DC41 ; check whether running into overflow area MOS36 0267 DC77 ^20 MOS36 0166 DC41 ; MOS36 0267 DC77 ^20 MOS36 0167 DC41 90 E6 BCC RLO ;[running into overflow area, set RTS lo, Tx interrupt disabled] MOS36 0267 DC77 ^20 MOS36 0168 DC43 NRSI ;suppress RS423 input MOS36 0267 DC77 ^20 MOS36 0169 DC43 60 RTS MOS36 0267 DC77 ^20 MOS36 0170 DC44 MOS36 0267 DC77 ^20 MOS36 0171 DC44 MOS36 0267 DC77 ^20 MOS36 0172 DC44 [ MOS125 = &FF MOS36 0267 DC77 ^20 MOS36 0188 DC44 | MOS36 0267 DC77 ^20 MOS36 0189 DC44 VAT MOS36 0267 DC77 ^20 MOS36 0190 DC44 ] MOS36 0267 DC77 ^20 MOS36 0191 DC44 ; MOS36 0267 DC77 ^20 MOS36 0192 DC44 ; indicate in DEFIRQ MOS36 0267 DC77 ^20 MOS36 0193 DC44 ; MOS36 0267 DC77 ^20 MOS36 0194 DC44 B8 CLV MOS36 0267 DC77 ^20 MOS36 0195 DC45 ; MOS36 0267 DC77 ^20 MOS36 0196 DC45 IRQ68 ;check for interrupt from 6850 MOS36 0267 DC77 ^20 MOS36 0197 DC45 ; MOS36 0267 DC77 ^20 MOS36 0198 DC45 [ $Tutu MOS36 0267 DC77 ^20 MOS36 0201 DC45 | MOS36 0267 DC77 ^20 MOS36 0202 DC45 AD 08 FE LDA RSTAT MOS36 0267 DC77 ^20 MOS36 0203 DC48 ] MOS36 0267 DC77 ^20 MOS36 0204 DC48 70 02 BVS RSTIME ;[timer interrupt] MOS36 0267 DC77 ^20 MOS36 0205 DC4A ; MOS36 0267 DC77 ^20 MOS36 0206 DC4A 10 5D BPL IRQA ;[not a 6850 interrupt, N.B. possibly timer interrupt entry] MOS36 0267 DC77 ^20 MOS36 0207 DC4C ; MOS36 0267 DC77 ^20 MOS36 0208 DC4C RSTIME ;timer interrupt MOS36 0267 DC77 ^20 MOS36 0209 DC4C ; MOS36 0267 DC77 ^20 MOS36 0210 DC4C ; 6850 interrupt MOS36 0267 DC77 ^20 MOS36 0211 DC4C ; MOS36 0267 DC77 ^20 MOS36 0212 DC4C ; use RSTUT to decide where to route the interrupt MOS36 0267 DC77 ^20 MOS36 0213 DC4C ; MOS36 0267 DC77 ^20 MOS36 0214 DC4C A6 EA LDX RSTUT MOS36 0267 DC77 ^20 MOS36 0215 DC4E CA DEX MOS36 0267 DC77 ^20 MOS36 0216 DC4F 30 30 BMI NOTCFS ;[RS423 not managed by CFS] MOS36 0267 DC77 ^20 MOS36 0217 DC51 ; MOS36 0267 DC77 ^20 MOS36 0218 DC51 ; inform CFS of the interrupt MOS36 0267 DC77 ^20 MOS36 0219 DC51 ; MOS36 0267 DC77 ^20 MOS36 0220 DC51 70 2D BVS RTS68 ;[ignore timer interrupt entry] MOS36 0267 DC77 ^20 MOS36 0221 DC53 4C BE F5 JMP IRUPT ;let CFS handle interrupt AND return from interrupt MOS36 0267 DC77 ^20 MOS36 0222 DC56 MOS36 0267 DC77 ^20 MOS36 0223 DC56 MOS36 0267 DC77 ^20 MOS36 0224 DC56 MDCD ;neither Rx not Tx interrupt => DCD interrupt MOS36 0267 DC77 ^20 MOS36 0225 DC56 ; MOS36 0267 DC77 ^20 MOS36 0226 DC56 AC 09 FE LDY RSDATA ;clear DCD interrupt MOS36 0267 DC77 ^20 MOS36 0227 DC59 2A ROLA ;DCD -> lo-bit MOS36 0267 DC77 ^20 MOS36 0228 DC5A 0A ASLA ;restore status byte MOS36 0267 DC77 ^20 MOS36 0229 DC5B ; MOS36 0267 DC77 ^20 MOS36 0230 DC5B RX68BD ;bad RS423 Rx MOS36 0267 DC77 ^20 MOS36 0231 DC5B ; MOS36 0267 DC77 ^20 MOS36 0232 DC5B ; A = 0|0|PE|OVRN|FE|0|DCD|0 MOS36 0267 DC77 ^20 MOS36 0233 DC5B ; C=1 MOS36 0267 DC77 ^20 MOS36 0234 DC5B ; MOS36 0267 DC77 ^20 MOS36 0235 DC5B ; signal RS423 error MOS36 0267 DC77 ^20 MOS36 0236 DC5B ; MOS36 0267 DC77 ^20 MOS36 0237 DC5B AA TAX ;X := status MOS36 0267 DC77 ^20 MOS36 0238 DC5C 98 TYA ;A := character MOS36 0267 DC77 ^20 MOS36 0239 DC5D A0 07 LDYIM EVRS ;RS423 error event MOS36 0267 DC77 ^20 MOS36 0240 DC5F 4C F6 E4 JMP EVENT ;signal event AND return from interrupt MOS36 MOS36 MOS36 MOS36 Acorn macro assembler Page 65 MOS36 IRQ processing MOS36 MOS36 0267 DC77 ^20 MOS36 0241 DC62 MOS36 0267 DC77 ^20 MOS36 0242 DC62 MOS36 0267 DC77 ^20 MOS36 0243 DC62 TDRE ;Tx interrupt MOS36 0267 DC77 ^20 MOS36 0244 DC62 ; MOS36 0267 DC77 ^20 MOS36 0245 DC62 ; RS423 is not claimed by CFS, so we are either MOS36 0267 DC77 ^20 MOS36 0246 DC62 ; writing or printing to RS423 MOS36 0267 DC77 ^20 MOS36 0247 DC62 ; MOS36 0267 DC77 ^20 MOS36 0248 DC62 ; extract character from RS423 Tx buffer MOS36 0267 DC77 ^20 MOS36 0249 DC62 ; MOS36 0267 DC77 ^20 MOS36 0250 DC62 A2 02 LDXIM BRSO MOS36 0267 DC77 ^20 MOS36 0251 DC64 20 C2 E4 JSR REMOV MOS36 0267 DC77 ^20 MOS36 0252 DC67 90 10 BCC TXCH ;[character to transmit] MOS36 0267 DC77 ^20 MOS36 0253 DC69 ; X=BRSO MOS36 0267 DC77 ^20 MOS36 0254 DC69 ; MOS36 0267 DC77 ^20 MOS36 0255 DC69 ; check for print to RS423 MOS36 0267 DC77 ^20 MOS36 0256 DC69 ; MOS36 0267 DC77 ^20 MOS36 0257 DC69 AD 85 02 LDA PRNTSW MOS36 0267 DC77 ^20 MOS36 0258 DC6C C9 02 CMPIM PRS MOS36 0267 DC77 ^20 MOS36 0259 DC6E D0 A9 BNE TXDINT ;[RS423 printer not selected] MOS36 0267 DC77 ^20 MOS36 0260 DC70 ; X=BRSO MOS36 0267 DC77 ^20 MOS36 0261 DC70 ; MOS36 0267 DC77 ^20 MOS36 0262 DC70 ; remove possible character from print buffer MOS36 0267 DC77 ^20 MOS36 0263 DC70 ; MOS36 0267 DC77 ^20 MOS36 0264 DC70 E8 INX ;X = BRSO+1 = BPRNT MOS36 0267 DC77 ^20 MOS36 0265 DC71 20 C2 E4 JSR REMOV ;remove character from printer buffer MOS36 0267 DC77 ^20 MOS36 0266 DC74 6E D2 02 ROR PFLAG ;update printer flag MOS36 0267 DC77 ^20 MOS36 0267 DC77 30 A0 BMI TXDINT ;[no character to print] MOS36 0292 DC8C ^20 MOS36 0268 DC79 ; MOS36 0292 DC8C ^20 MOS36 0269 DC79 TXCH ;transmit character in A MOS36 0292 DC8C ^20 MOS36 0270 DC79 ; MOS36 0292 DC8C ^20 MOS36 0271 DC79 8D 09 FE STA RSDATA ;transmit character MOS36 0292 DC8C ^20 MOS36 0272 DC7C ; MOS36 0292 DC8C ^20 MOS36 0273 DC7C ; set RS423 printer timeout active MOS36 0292 DC8C ^20 MOS36 0274 DC7C ; MOS36 0292 DC8C ^20 MOS36 0275 DC7C A9 E7 LDAIM PTIMUT MOS36 0292 DC8C ^20 MOS36 0276 DC7E 85 EA STA RSTUT MOS36 0292 DC8C ^20 MOS36 0277 DC80 ; MOS36 0292 DC8C ^20 MOS36 0278 DC80 MOS36 0292 DC8C ^20 MOS36 0279 DC80 RTS68 MOS36 0292 DC8C ^20 MOS36 0280 DC80 UNK0 MOS36 0292 DC8C ^20 MOS36 0281 DC80 60 RTS ;return from interrupt MOS36 0292 DC8C ^20 MOS36 0282 DC81 MOS36 0292 DC8C ^20 MOS36 0283 DC81 MOS36 0292 DC8C ^20 MOS36 0284 DC81 NOTCFS ;RS423 not managed by CFS MOS36 0292 DC8C ^20 MOS36 0285 DC81 ; MOS36 0292 DC8C ^20 MOS36 0286 DC81 2D 78 02 AND C6850 ;suppress bits according to user tastes MOS36 0292 DC8C ^20 MOS36 0287 DC84 4A LSRA ;C=Rx MOS36 0292 DC8C ^20 MOS36 0288 DC85 90 07 BCC NOTRX ;[not Rx int] MOS36 0292 DC8C ^20 MOS36 0289 DC87 70 05 BVS NOTRX ;[do not allow Rx by polling] MOS36 0292 DC8C ^20 MOS36 0290 DC89 ; MOS36 0292 DC8C ^20 MOS36 0291 DC89 AC 50 02 LDY RSCTFL MOS36 0292 DC8C ^20 MOS36 0292 DC8C 30 A0 BMI RX68 ;[recieve interrupts enabled] MOS36 0206 DC4A v22 MOS36 0293 DC8E ; MOS36 0206 DC4A v22 MOS36 0294 DC8E NOTRX MOS36 0206 DC4A v22 MOS36 0295 DC8E 4A LSRA ;C=Tx, N=Rx MOS36 0206 DC4A v22 MOS36 0296 DC8F 6A RORA ;C=DCD, N=Tx MOS36 0206 DC4A v22 MOS36 0297 DC90 B0 C4 BCS MDCD ;[DCD interrupt] MOS36 0206 DC4A v22 MOS36 0298 DC92 ; MOS36 0206 DC4A v22 MOS36 0299 DC92 30 CE BMI TDRE ;[TDRE] MOS36 0206 DC4A v22 MOS36 0300 DC94 ; MOS36 0206 DC4A v22 MOS36 0301 DC94 70 EA BVS RTS68 ;[timer interrupt entry] MOS36 0206 DC4A v22 MOS36 0302 DC96 ; MOS36 0206 DC4A v22 MOS36 0303 DC96 ; not timer interrupt entry MOS36 0206 DC4A v22 MOS36 0304 DC96 ; MOS36 0206 DC4A v22 MOS36 0305 DC96 UNKIRQ ;unknown interrupt MOS36 0206 DC4A v22 MOS36 0306 DC96 ; MOS36 0206 DC4A v22 MOS36 0307 DC96 A2 05 LDXIM SVINT MOS36 0415 DCFB ^19 MOS36 0308 DC98 20 6C F1 JSR SVOP ;allow FS ROMs to process interrupt MOS36 0415 DCFB ^19 MOS36 0309 DC9B F0 E3 BEQ UNK0 ;[service ROM dealt with interrupt] MOS36 0415 DCFB ^19 MOS36 0310 DC9D ; MOS36 0415 DCFB ^19 MOS36 0311 DC9D ; pull return address MOS36 0415 DCFB ^19 MOS36 0312 DC9D ; MOS36 0415 DCFB ^19 MOS36 0313 DC9D 68 PLA MOS36 0415 DCFB ^19 MOS36 0314 DC9E 68 PLA MOS36 0415 DCFB ^19 MOS36 0315 DC9F ; MOS36 0415 DCFB ^19 MOS36 0316 DC9F ; restore X and Y for user interrupt routine MOS36 0415 DCFB ^19 MOS36 0317 DC9F ; MOS36 0415 DCFB ^19 MOS36 0318 DC9F 68 PLA MOS36 0415 DCFB ^19 MOS36 0319 DCA0 A8 TAY MOS36 0415 DCFB ^19 MOS36 0320 DCA1 68 PLA MOS36 0415 DCFB ^19 MOS36 0321 DCA2 AA TAX MOS36 0415 DCFB ^19 MOS36 0322 DCA3 68 PLA MOS36 0415 DCFB ^19 MOS36 0323 DCA4 85 FC STA TEMPA MOS36 0415 DCFB ^19 MOS36 0324 DCA6 6C 06 02 JMI IRQVEC ;assume that user will clear the interrupt MOS36 0415 DCFB ^19 MOS36 0325 DCA9 ; (defaults to IRQTWO) MOS36 0415 DCFB ^19 MOS36 0326 DCA9 MOS36 0415 DCFB ^19 MOS36 0327 DCA9 MOS36 0415 DCFB ^19 MOS36 0328 DCA9 MOS36 0415 DCFB ^19 MOS36 0329 DCA9 IRQA ;check for interrupt from primary 6522 MOS36 0415 DCFB ^19 MOS36 0330 DCA9 ; MOS36 0415 DCFB ^19 MOS36 0331 DCA9 AD 4D FE LDA IFRQ ;A = IFR [IRQ,TIMER1,TIMER2,CB1,CB2,SHIFTREG,CA1,CA2] MOS36 0415 DCFB ^19 MOS36 0332 DCAC 10 3A BPL IRQB ;[not a VIAA interrupt] MOS36 0415 DCFB ^19 MOS36 0333 DCAE ; MOS36 0415 DCFB ^19 MOS36 0334 DCAE ; MOS36 0415 DCFB ^19 MOS36 0335 DCAE 2D 79 02 AND A6522 ;suppress bits according to user tastes MOS36 0415 DCFB ^19 MOS36 0336 DCB1 2D 4E FE AND IERQ ;N.B. only look at enabled interrupts MOS36 0415 DCFB ^19 MOS36 0337 DCB4 ; MOS36 0415 DCFB ^19 MOS36 0338 DCB4 ; MOS36 0415 DCFB ^19 MOS36 0339 DCB4 6A RORA ;A = IFR >> 1 MOS36 0415 DCFB ^19 MOS36 0340 DCB5 6A RORA ;A = IFR >> 2, C = CA1, N = CA2 MOS36 0415 DCFB ^19 MOS36 0341 DCB6 90 52 BCC ITIME2 ;[not VSYNC interrupt] MOS36 0415 DCFB ^19 MOS36 0342 DCB8 ; MOS36 0415 DCFB ^19 MOS36 0343 DCB8 ; VSYNC interrupt MOS36 0415 DCFB ^19 MOS36 0344 DCB8 ; N.B. C=1 MOS36 0415 DCFB ^19 MOS36 0345 DCB8 ; MOS36 0415 DCFB ^19 MOS36 0346 DCB8 CE 40 02 DEC CYCLE ;update CFS timeout byte MOS36 0415 DCFB ^19 MOS36 0347 DCBB A5 EA LDA RSTUT ;decrement RS423 printer timeout MOS36 0415 DCFB ^19 MOS36 0348 DCBD 10 02 BPL NPRST MOS36 0415 DCFB ^19 MOS36 0349 DCBF E6 EA INC RSTUT MOS36 0415 DCFB ^19 MOS36 0350 DCC1 ; MOS36 0415 DCFB ^19 MOS36 0351 DCC1 NPRST ;no RS423 printer timeout MOS36 0415 DCFB ^19 MOS36 0352 DCC1 ; MOS36 0415 DCFB ^19 MOS36 0353 DCC1 AD 51 02 LDA FLCNT MOS36 0415 DCFB ^19 MOS36 0354 DCC4 F0 18 BEQ IVS1 ;[flash disabled] MOS36 0415 DCFB ^19 MOS36 0355 DCC6 CE 51 02 DEC FLCNT MOS36 0415 DCFB ^19 MOS36 0356 DCC9 D0 13 BNE IVS1 ;[flash count not exhausted] MOS36 0415 DCFB ^19 MOS36 0357 DCCB ; MOS36 0415 DCFB ^19 MOS36 0358 DCCB ; flash count exhausted MOS36 0415 DCFB ^19 MOS36 0359 DCCB ; reset FLCNT MOS36 0415 DCFB ^19 MOS36 0360 DCCB ; MOS36 0415 DCFB ^19 MOS36 0361 DCCB [ MOS125 = &FF MOS36 MOS36 MOS36 MOS36 Acorn macro assembler Page 66 MOS36 IRQ processing MOS36 MOS36 0415 DCFB ^19 MOS36 0372 DCCB | MOS36 0415 DCFB ^19 MOS36 0373 DCCB ; A=1 MOS36 0415 DCFB ^19 MOS36 0374 DCCB AE 52 02 LDX FLSPC MOS36 0415 DCFB ^19 MOS36 0375 DCCE 4D 48 02 EOR VPREGA ;invert flash bit MOS36 0415 DCFB ^19 MOS36 0376 DCD1 4A LSRA ;C = new flash bit MOS36 0415 DCFB ^19 MOS36 0377 DCD2 B0 03 BCS FLASH1 ;[old flash bit = 0] MOS36 0415 DCFB ^19 MOS36 0378 DCD4 ; old flash bit = 1 MOS36 0415 DCFB ^19 MOS36 0379 DCD4 AE 53 02 LDX FLMRK MOS36 0415 DCFB ^19 MOS36 0380 DCD7 FLASH1 MOS36 0415 DCFB ^19 MOS36 0381 DCD7 ; MOS36 0415 DCFB ^19 MOS36 0382 DCD7 2A ROLA ;A = VPREGA MOS36 0415 DCFB ^19 MOS36 0383 DCD8 ] MOS36 0415 DCFB ^19 MOS36 0384 DCD8 20 23 EA JSR MVPRC0 ;update video processor and register image MOS36 0415 DCFB ^19 MOS36 0385 DCDB 8E 51 02 STX FLCNT ;update flash count MOS36 0415 DCFB ^19 MOS36 0386 DCDE ; MOS36 0415 DCFB ^19 MOS36 0387 DCDE IVS1 MOS36 0415 DCFB ^19 MOS36 0388 DCDE A0 04 LDYIM EVVSYN MOS36 0415 DCFB ^19 MOS36 0389 DCE0 20 F6 E4 JSR EVENT MOS36 0415 DCFB ^19 MOS36 0390 DCE3 ; MOS36 0415 DCFB ^19 MOS36 0391 DCE3 A9 02 LDAIM VSYNC MOS36 0415 DCFB ^19 MOS36 0392 DCE5 4C 0F DE JMP IVIAA0 ;clear interrupt and return MOS36 0415 DCFB ^19 MOS36 0393 DCE8 MOS36 0415 DCFB ^19 MOS36 0394 DCE8 MOS36 0415 DCFB ^19 MOS36 0395 DCE8 MOS36 0415 DCFB ^19 MOS36 0396 DCE8 IRQB ;check for interrupt from secondary 6522 MOS36 0415 DCFB ^19 MOS36 0397 DCE8 ; MOS36 0415 DCFB ^19 MOS36 0398 DCE8 AD 6D FE LDA IFRR ;A = IFR, C = ?, N = IRQ MOS36 0415 DCFB ^19 MOS36 0399 DCEB 10 A9 BPL UNKIRQ ;[not a VIAB interrupt] MOS36 0415 DCFB ^19 MOS36 0400 DCED ; MOS36 0415 DCFB ^19 MOS36 0401 DCED ; MOS36 0415 DCFB ^19 MOS36 0402 DCED 2D 77 02 AND B6522 ;suppress bits if secondary 6522 not present MOS36 0415 DCFB ^19 MOS36 0403 DCF0 2D 6E FE AND IERR ;only look at enabled interrupts MOS36 0415 DCFB ^19 MOS36 0404 DCF3 6A RORA ;A = IFR >> 1 MOS36 0415 DCFB ^19 MOS36 0405 DCF4 6A RORA ;A = IFR >> 2, C = CA1 MOS36 0415 DCFB ^19 MOS36 0406 DCF5 90 9F BCC UNKIRQ ;[not a printer interrupt] MOS36 0415 DCFB ^19 MOS36 0407 DCF7 ; MOS36 0415 DCFB ^19 MOS36 0408 DCF7 IPRNT ;printer interrupt MOS36 0415 DCFB ^19 MOS36 0409 DCF7 ; MOS36 0415 DCFB ^19 MOS36 0410 DCF7 ; acknowledge interrupt MOS36 0415 DCFB ^19 MOS36 0411 DCF7 ; N.B. clear before sending next character since printer MOS36 0415 DCFB ^19 MOS36 0412 DCF7 ; may acknowledge quickly and we could miss the interrupt MOS36 0415 DCFB ^19 MOS36 0413 DCF7 AC 85 02 LDY PRNTSW MOS36 0415 DCFB ^19 MOS36 0414 DCFA 88 DEY ;******** ASSUMES PCEN = 1 ******** MOS36 0415 DCFB ^19 MOS36 0415 DCFB D0 99 BNE UNKIRQ ;[ignore printer interrupt cos centronics not selected] MOS36 0341 DCB6 v2D MOS36 0416 DCFD ; MOS36 0341 DCB6 v2D MOS36 0417 DCFD A9 02 LDAIM PRNT MOS36 0341 DCB6 v2D MOS36 0418 DCFF 8D 6D FE STA IFRR ;acknowledge interrupt MOS36 0341 DCB6 v2D MOS36 0419 DD02 8D 6E FE STA IERR ;disable printer interrupt MOS36 0341 DCB6 v2D MOS36 0420 DD05 ; (will be enabled again by STROBE if another character is sent MOS36 0341 DCB6 v2D MOS36 0421 DD05 ; using the parallel port) MOS36 0341 DCB6 v2D MOS36 0422 DD05 ; MOS36 0341 DCB6 v2D MOS36 0423 DD05 A2 03 LDXIM BPRNT ;X := print bufferid MOS36 0341 DCB6 v2D MOS36 0424 DD07 4C CF E1 JMP STROBE ;if character read then print it AND return from interrupt MOS36 0341 DCB6 v2D MOS36 0425 DD0A MOS36 0341 DCB6 v2D MOS36 0426 DD0A MOS36 0341 DCB6 v2D MOS36 0427 DD0A ITIME2 ;check for TIMER2 interrupt MOS36 0341 DCB6 v2D MOS36 0428 DD0A ; MOS36 0341 DCB6 v2D MOS36 0429 DD0A 2A ROLA ;A = IFR >> 1 -- MOS36 0430 DD0B 2A ROLA ;A = IFR -- MOS36 0431 DD0C 2A ROLA ;:A = IFR << 1, N = TIMER1 -- MOS36 0432 DD0D 2A ROLA ;A = IFR << 2, N = TIMER2, C = TIMER1 -- MOS36 0433 DD0E 10 5B BPL ITIME1 ;[not TIMER2, check for TIMER1 interrupt] MOS36 0433 DD0E v24 MOS36 0434 DD10 [ NOSP = &00 MOS36 0433 DD0E v24 MOS36 0437 DD10 | MOS36 0433 DD0E v24 MOS36 0438 DD10 ; MOS36 0433 DD0E v24 MOS36 0439 DD10 ; timer 2 interrupt MOS36 0433 DD0E v24 MOS36 0440 DD10 ; acknowledge interrupt MOS36 0433 DD0E v24 MOS36 0441 DD10 ; MOS36 0433 DD0E v24 MOS36 0442 DD10 ; and MOS36 0433 DD0E v24 MOS36 0443 DD10 ; MOS36 0433 DD0E v24 MOS36 0444 DD10 ; set speech RDY to interrupt again MOS36 0433 DD0E v24 MOS36 0445 DD10 ; MOS36 0433 DD0E v24 MOS36 0446 DD10 A9 20 LDAIM TIMER2 MOS36 0433 DD0E v24 MOS36 0447 DD12 A2 00 LDXIM ZERO MOS36 0433 DD0E v24 MOS36 0448 DD14 ; N.B. minimise time between next two instructions MOS36 0433 DD0E v24 MOS36 0449 DD14 8D 4D FE STA IFRQ ;clear interrupt MOS36 0433 DD0E v24 MOS36 0450 DD17 8E 49 FE STX TRCHQ ;set to interrupt on speech chip INT MOS36 0433 DD0E v24 MOS36 0451 DD1A ; MOS36 0433 DD0E v24 MOS36 0452 DD1A ; process speech request MOS36 0433 DD0E v24 MOS36 0453 DD1A ; MOS36 0433 DD0E v24 MOS36 0454 DD1A PRSPRQ ;process speech request MOS36 0433 DD0E v24 MOS36 0455 DD1A ; MOS36 0433 DD0E v24 MOS36 0456 DD1A ; set speak external repeat counter to 4 MOS36 0433 DD0E v24 MOS36 0457 DD1A ; MOS36 0433 DD0E v24 MOS36 0458 DD1A A2 08 LDXIM BSPCH MOS36 0433 DD0E v24 MOS36 0459 DD1C 86 FB STX SPWK2 ;**** ASSUMES BSPCH=8 **** MOS36 0433 DD0E v24 MOS36 0460 DD1E ; MOS36 0433 DD0E v24 MOS36 0461 DD1E SPEREP ;repeat poke of speak external data MOS36 0433 DD0E v24 MOS36 0462 DD1E ; MOS36 0433 DD0E v24 MOS36 0463 DD1E ; inspect speech buffer MOS36 0433 DD0E v24 MOS36 0464 DD1E ; MOS36 0433 DD0E v24 MOS36 0465 DD1E 20 BD E4 JSR EXAM MOS36 0433 DD0E v24 MOS36 0466 DD21 ; MOS36 0433 DD0E v24 MOS36 0467 DD21 ; record buffer status - MI => dormant, PL => busy MOS36 0433 DD0E v24 MOS36 0468 DD21 ; MOS36 0433 DD0E v24 MOS36 0469 DD21 6E D7 02 ROR SPSTAT MOS36 0433 DD0E v24 MOS36 0470 DD24 30 44 BMI NSPECH ;[buffer empty] MOS36 0433 DD0E v24 MOS36 0471 DD26 ; MOS36 0433 DD0E v24 MOS36 0472 DD26 A8 TAY MOS36 0433 DD0E v24 MOS36 0473 DD27 F0 05 BEQ SPOK ;[speak external data] MOS36 0433 DD0E v24 MOS36 0474 DD29 ; MOS36 0433 DD0E v24 MOS36 0475 DD29 ; new command - ensure not talking MOS36 0433 DD0E v24 MOS36 0476 DD29 ; MOS36 0433 DD0E v24 MOS36 0477 DD29 20 A7 EE JSR RSPECH MOS36 0433 DD0E v24 MOS36 0478 DD2C 30 3C BMI NSPECH ;[talking active] MOS36 0433 DD0E v24 MOS36 0479 DD2E ; MOS36 0433 DD0E v24 MOS36 0480 DD2E ; new command and not talking MOS36 0433 DD0E v24 MOS36 0481 DD2E ; MOS36 0433 DD0E v24 MOS36 0482 DD2E SPOK ;speak external data MOS36 0433 DD0E v24 MOS36 0483 DD2E ; MOS36 0433 DD0E v24 MOS36 0484 DD2E ; get command byte from speech buffer MOS36 0433 DD0E v24 MOS36 0485 DD2E ; MOS36 0433 DD0E v24 MOS36 0486 DD2E 20 C2 E4 JSR REMOV MOS36 0433 DD0E v24 MOS36 0487 DD31 ; MOS36 0433 DD0E v24 MOS36 0488 DD31 ; codeword in A MOS36 0433 DD0E v24 MOS36 0489 DD31 ; MOS36 0433 DD0E v24 MOS36 0490 DD31 85 F5 STA SEROM MOS36 0433 DD0E v24 MOS36 0491 DD33 ; MOS36 0433 DD0E v24 MOS36 0492 DD33 ; pull data MOS36 0433 DD0E v24 MOS36 0493 DD33 ; MOS36 0433 DD0E v24 MOS36 0494 DD33 20 C2 E4 JSR REMOV MOS36 MOS36 MOS36 MOS36 Acorn macro assembler Page 67 MOS36 IRQ processing MOS36 MOS36 0433 DD0E v24 MOS36 0495 DD36 85 F7 STA ROMPTR+&01 ;hi-address / hi-data MOS36 0433 DD0E v24 MOS36 0496 DD38 20 C2 E4 JSR REMOV MOS36 0433 DD0E v24 MOS36 0497 DD3B 85 F6 STA ROMPTR+&00 ;lo-address / lo-data MOS36 0433 DD0E v24 MOS36 0498 DD3D ; MOS36 0433 DD0E v24 MOS36 0499 DD3D ; switch on codeword MOS36 0433 DD0E v24 MOS36 0500 DD3D ; MOS36 0433 DD0E v24 MOS36 0501 DD3D A4 F5 LDY SEROM MOS36 0433 DD0E v24 MOS36 0502 DD3F F0 1B BEQ ISP2 ;[command=0, do not treat codeword as a command] MOS36 0433 DD0E v24 MOS36 0503 DD41 10 16 BPL ISP3 ;[command>0, speech command without address] MOS36 0433 DD0E v24 MOS36 0504 DD43 ; MOS36 0433 DD0E v24 MOS36 0505 DD43 ; command with address MOS36 0433 DD0E v24 MOS36 0506 DD43 ; command either speak(address) OR read-and-branch(address) MOS36 0433 DD0E v24 MOS36 0507 DD43 ; MOS36 0433 DD0E v24 MOS36 0508 DD43 ; check for read and branch request MOS36 0433 DD0E v24 MOS36 0509 DD43 ; MOS36 0433 DD0E v24 MOS36 0510 DD43 24 F5 BIT SEROM MOS36 0433 DD0E v24 MOS36 0511 DD45 70 05 BVS RAB ;[read and branch] MOS36 0433 DD0E v24 MOS36 0512 DD47 ; MOS36 0433 DD0E v24 MOS36 0513 DD47 ; speak(address) MOS36 0433 DD0E v24 MOS36 0514 DD47 ; load address into speech processor MOS36 0433 DD0E v24 MOS36 0515 DD47 ; MOS36 0433 DD0E v24 MOS36 0516 DD47 ; V=0 MOS36 0433 DD0E v24 MOS36 0517 DD47 20 F5 EE JSR SPLOAD ;N.B. does PHP...PLP MOS36 0433 DD0E v24 MOS36 0518 DD4A 50 07 BVC ISPX ;[ALWAYS jump] MOS36 0433 DD0E v24 MOS36 0519 DD4C ; MOS36 0433 DD0E v24 MOS36 0520 DD4C RAB ;read and branch (speak indirect) MOS36 0433 DD0E v24 MOS36 0521 DD4C ; MOS36 0433 DD0E v24 MOS36 0522 DD4C ; multiply offset by two MOS36 0433 DD0E v24 MOS36 0523 DD4C ; MOS36 0433 DD0E v24 MOS36 0524 DD4C 06 F6 ASL ROMPTR+&00 MOS36 0433 DD0E v24 MOS36 0525 DD4E 26 F7 ROL ROMPTR+&01 MOS36 0433 DD0E v24 MOS36 0526 DD50 ; MOS36 0433 DD0E v24 MOS36 0527 DD50 ; reselect address MOS36 0433 DD0E v24 MOS36 0528 DD50 ; MOS36 0433 DD0E v24 MOS36 0529 DD50 20 76 EE JSR SPLIND ;load address indirect MOS36 0433 DD0E v24 MOS36 0530 DD53 ; MOS36 0433 DD0E v24 MOS36 0531 DD53 ISPX MOS36 0433 DD0E v24 MOS36 0532 DD53 AC 61 02 LDY SHUTSP ;command defaults to speech MOS36 0433 DD0E v24 MOS36 0533 DD56 4C B9 EE JMP WSPECH ;send command AND return MOS36 0433 DD0E v24 MOS36 0534 DD59 ; MOS36 0433 DD0E v24 MOS36 0535 DD59 ; MOS36 0433 DD0E v24 MOS36 0536 DD59 ISP3 ;treat codeword as a command MOS36 0433 DD0E v24 MOS36 0537 DD59 ; MOS36 0433 DD0E v24 MOS36 0538 DD59 20 B9 EE JSR WSPECH ;issue codeword command MOS36 0433 DD0E v24 MOS36 0539 DD5C ; MOS36 0433 DD0E v24 MOS36 0540 DD5C ISP2 ;write argument data bytes MOS36 0433 DD0E v24 MOS36 0541 DD5C ; MOS36 0433 DD0E v24 MOS36 0542 DD5C A4 F6 LDY ROMPTR+&00 MOS36 0433 DD0E v24 MOS36 0543 DD5E 20 B9 EE JSR WSPECH MOS36 0433 DD0E v24 MOS36 0544 DD61 A4 F7 LDY ROMPTR+&01 MOS36 0433 DD0E v24 MOS36 0545 DD63 20 B9 EE JSR WSPECH MOS36 0433 DD0E v24 MOS36 0546 DD66 ; MOS36 0433 DD0E v24 MOS36 0547 DD66 ; repeat poke of speak external data up to 4 times (8 bytes) MOS36 0433 DD0E v24 MOS36 0548 DD66 ; MOS36 0433 DD0E v24 MOS36 0549 DD66 46 FB LSR SPWK2 MOS36 0433 DD0E v24 MOS36 0550 DD68 D0 B4 BNE SPEREP ;[try poking more speak external data] MOS36 0433 DD0E v24 MOS36 0551 DD6A ; MOS36 0433 DD0E v24 MOS36 0552 DD6A NSPECH MOS36 0433 DD0E v24 MOS36 0553 DD6A 60 RTS MOS36 0433 DD0E v24 MOS36 0554 DD6B ] MOS36 0433 DD0E v24 MOS36 0555 DD6B MOS36 0433 DD0E v24 MOS36 0556 DD6B MOS36 0433 DD0E v24 MOS36 0557 DD6B MOS36 0433 DD0E v24 MOS36 0558 DD6B ITIME1 ;check for TIMER1 interrupt MOS36 0433 DD0E v24 MOS36 0559 DD6B ; MOS36 0433 DD0E v24 MOS36 0560 DD6B 90 7B BCC IADC ;[not TIMER1, check for ADC interrupt] MOS36 0560 DD6B v04 MOS36 0561 DD6D ; C=1 MOS36 0560 DD6B v04 MOS36 0562 DD6D ; MOS36 0560 DD6B v04 MOS36 0563 DD6D ; main clock interrupt MOS36 0560 DD6B v04 MOS36 0564 DD6D ; MOS36 0560 DD6B v04 MOS36 0565 DD6D ; clear interrupt MOS36 0560 DD6B v04 MOS36 0566 DD6D ; MOS36 0560 DD6B v04 MOS36 0567 DD6D A9 40 LDAIM CLOCK MOS36 0560 DD6B v04 MOS36 0568 DD6F 8D 4D FE STA IFRQ ;acknowledge clock interrupt MOS36 0560 DD6B v04 MOS36 0569 DD72 ; C=1 MOS36 0560 DD6B v04 MOS36 0570 DD72 ; MOS36 0560 DD6B v04 MOS36 0571 DD72 ; increment absolute time MOS36 0560 DD6B v04 MOS36 0572 DD72 ; MOS36 0560 DD6B v04 MOS36 0573 DD72 AD 83 02 LDA TIMESW MOS36 0560 DD6B v04 MOS36 0574 DD75 AA TAX ;X -> current timer MOS36 0560 DD6B v04 MOS36 0575 DD76 49 0F EORIM &0F MOS36 0560 DD6B v04 MOS36 0576 DD78 48 PHA MOS36 0560 DD6B v04 MOS36 0577 DD79 A8 TAY ;Y -> other timer MOS36 0560 DD6B v04 MOS36 0578 DD7A ; C=1 MOS36 0560 DD6B v04 MOS36 0579 DD7A ;****SEC ;N.B. add 1 to timer MOS36 0560 DD6B v04 MOS36 0580 DD7A ; MOS36 0560 DD6B v04 MOS36 0581 DD7A IT1 MOS36 0560 DD6B v04 MOS36 0582 DD7A BD 91 02 LDAAX TIME -&01 MOS36 0560 DD6B v04 MOS36 0583 DD7D 69 00 ADCIM ZERO MOS36 0560 DD6B v04 MOS36 0584 DD7F 99 91 02 STAAY TIME -&01 MOS36 0560 DD6B v04 MOS36 0585 DD82 CA DEX MOS36 0560 DD6B v04 MOS36 0586 DD83 F0 03 BEQ IT2 MOS36 0560 DD6B v04 MOS36 0587 DD85 88 DEY MOS36 0560 DD6B v04 MOS36 0588 DD86 D0 F2 BNE IT1 MOS36 0560 DD6B v04 MOS36 0589 DD88 IT2 MOS36 0560 DD6B v04 MOS36 0590 DD88 ; MOS36 0560 DD6B v04 MOS36 0591 DD88 68 PLA MOS36 0560 DD6B v04 MOS36 0592 DD89 8D 83 02 STA TIMESW ;switch timers MOS36 0560 DD6B v04 MOS36 0593 DD8C ; MOS36 0560 DD6B v04 MOS36 0594 DD8C ; MOS36 0560 DD6B v04 MOS36 0595 DD8C A2 05 LDXIM &05 MOS36 0560 DD6B v04 MOS36 0596 DD8E IVIAA5 MOS36 0560 DD6B v04 MOS36 0597 DD8E FE 9B 02 INCAX STPW -&01 MOS36 0560 DD6B v04 MOS36 0598 DD91 D0 08 BNE IINKEY MOS36 0560 DD6B v04 MOS36 0599 DD93 CA DEX MOS36 0560 DD6B v04 MOS36 0600 DD94 D0 F8 BNE IVIAA5 MOS36 0560 DD6B v04 MOS36 0601 DD96 ; MOS36 0560 DD6B v04 MOS36 0602 DD96 ; stopwatch timeout MOS36 0560 DD6B v04 MOS36 0603 DD96 ; MOS36 0560 DD6B v04 MOS36 0604 DD96 A0 05 LDYIM EVSWCH MOS36 0560 DD6B v04 MOS36 0605 DD98 20 F6 E4 JSR EVENT MOS36 0560 DD6B v04 MOS36 0606 DD9B ; MOS36 0560 DD6B v04 MOS36 0607 DD9B IINKEY ;decrement INKEY counter MOS36 0560 DD6B v04 MOS36 0608 DD9B ; MOS36 0560 DD6B v04 MOS36 0609 DD9B AD B1 02 LDA RDCTLO MOS36 0560 DD6B v04 MOS36 0610 DD9E D0 08 BNE IIN1 ;[just decrement lo] MOS36 0560 DD6B v04 MOS36 0611 DDA0 ; lo zero MOS36 0560 DD6B v04 MOS36 0612 DDA0 AD B2 02 LDA RDCTHI MOS36 0560 DD6B v04 MOS36 0613 DDA3 F0 06 BEQ IIN0 ;[counter zero] MOS36 0560 DD6B v04 MOS36 0614 DDA5 ; decrement lo and hi MOS36 0560 DD6B v04 MOS36 0615 DDA5 CE B2 02 DEC RDCTHI MOS36 MOS36 MOS36 MOS36 Acorn macro assembler Page 68 MOS36 IRQ processing MOS36 MOS36 0560 DD6B v04 MOS36 0616 DDA8 IIN1 ;just decrement lo MOS36 0560 DD6B v04 MOS36 0617 DDA8 CE B1 02 DEC RDCTLO MOS36 0560 DD6B v04 MOS36 0618 DDAB IIN0 ;counter zero MOS36 0560 DD6B v04 MOS36 0619 DDAB MOS36 0560 DD6B v04 MOS36 0620 DDAB [ $Tutu ; no sound, no speech shit wanted - nothing from this point on MOS36 0560 DD6B v04 MOS36 0624 DDAB | MOS36 0560 DD6B v04 MOS36 0625 DDAB ; MOS36 0560 DD6B v04 MOS36 0626 DDAB ; MOS36 0560 DD6B v04 MOS36 0627 DDAB ; check sound sema to ensure exclusive access to sound code MOS36 0560 DD6B v04 MOS36 0628 DDAB ; MOS36 0560 DD6B v04 MOS36 0629 DDAB 2C CE 02 BIT SSEMA MOS36 0560 DD6B v04 MOS36 0630 DDAE ] MOS36 0560 DD6B v04 MOS36 0631 DDAE 10 0B BPL SINUSE ;[sound software in use] MOS36 0560 DD6B v04 MOS36 0632 DDB0 ; MOS36 0560 DD6B v04 MOS36 0633 DDB0 ; sound software available MOS36 0560 DD6B v04 MOS36 0634 DDB0 ; MOS36 0560 DD6B v04 MOS36 0635 DDB0 EE CE 02 INC SSEMA ;claim sound sema MOS36 0560 DD6B v04 MOS36 0636 DDB3 58 CLI ;enable interrupts during sound processing MOS36 0560 DD6B v04 MOS36 0637 DDB4 20 9F EB JSR SNDIRQ MOS36 0560 DD6B v04 MOS36 0638 DDB7 78 SEI ;disable interrupts after sound processing MOS36 0560 DD6B v04 MOS36 0639 DDB8 CE CE 02 DEC SSEMA ;release sound sema MOS36 0560 DD6B v04 MOS36 0640 DDBB SINUSE MOS36 0560 DD6B v04 MOS36 0641 DDBB [ NOSP = &00 MOS36 0560 DD6B v04 MOS36 0643 DDBB | MOS36 0560 DD6B v04 MOS36 0644 DDBB ; MOS36 0560 DD6B v04 MOS36 0645 DDBB ; give speech a chance MOS36 0560 DD6B v04 MOS36 0646 DDBB ; MOS36 0560 DD6B v04 MOS36 0647 DDBB ; check buffer MOS36 0560 DD6B v04 MOS36 0648 DDBB ; MOS36 0560 DD6B v04 MOS36 0649 DDBB 2C D7 02 BIT SPSTAT MOS36 0560 DD6B v04 MOS36 0650 DDBE 30 0C BMI SPBUSY ;[speech buffer empty] MOS36 0560 DD6B v04 MOS36 0651 DDC0 ; MOS36 0560 DD6B v04 MOS36 0652 DDC0 ; read speech chip status MOS36 0560 DD6B v04 MOS36 0653 DDC0 ; MOS36 0560 DD6B v04 MOS36 0654 DDC0 20 A7 EE JSR RSPECH ;N.B. does not alter A if speech chip not present MOS36 0560 DD6B v04 MOS36 0655 DDC3 ; MOS36 0560 DD6B v04 MOS36 0656 DDC3 ; A>=$80 => busy MOS36 0560 DD6B v04 MOS36 0657 DDC3 ; MOS36 0560 DD6B v04 MOS36 0658 DDC3 ; N.B. if speech chip does not exist then 25% chance that PRSPRQ will MOS36 0560 DD6B v04 MOS36 0659 DDC3 ; be called, this will just result in a no-operation effect MOS36 0560 DD6B v04 MOS36 0660 DDC3 ; MOS36 0560 DD6B v04 MOS36 0661 DDC3 49 A0 EORIM &A0 MOS36 0560 DD6B v04 MOS36 0662 DDC5 C9 60 CMPIM &60 MOS36 0560 DD6B v04 MOS36 0663 DDC7 90 03 BCC SPBUSY ;[100, 101 or 111] MOS36 0560 DD6B v04 MOS36 0664 DDC9 ; MOS36 0560 DD6B v04 MOS36 0665 DDC9 20 1A DD JSR PRSPRQ ;process speech request MOS36 0560 DD6B v04 MOS36 0666 DDCC ] MOS36 0560 DD6B v04 MOS36 0667 DDCC ; MOS36 0560 DD6B v04 MOS36 0668 DDCC SPBUSY ;speech chip busy MOS36 0560 DD6B v04 MOS36 0669 DDCC ; MOS36 0560 DD6B v04 MOS36 0670 DDCC ; check RS423 for possible Tx MOS36 0560 DD6B v04 MOS36 0671 DDCC ; MOS36 0560 DD6B v04 MOS36 0672 DDCC 2C 49 D9 BIT FFBYT ;indicate timer interrupt call MOS36 0560 DD6B v04 MOS36 0673 DDCF 20 45 DC JSR IRQ68 MOS36 0560 DD6B v04 MOS36 0674 DDD2 ; MOS36 0560 DD6B v04 MOS36 0675 DDD2 ; check keyboard if keys active MOS36 0560 DD6B v04 MOS36 0676 DDD2 ; MOS36 0560 DD6B v04 MOS36 0677 DDD2 A5 EC LDA CKEY MOS36 0560 DD6B v04 MOS36 0678 DDD4 05 ED ORA OKEY MOS36 0560 DD6B v04 MOS36 0679 DDD6 2D 42 02 AND KSEMA ;check for keyboard critical region MOS36 0560 DD6B v04 MOS36 0680 DDD9 F0 04 BEQ ICLK0 ;[no keys active, clear timer interrupt] MOS36 0560 DD6B v04 MOS36 0681 DDDB 38 SEC MOS36 0560 DD6B v04 MOS36 0682 DDDC 20 92 F0 JSR JMIKYV ;key(s) active, process timer interrupt MOS36 0560 DD6B v04 MOS36 0683 DDDF ; ******** MAY ENABLE INTERRUPTS (EXITS DISABLED) ******** MOS36 0560 DD6B v04 MOS36 0684 DDDF ; MOS36 0560 DD6B v04 MOS36 0685 DDDF ICLK0 MOS36 0560 DD6B v04 MOS36 0686 DDDF ; give user print routine a chance MOS36 0560 DD6B v04 MOS36 0687 DDDF 20 2E E2 JSR UPTINT MOS36 0560 DD6B v04 MOS36 0688 DDE2 ; MOS36 0560 DD6B v04 MOS36 0689 DDE2 ; the ADC is connected on CB1 MOS36 0560 DD6B v04 MOS36 0690 DDE2 ; when port B is read (by keyboard routines) any MOS36 0560 DD6B v04 MOS36 0691 DDE2 ; interrupt is lost, and the ADC must be restarted MOS36 0560 DD6B v04 MOS36 0692 DDE2 ; MOS36 0560 DD6B v04 MOS36 0693 DDE2 2C C0 FE BIT ADCCTL MOS36 0560 DD6B v04 MOS36 0694 DDE5 70 04 BVS IADCB ;[ADC not busy] MOS36 0560 DD6B v04 MOS36 0695 DDE7 60 RTS ;return from interrupt MOS36 0560 DD6B v04 MOS36 0696 DDE8 MOS36 0560 DD6B v04 MOS36 0697 DDE8 MOS36 0560 DD6B v04 MOS36 0698 DDE8 IADC ;check for ADC interrupt MOS36 0560 DD6B v04 MOS36 0699 DDE8 ; MOS36 0560 DD6B v04 MOS36 0700 DDE8 2A ROLA ;A = IFR << 3, N = CB1 MOS36 0694 DDE5 v7B MOS36 0701 DDE9 10 28 BPL IKEYBD ;[not an ADC intterupt] MOS36 0701 DDE9 v57 MOS36 0702 DDEB ; MOS36 0701 DDE9 v57 MOS36 0703 DDEB ; ADC interrupt MOS36 0701 DDE9 v57 MOS36 0704 DDEB ; check ADC enabled MOS36 0701 DDE9 v57 MOS36 0705 DDEB ; MOS36 0701 DDE9 v57 MOS36 0706 DDEB IADCB MOS36 0701 DDE9 v57 MOS36 0707 DDEB AE 4C 02 LDX ADCHAN MOS36 0701 DDE9 v57 MOS36 0708 DDEE F0 1D BEQ IADC0 ;[ADC disabled] MOS36 0701 DDE9 v57 MOS36 0709 DDF0 ; MOS36 0701 DDE9 v57 MOS36 0710 DDF0 ; read conversion lo byte MOS36 0701 DDE9 v57 MOS36 0711 DDF0 ; MOS36 0701 DDE9 v57 MOS36 0712 DDF0 AD C2 FE LDA ADCLO MOS36 0701 DDE9 v57 MOS36 0713 DDF3 9D B5 02 STAAX ADCLOV -&01 MOS36 0701 DDE9 v57 MOS36 0714 DDF6 ; MOS36 0701 DDE9 v57 MOS36 0715 DDF6 ; read conversion hi byte MOS36 0701 DDE9 v57 MOS36 0716 DDF6 ; MOS36 0701 DDE9 v57 MOS36 0717 DDF6 AD C1 FE LDA ADCHI MOS36 0701 DDE9 v57 MOS36 0718 DDF9 9D B9 02 STAAX ADCHIV -&01 MOS36 0701 DDE9 v57 MOS36 0719 DDFC ; MOS36 0701 DDE9 v57 MOS36 0720 DDFC ; set latest conversion number MOS36 0701 DDE9 v57 MOS36 0721 DDFC ; MOS36 0701 DDE9 v57 MOS36 0722 DDFC 8E BE 02 STX ADCFLG MOS36 0701 DDE9 v57 MOS36 0723 DDFF ; MOS36 0701 DDE9 v57 MOS36 0724 DDFF ; signal ADC conversion event, X = channel number MOS36 0701 DDE9 v57 MOS36 0725 DDFF ; MOS36 0701 DDE9 v57 MOS36 0726 DDFF A0 03 LDYIM EVADC MOS36 0701 DDE9 v57 MOS36 0727 DE01 20 F6 E4 JSR EVENT MOS36 0701 DDE9 v57 MOS36 0728 DE04 ; MOS36 0701 DDE9 v57 MOS36 0729 DE04 ; step to next channel MOS36 0701 DDE9 v57 MOS36 0730 DE04 ; MOS36 0701 DDE9 v57 MOS36 0731 DE04 CA DEX MOS36 0701 DDE9 v57 MOS36 0732 DE05 D0 03 BNE IADC2 ;[channel >= 1] MOS36 0701 DDE9 v57 MOS36 0733 DE07 ; MOS36 0701 DDE9 v57 MOS36 0734 DE07 ; channel counter underflow MOS36 0701 DDE9 v57 MOS36 0735 DE07 ; reload channel counter MOS36 0701 DDE9 v57 MOS36 0736 DE07 ; MOS36 0701 DDE9 v57 MOS36 0737 DE07 AE 4D 02 LDX MAXADC MOS36 0701 DDE9 v57 MOS36 0738 DE0A IADC2 MOS36 0701 DDE9 v57 MOS36 0739 DE0A ; MOS36 0701 DDE9 v57 MOS36 0740 DE0A ; initiate next conversion MOS36 MOS36 MOS36 MOS36 Acorn macro assembler Page 69 MOS36 IRQ processing MOS36 MOS36 0701 DDE9 v57 MOS36 0741 DE0A ; X = channel number MOS36 0701 DDE9 v57 MOS36 0742 DE0A ; MOS36 0701 DDE9 v57 MOS36 0743 DE0A 20 3B DE JSR ADCBGX ;begin conversion, sets ADCHAN=X MOS36 0701 DDE9 v57 MOS36 0744 DE0D IADC0 MOS36 0701 DDE9 v57 MOS36 0745 DE0D A9 10 LDAIM ADC MOS36 0701 DDE9 v57 MOS36 0746 DE0F IVIAA0 ;return from VIAA interrupt MOS36 0701 DDE9 v57 MOS36 0747 DE0F 8D 4D FE STA IFRQ ;clear interrupt state MOS36 0701 DDE9 v57 MOS36 0748 DE12 60 RTS ;return from interrupt MOS36 0701 DDE9 v57 MOS36 0749 DE13 MOS36 0701 DDE9 v57 MOS36 0750 DE13 MOS36 0701 DDE9 v57 MOS36 0751 DE13 IKEYBD ;keyboard interrupt check MOS36 0701 DDE9 v57 MOS36 0752 DE13 ; MOS36 0701 DDE9 v57 MOS36 0753 DE13 2A ROLA ;A = IFR << 4 MOS36 0764 DE1E ^6F MOS36 0754 DE14 2A ROLA ;A = IFR << 5 MOS36 0764 DE1E ^6F MOS36 0755 DE15 2A ROLA ;A = IFR << 6 MOS36 0764 DE1E ^6F MOS36 0756 DE16 2A ROLA ;A = IFR << 7, N = CA2 MOS36 0764 DE1E ^6F MOS36 0757 DE17 10 07 BPL JUNKIRQ ;[not keyboard interrupt] MOS36 0764 DE1E ^6F MOS36 0758 DE19 ; MOS36 0764 DE1E ^6F MOS36 0759 DE19 ; C=0 because no VSYNC MOS36 0764 DE1E ^6F MOS36 0760 DE19 ; MOS36 0764 DE1E ^6F MOS36 0761 DE19 20 92 F0 JSR JMIKYV ;find and set up new current key (enter with C=0) MOS36 0764 DE1E ^6F MOS36 0762 DE1C ; ******** MAY ENABLE INTERRUPTS (EXITS DISABLED) ******** MOS36 0764 DE1E ^6F MOS36 0763 DE1C A9 01 LDAIM KEYBD MOS36 0764 DE1E ^6F MOS36 0764 DE1E D0 EF BNE IVIAA0 ;[ALWAYS jump] MOS36 0757 DE17 v78 MOS36 0765 DE20 ; MOS36 0757 DE17 v78 MOS36 0766 DE20 4C 96 DC JUNKIRQ JMP UNKIRQ ;IRQ not identified -- MOS36 0767 DE23 -- MOS36 0768 DE23 -- MOS36 0769 DE23 -- MOS36 0770 DE23 [ MOS125 = &FF -- MOS36 0771 DE23 | -- MOS36 0772 DE23 DEFIRQ ;default IRQ routine -- MOS36 0773 DE23 D8 CLD -- MOS36 0774 DE24 A5 FC LDA TEMPA -- MOS36 0775 DE26 48 PHA -- MOS36 0776 DE27 8A TXA -- MOS36 0777 DE28 48 PHA -- MOS36 0778 DE29 98 TYA -- MOS36 0779 DE2A 48 PHA -- MOS36 0780 DE2B ; -- MOS36 0781 DE2B ; schedule return from interrupt -- MOS36 0782 DE2B ; -- MOS36 0783 DE2B 20 44 DC JSR VAT -- MOS36 0784 DE2E ] -- MOS36 0785 DE2E IRQ0 ;return from interrupt restoring registers -- MOS36 0786 DE2E 68 PLA -- MOS36 0787 DE2F A8 TAY -- MOS36 0788 DE30 68 PLA -- MOS36 0789 DE31 AA TAX -- MOS36 0790 DE32 68 PLA -- MOS36 0791 DE33 85 FC STA TEMPA -- MOS36 0792 DE35 ; -- MOS36 0793 DE35 IRQTWO -- MOS36 0794 DE35 A5 FC LDA TEMPA -- MOS36 0795 DE37 40 RTI -- MOS36 0796 DE38 -- MOS36 0797 DE38 -- MOS36 0798 DE38 ADCBEG ;begin forced ADC conversion -- MOS36 0799 DE38 ; -- MOS36 0800 DE38 ; X = external channel number -- MOS36 0801 DE38 ; Y = 0 -- MOS36 0802 DE38 ; -- MOS36 0803 DE38 8C BE 02 STY ADCFLG ;clear conversion number -- MOS36 0804 DE3B ; -- MOS36 0805 DE3B ADCBGX ;begin ADC conversion -- MOS36 0806 DE3B ; -- MOS36 0807 DE3B ; X = external channel number -- MOS36 0808 DE3B ; Y corrupted -- MOS36 0809 DE3B ; -- MOS36 0810 DE3B E0 05 CPXIM NADC +&01 -- MOS36 0811 DE3D 90 02 BCC ADCBG1 ;[valid channel number] MOS36 0811 DE3D v7D MOS36 0812 DE3F A2 04 LDXIM NADC ;force valid channel number MOS36 0811 DE3D v7D MOS36 0813 DE41 ADCBG1 ;channel number now valid (but possibly 0) MOS36 0811 DE3D v7D MOS36 0814 DE41 ; MOS36 0811 DE3D v7D MOS36 0815 DE41 8E 4C 02 STX ADCHAN -- MOS36 0816 DE44 AC 4E 02 LDY ADCCNV ;normally 0, 8 or 12 (0 has same effect as 12) -- MOS36 0817 DE47 88 DEY -- MOS36 0818 DE48 98 TYA -- MOS36 0819 DE49 29 08 ANDIM &08 ;extract conversion type -- MOS36 0820 DE4B 18 CLC -- MOS36 0821 DE4C 6D 4C 02 ADC ADCHAN -- MOS36 0822 DE4F ; C=0 -- MOS36 0823 DE4F E9 00 SBCIM ZERO ;subtract 1, add in INTERNAL channel number (1->0 ... 4->3) -- MOS36 0824 DE51 8D C0 FE STA ADCCTL ;start conversion -- MOS36 0825 DE54 ; -- MOS36 0826 DE54 ; if X was 0 on entry then a conversion is initiated on channel 3 -- MOS36 0827 DE54 ; of the opposite conversion type to that expected, but the result -- MOS36 0828 DE54 ; of this conversion will be ignored -- MOS36 0829 DE54 ; -- MOS36 0830 DE54 60 RTS -- MOS36 0831 DE55 -- MOS36 0832 DE55 -- MOS36 0833 DE55 WRSTR ;write string -- MOS36 0834 DE55 ; -- MOS36 0835 DE55 A9 C3 LDAIM /MSG -- MOS36 0836 DE57 WRSTRA -- MOS36 0837 DE57 85 FE STA REPTR +&01 -- MOS36 0838 DE59 A9 00 LDAIM ZERO -- MOS36 0839 DE5B 85 FD STA REPTR +&00 -- MOS36 0840 DE5D WRSTR1 -- MOS36 0841 DE5D C8 INY MOS36 0845 DE64 ^77 MOS36 0842 DE5E B1 FD LDAIY REPTR MOS36 0845 DE64 ^77 MOS36 0843 DE60 20 E3 FF JSR OSASCI ;write message character MOS36 0845 DE64 ^77 MOS36 0844 DE63 AA TAX MOS36 0845 DE64 ^77 MOS36 0845 DE64 D0 F7 BNE WRSTR1 ;[ALWAYS jump, step to next message character] -- MOS36 0846 DE66 ; terminator found -- MOS36 0847 DE66 60 RTS -- MOS36 0848 DE67 -- MOS36 0849 DE67 -- MOS36 0850 DE67 LNK MOS38 -- MOS38 0001 DE67 ; > MOS38 -- MOS38 0002 DE67 TTL MOS38 CLI -- MOS38 0003 DE67 OPT MOS38 MOS38 MOS38 MOS38 MOS38 Acorn macro assembler Page 70 MOS38 MOS38 CLI MOS38 -- MOS38 0004 DE67 ;(c) 1981 ACORN -- MOS38 0005 DE67 ;BBC MOS -- MOS38 0006 DE67 ;Change record: -- MOS38 0007 DE67 ;004 29-Jul-81 MP Prototype version -- MOS38 0008 DE67 ;Author(s): -- MOS38 0009 DE67 ;PB Paul Bond -- MOS38 0010 DE67 ;MP Mike Prees -- MOS38 0011 DE67 -- MOS38 0012 DE67 -- MOS38 0013 DE67 ; RDCH -- MOS38 0014 DE67 INKEY -- MOS38 0015 DE67 8E B1 02 STX RDCTLO ;set INKEY counter -- MOS38 0016 DE6A 8C B2 02 STY RDCTHI -- MOS38 0017 DE6D A9 FF LDAIM &FF ;indicate INKEY operational -- MOS38 0018 DE6F D0 02 BNE RDCH5 ;[ALWAYS JUMP] MOS38 0018 DE6F v7D MOS38 0019 DE71 RDCH ;default OSRDCH MOS38 0018 DE6F v7D MOS38 0020 DE71 A9 00 LDAIM ZERO ;indicate not INKEY MOS38 0018 DE6F v7D MOS38 0021 DE73 RDCH5 MOS38 0018 DE6F v7D MOS38 0022 DE73 85 E6 STA RDCTEM -- MOS38 0023 DE75 ; save X and Y -- MOS38 0024 DE75 8A TXA -- MOS38 0025 DE76 48 PHA -- MOS38 0026 DE77 98 TYA -- MOS38 0027 DE78 48 PHA -- MOS38 0028 DE79 ; check for exec file -- MOS38 0029 DE79 AC 56 02 LDY EXECH -- MOS38 0030 DE7C F0 14 BEQ RDCHQ ;[no exec file] MOS38 0030 DE7C v6B MOS38 0031 DE7E ; MOS38 0030 DE7C v6B MOS38 0032 DE7E 38 SEC MOS38 0030 DE7C v6B MOS38 0033 DE7F 66 EB ROR ESSEMA ;enter critical region MOS38 0030 DE7C v6B MOS38 0034 DE81 20 D7 FF JSR OSBGET ;get a byte from exec file MOS38 0030 DE7C v6B MOS38 0035 DE84 08 PHP MOS38 0030 DE7C v6B MOS38 0036 DE85 46 EB LSR ESSEMA ;exit critical region MOS38 0030 DE7C v6B MOS38 0037 DE87 28 PLP MOS38 0030 DE7C v6B MOS38 0038 DE88 90 25 BCC RDCH3 ;[return character] MOS38 0038 DE88 v5A MOS38 0039 DE8A ; MOS38 0038 DE88 v5A MOS38 0040 DE8A ; end of exec file: close exec file MOS38 0038 DE88 v5A MOS38 0041 DE8A ; Y = handle MOS38 0038 DE88 v5A MOS38 0042 DE8A A9 00 LDAIM ZERO MOS38 0038 DE88 v5A MOS38 0043 DE8C 8D 56 02 STA EXECH ;cancel exec file handle MOS38 0038 DE88 v5A MOS38 0044 DE8F 20 CE FF JSR OSFIND ;close exec file MOS38 0038 DE88 v5A MOS38 0045 DE92 RDCHQ ;read character MOS38 0038 DE88 v5A MOS38 0046 DE92 24 FF BIT ESCFLG MOS38 0038 DE88 v5A MOS38 0047 DE94 30 16 BMI RDCH1 ;[ESCAPE detected] MOS38 0038 DE88 v5A MOS38 0048 DE96 ; MOS38 0038 DE88 v5A MOS38 0049 DE96 AE 41 02 LDX RDCHSW ;set to read ch from selected buffer MOS38 0038 DE88 v5A MOS38 0050 DE99 20 D8 E5 JSR RDCHG ;get ch from kybd input buffer MOS38 0038 DE88 v5A MOS38 0051 DE9C 90 11 BCC RDCHN ;[character available] MOS38 0038 DE88 v5A MOS38 0052 DE9E ; MOS38 0038 DE88 v5A MOS38 0053 DE9E ; C=1 MOS38 0038 DE88 v5A MOS38 0054 DE9E ; MOS38 0038 DE88 v5A MOS38 0055 DE9E 24 E6 BIT RDCTEM MOS38 0038 DE88 v5A MOS38 0056 DEA0 50 F0 BVC RDCHQ ;[INKEY not operational] MOS38 0038 DE88 v5A MOS38 0057 DEA2 ; MOS38 0038 DE88 v5A MOS38 0058 DEA2 AD B1 02 LDA RDCTLO MOS38 0038 DE88 v5A MOS38 0059 DEA5 0D B2 02 ORA RDCTHI MOS38 0038 DE88 v5A MOS38 0060 DEA8 D0 E8 BNE RDCHQ ;[INKEY counter <> 0] MOS38 0038 DE88 v5A MOS38 0061 DEAA ; MOS38 0038 DE88 v5A MOS38 0062 DEAA ;INKEY count exhausted MOS38 0038 DE88 v5A MOS38 0063 DEAA ; MOS38 0038 DE88 v5A MOS38 0064 DEAA B0 05 BCS RDCH2 ;[ALWAYS jump, return A=$FF, C=1] MOS38 0038 DE88 v5A MOS38 0065 DEAC ; MOS38 0038 DE88 v5A MOS38 0066 DEAC RDCH1 ;ESCAPE detected MOS38 0038 DE88 v5A MOS38 0067 DEAC 38 SEC ;indicate escape detected MOS38 0038 DE88 v5A MOS38 0068 DEAD A9 1B LDAIM ESC MOS38 0038 DE88 v5A MOS38 0069 DEAF RDCHN ;C=0 => 'real' character MOS38 0038 DE88 v5A MOS38 0070 DEAF RDCH3 ;C=1 => escape detected OR INKEY count expired MOS38 0038 DE88 v5A MOS38 0071 DEAF 85 E6 STA RDCTEM ;save character read MOS38 0064 DEAA v7A MOS38 0072 DEB1 RDCH2 ;entry point used when INKEY count exhausted (N.B. RDCTEM=$FF) MOS38 0064 DEAA v7A MOS38 0073 DEB1 68 PLA ;restore X and Y -- MOS38 0074 DEB2 A8 TAY -- MOS38 0075 DEB3 68 PLA -- MOS38 0076 DEB4 AA TAX -- MOS38 0077 DEB5 A5 E6 LDA RDCTEM ;A := character -- MOS38 0078 DEB7 60 RTS -- MOS38 0079 DEB8 [ MOS125 = &FF -- MOS38 0355 DEB8 ] -- MOS38 0356 DEB8 -- MOS38 0357 DEB8 [ MOS125 = &FF -- MOS38 0358 DEB8 | -- MOS38 0359 DEB8 ;START OF MOS 1.25 -- MOS38 0360 DEB8 ; COPYR had been anchored here for fear that CLISKP -- MOS38 0361 DEB8 ; would be entered with X<2; this is now ruled out -- MOS38 0362 DEB8 ; but instead end-of-table marker must be within -- MOS38 0363 DEB8 ; 253 bytes of COMTAB -- MOS38 0364 DEB8 ; command level interpreter -- MOS38 0365 DEB8 COMTAB ;table of MOS commands -- MOS38 0366 DEB8 ; this table uses the fact that all routine address hi-bytes -- MOS38 0367 DEB8 ; will have the top bit set -- MOS38 0368 DEB8 ; N.B. addresses are stored hi-byte followed by lo-byte -- MOS38 0369 DEB8 ; hi-byte is assumed to be >=$80 -- MOS38 0370 DEB8 ; code following address is A reg on entry to address -- MOS38 0371 DEB8 ; A+ => enter with XY -> line -- MOS38 0372 DEB8 ; A- => enter with Y = offset -- MOS38 0373 DEB8 -- MOS38 0374 DEB8 ; CAT -- MOS38 0375 DEB8 ;must come first to trap *. -- MOS38 0376 DEB8 43 41 54 = "CAT" -- MOS38 0377 DEBB E0 99 & /JMIFSC -- MOS38 0378 DEBD 05 = FSCAT ;enter with XY -> line -- MOS38 0379 DEBE -- MOS38 0380 DEBE ; FX -- MOS38 0381 DEBE ;second entry in OS 1.20. -- MOS38 0382 DEBE ;some naughty code might rely on the same quick response -- MOS38 0383 DEBE ;but we also want to give fast access to USERV (*FX136) -- MOS38 0384 DEBE ;and match early due to the sheer volume of calls -- MOS38 0385 DEBE 46 58 = "FX" -- MOS38 0386 DEC0 E3 8A & /FX -- MOS38 0387 DEC2 FF = &FF ;enter with Y = offset -- MOS38 0388 DEC3 -- MOS38 0389 DEC3 ; CODE -- MOS38 0390 DEC3 ;match after FX to take less time than *FX136 -- MOS38 0391 DEC3 43 4F 44 = "CODE" -- MOS38 0392 DEC7 E3 90 & /FXN -- MOS38 0393 DEC9 88 = FXCODE ;enter with Y = offset -- MOS38 0394 DECA -- MOS38 0395 DECA ; LOAD -- MOS38 0396 DECA ;must come before LINE to trap *L. -- MOS38 0397 DECA 4C 4F 41 = "LOAD" -- MOS38 0398 DECE E2 B6 & /LOAD -- MOS38 0399 DED0 MOS38 MOS38 MOS38 MOS38 Acorn macro assembler Page 71 MOS38 MOS38 CLI MOS38 -- MOS38 0400 DED0 00 = &00 ;enter with XY -> line -- MOS38 0401 DED1 -- MOS38 0402 DED1 ; LINE -- MOS38 0403 DED1 ;needs fast service the most as user code may be time critical -- MOS38 0404 DED1 ;the only (trivial) way to pass a string from parasite to USERV -- MOS38 0405 DED1 4C 49 4E = "LINE" -- MOS38 0406 DED5 E6 BA & /JMIUSR -- MOS38 0407 DED7 01 = &01 ;enter with A=$01, XY -> line, C=0 -- MOS38 0408 DED8 -- MOS38 0409 DED8 ; default if first character is not alpha, |, . or / -- MOS38 0410 DED8 ;filter the wordless *commands off early -- MOS38 0411 DED8 ;a substitute for testing the first char in code -- MOS38 0412 DED8 [ MOS125 = &7F -- MOS38 0413 DED8 [ STARGO = &00 -- MOS38 0414 DED8 E0 92 & /JMICMD -- MOS38 0415 DEDA | -- MOS38 0417 DEDA ] -- MOS38 0418 DEDA | -- MOS38 0420 DEDA ] -- MOS38 0421 DEDA 03 = FSNAME ;enter with XY -> line -- MOS38 0422 DEDB -- MOS38 0423 DEDB ; RUN -- MOS38 0424 DEDB ;must come before ROM to trap *R. -- MOS38 0425 DEDB ;should be as fast as *wordless to avoid disadvantage -- MOS38 0426 DEDB 52 55 4E = "RUN" -- MOS38 0427 DEDE [ MOS125 = &7F -- MOS38 0428 DEDE [ STARGO = &00 -- MOS38 0429 DEDE E0 92 & /JMICMD -- MOS38 0430 DEE0 | -- MOS38 0432 DEE0 ] -- MOS38 0433 DEE0 | -- MOS38 0435 DEE0 ] -- MOS38 0436 DEE0 -- MOS38 0437 DEE0 04 = FSRUN ;enter with XY -> line -- MOS38 0438 DEE1 -- MOS38 0439 DEE1 ; OPT -- MOS38 0440 DEE1 ;part of a program's operation, has high priority -- MOS38 0441 DEE1 4F 50 54 = "OPT" -- MOS38 0442 DEE4 E3 90 & /FXN -- MOS38 0443 DEE6 -- MOS38 0444 DEE6 8B = FXOPT ;enter with Y = offset -- MOS38 0445 DEE7 -- MOS38 0446 DEE7 ; EXEC -- MOS38 0447 DEE7 ;slow but provides the computer with work, should not hold it up -- MOS38 0448 DEE7 45 58 45 = "EXEC" -- MOS38 0449 DEEB F6 C3 & /EXEC -- MOS38 0450 DEED -- MOS38 0451 DEED 00 = ZERO ;enter with XY -> line -- MOS38 0452 DEEE -- MOS38 0453 DEEE ; MOTOR -- MOS38 0454 DEEE ;a quick command but not urgent coming through OSCLI -- MOS38 0455 DEEE 4D 4F 54 = "MOTOR" -- MOS38 0456 DEF3 E3 90 & /FXN -- MOS38 0457 DEF5 -- MOS38 0458 DEF5 89 = FXMOTR ;enter with Y = offset -- MOS38 0459 DEF6 -- MOS38 0460 DEF6 ; SAVE -- MOS38 0461 DEF6 ;must come before SPOOL to trap *S. -- MOS38 0462 DEF6 ;a slow command and rarer than loading -- MOS38 0463 DEF6 53 41 56 = "SAVE" -- MOS38 0464 DEFA E2 B8 & /SAVE -- MOS38 0465 DEFC -- MOS38 0466 DEFC 00 = ZERO ;enter with XY -> line -- MOS38 0467 DEFD -- MOS38 0468 DEFD ; SPOOL -- MOS38 0469 DEFD ;also slow and rarer than saving -- MOS38 0470 DEFD 53 50 4F = "SPOOL" -- MOS38 0471 DF02 E2 FB & /SPOOL -- MOS38 0472 DF04 -- MOS38 0473 DF04 00 = ZERO ;enter with XY -> line -- MOS38 0474 DF05 -- MOS38 0475 DF05 ; KEY -- MOS38 0476 DF05 ;low volume, called by programs at setup -- MOS38 0477 DF05 4B 45 59 = "KEY" -- MOS38 0478 DF08 E3 BF & /KEY -- MOS38 0479 DF0A -- MOS38 0480 DF0A FF = &FF ;enter with Y = offset -- MOS38 0481 DF0B -- MOS38 0482 DF0B ; TAPE -- MOS38 0483 DF0B ;must come before TV to trap *T. -- MOS38 0484 DF0B ;slightly more complex, called by programs at setup -- MOS38 0485 DF0B 54 41 50 = "TAPE" -- MOS38 0486 DF0F E3 90 & /FXN -- MOS38 0487 DF11 -- MOS38 0488 DF11 8C = FXTAPE ;enter with Y = offset -- MOS38 0489 DF12 -- MOS38 0490 DF12 ; TV -- MOS38 0491 DF12 ;cosmetic, called by programs at setup -- MOS38 0492 DF12 54 56 = "TV" -- MOS38 0493 DF14 E3 90 & /FXN -- MOS38 0494 DF16 -- MOS38 0495 DF16 90 = FXTV ;enter with Y = offset -- MOS38 0496 DF17 -- MOS38 0497 DF17 ; HELP -- MOS38 0498 DF17 ;user command -- MOS38 0499 DF17 48 45 4C = "HELP" -- MOS38 0500 DF1B F5 4A & /HELP -- MOS38 0501 DF1D -- MOS38 0502 DF1D FF = &FF ;enter with Y = offset -- MOS38 0503 DF1E -- MOS38 0504 DF1E ; ROM -- MOS38 0505 DF1E ;rarely used. as RFS installations are site-specific -- MOS38 0506 DF1E ;this is essentially a user command -- MOS38 0507 DF1E 52 4F 4D = "ROM" -- MOS38 0508 DF21 E3 90 & /FXN -- MOS38 0509 DF23 -- MOS38 0510 DF23 8D = FXSROM ;don't care -- MOS38 0511 DF24 -- MOS38 0512 DF24 ; BASIC -- MOS38 0513 DF24 ;invokes the language (i.e. non-transient) -- MOS38 0514 DF24 ;called either by the user or in a slow *EXEC file -- MOS38 0515 DF24 42 41 53 = "BASIC" -- MOS38 0516 DF29 E0 77 & /BASIC -- MOS38 0517 DF2B 01 = &01 ;bit 0 set for ILR2 to enter ROM with C=1 -- MOS38 0518 DF2C ] -- MOS38 0519 DF2C -- MOS38 0520 DF2C [ MOS125 = &7F -- MOS38 0521 DF2C [ STARGO = &00 -- MOS38 0522 DF2C ; GOIO -- MOS38 0523 DF2C ;comes before GO to trap *G. -- MOS38 0524 DF2C 47 4F 49 = "GOIO" MOS38 MOS38 MOS38 MOS38 Acorn macro assembler Page 72 MOS38 MOS38 CLI MOS38 -- MOS38 0525 DF30 DF 77 & /GOIO -- MOS38 0526 DF32 -- MOS38 0527 DF32 80 = /LANG ;assumed -ve; stored as default jump address -- MOS38 0528 DF33 -- MOS38 0529 DF33 ; GO -- MOS38 0530 DF33 47 4F = "GO" -- MOS38 0531 DF35 DF 78 & /GO -- MOS38 0532 DF37 -- MOS38 0533 DF37 80 = /LANG ;assumed -ve; stored as default jump address -- MOS38 0534 DF38 -- MOS38 0535 DF38 = "" -- MOS38 0536 DF38 80 = &80 ;end of table -- MOS38 0537 DF39 -- MOS38 0538 DF39 00 00 00 % 62 ;padding -- MOS38 0539 DF77 -- MOS38 0540 DF77 [ NOSP = &00 -- MOS38 0542 DF77 ] -- MOS38 0543 DF77 -- MOS38 0544 DF77 GOIO -- MOS38 0545 DF77 38 SEC -- MOS38 0546 DF78 GO -- MOS38 0547 DF78 08 PHP -- MOS38 0548 DF79 A2 D4 LDXIM INFO +BKEXEC -FBLOCK ;stretch! -- MOS38 0549 DF7B 20 7D E2 JSR CLRFB -- MOS38 0550 DF7E 8D C3 03 STA INFO +BKEXEC +&01 ;default address = &00008000 -- MOS38 0551 DF81 20 8E E2 JSR LSA ;replace with user address if present -- MOS38 0552 DF84 28 PLP -- MOS38 0553 DF85 90 08 BCC GETENV ;if *GO then use whole address MOS38 0553 DF85 v77 MOS38 0554 DF87 A9 FF LDAIM &FF MOS38 0553 DF85 v77 MOS38 0555 DF89 8D C4 03 STA INFO +BKEXEC +&02 MOS38 0553 DF85 v77 MOS38 0556 DF8C 8D C5 03 STA INFO +BKEXEC +&03 ;else force an I/O processor address MOS38 0553 DF85 v77 MOS38 0557 DF8F GETENV MOS38 0553 DF85 v77 MOS38 0558 DF8F 20 9D E0 JSR SKIPSP ;get next argument -- MOS38 0559 DF92 F0 07 BEQ GOTO ;if CR then point tail at it MOS38 0559 DF92 v78 MOS38 0560 DF94 C9 3B CMPIM ";" MOS38 0559 DF92 v78 MOS38 0561 DF96 D0 03 BNE GOTO ;if not semicolon then point tail at it MOS38 0559 DF92 v78 MOS38 0562 DF98 20 9C E0 JSR SKIPSN ;else absorb semicolon once MOS38 0559 DF92 v78 MOS38 0563 DF9B GOTO MOS38 0559 DF92 v78 MOS38 0564 DF9B 4C FF F2 JMP RUNGO ;set up tail from Y and enter user code -- MOS38 0565 DF9E -- MOS38 0566 DF9E RETAIL ;return command line tail to OSARGS control block -- MOS38 0567 DF9E ;Y=high byte -- MOS38 0568 DF9E 94 01 STYZX &01 ;store in 3MSB -- MOS38 0569 DFA0 AC D0 02 LDY TAILLO -- MOS38 0570 DFA3 94 00 STYZX &00 ;store low byte in MSB -- MOS38 0571 DFA5 A0 FF LDYIM &FF ;command line tail is always in I/O processor -- MOS38 0572 DFA7 94 02 STYZX &02 ;set high word to &FFFF -- MOS38 0573 DFA9 94 03 STYZX &03 -- MOS38 0574 DFAB C8 INY ;Y=0 for return -- MOS38 0575 DFAC [ TRUE = &00 -- MOS38 0576 DFAC A9 DC LDAIM SEAL ;set conventional return value (conflicting documentation) -- MOS38 0577 DFAE ] -- MOS38 0578 DFAE 60 RTS -- MOS38 0579 DFAF -- MOS38 0580 DFAF COLHEX -- MOS38 0581 DFAF [ FALSE = &00 -- MOS38 0584 DFAF ] -- MOS38 0585 DFAF AE C2 03 LDX INFO +BKEXEC ;get selected slot to X MOS38 0692 E01D ^10 MOS38 0586 DFB2 E0 10 CPXIM NROM ;does the slot have a table entry? MOS38 0692 E01D ^10 MOS38 0587 DFB4 [ TRUE = &00 MOS38 0692 E01D ^10 MOS38 0588 DFB4 B0 70 BCS FRIEZE ;[not in table] MOS38 0588 DFB4 v0F MOS38 0589 DFB6 | MOS38 0588 DFB4 v0F MOS38 0591 DFB6 ] MOS38 0588 DFB4 v0F MOS38 0592 DFB6 BD A1 02 LDAAX ROMS MOS38 0588 DFB4 v0F MOS38 0593 DFB9 10 6B BPL FRIEZE ;[not a service ROM] MOS38 0588 DFB4 v0F MOS38 0594 DFBB ABACUS MOS38 0588 DFB4 v0F MOS38 0595 DFBB A5 F4 LDA ROMID ;save current ROM MOS38 0588 DFB4 v0F MOS38 0596 DFBD 48 PHA MOS38 0588 DFB4 v0F MOS38 0597 DFBE 20 DB DB JSR STXROM MOS38 0588 DFB4 v0F MOS38 0598 DFC1 A9 04 LDAIM SVNAME MOS38 0588 DFB4 v0F MOS38 0599 DFC3 20 03 80 JSR ROMSFT ;call service ROM MOS38 0588 DFB4 v0F MOS38 0600 DFC6 AA TAX ;if ROM did not claim the call MOS38 0588 DFB4 v0F MOS38 0601 DFC7 D0 5D BNE FRIEZE ;then raise "Bad command" MOS38 0588 DFB4 v0F MOS38 0602 DFC9 4C 88 F1 JMP SVOP3 ;[service claimed, do not offer to other ROMs] MOS38 0588 DFB4 v0F MOS38 0603 DFCC | MOS38 0588 DFB4 v0F MOS38 0612 DFCC ] MOS38 0588 DFB4 v0F MOS38 0613 DFCC ] MOS38 0588 DFB4 v0F MOS38 0614 DFCC MOS38 0588 DFB4 v0F MOS38 0615 DFCC [ MOS125 = &00 MOS38 0588 DFB4 v0F MOS38 0624 DFCC ] MOS38 0588 DFB4 v0F MOS38 0625 DFCC MOS38 0588 DFB4 v0F MOS38 0626 DFCC [ MOS125 = &FF MOS38 0588 DFB4 v0F MOS38 0627 DFCC | MOS38 0588 DFB4 v0F MOS38 0628 DFCC CLINT MOS38 0588 DFB4 v0F MOS38 0629 DFCC 86 F2 STX WORK +&00 MOS38 0588 DFB4 v0F MOS38 0630 DFCE 84 F3 STY WORK +&01 MOS38 0588 DFB4 v0F MOS38 0631 DFD0 ; report *command to filing system MOS38 0588 DFB4 v0F MOS38 0632 DFD0 A9 08 LDAIM FSCLI MOS38 0588 DFB4 v0F MOS38 0633 DFD2 20 99 E0 JSR JMIFSC MOS38 0588 DFB4 v0F MOS38 0634 DFD5 ; check line is terminated by CR MOS38 0588 DFB4 v0F MOS38 0635 DFD5 A0 00 LDYIM ZERO MOS38 0588 DFB4 v0F MOS38 0636 DFD7 A9 0D LDAIM MCR MOS38 0588 DFB4 v0F MOS38 0637 DFD9 D1 F2 CLICHK CMPIY WORK MOS38 0588 DFB4 v0F MOS38 0638 DFDB F0 04 BEQ CLILOK ;[terminator present] MOS38 0588 DFB4 v0F MOS38 0639 DFDD C8 INY MOS38 0588 DFB4 v0F MOS38 0640 DFDE D0 F9 BNE CLICHK MOS38 0588 DFB4 v0F MOS38 0641 DFE0 ; no terminator within 256 bytes so ignore line MOS38 0588 DFB4 v0F MOS38 0642 DFE0 CLIRTS MOS38 0588 DFB4 v0F MOS38 0643 DFE0 60 RTS MOS38 0588 DFB4 v0F MOS38 0644 DFE1 ; MOS38 0588 DFB4 v0F MOS38 0645 DFE1 A0 FF CLILOK LDYIM &FF ;start scan from beginning of input buffer MOS38 0588 DFB4 v0F MOS38 0646 DFE3 ; N.B. Y will now be incremented to ZERO by SKIPSN MOS38 0588 DFB4 v0F MOS38 0647 DFE3 CLIR ;skip leading spaces and asterisks MOS38 0588 DFB4 v0F MOS38 0648 DFE3 20 9C E0 JSR SKIPSN ;skip spaces/asterisk and spaces MOS38 0588 DFB4 v0F MOS38 0649 DFE6 F0 F8 BEQ CLIRTS ;[reached end-of-line, ignore line] MOS38 0588 DFB4 v0F MOS38 0650 DFE8 C9 2A CMPIM SPLAT MOS38 0588 DFB4 v0F MOS38 0651 DFEA F0 F7 BEQ CLIR ;[asterisk, ignore] MOS38 0588 DFB4 v0F MOS38 0652 DFEC [ FALSE=0 MOS38 0588 DFB4 v0F MOS38 0656 DFEC ] MOS38 0588 DFB4 v0F MOS38 0657 DFEC ; ignore comment line MOS38 0588 DFB4 v0F MOS38 0658 DFEC C9 7C CMPIM "|" MOS38 0588 DFB4 v0F MOS38 0659 DFEE F0 F0 BEQ CLIRTS ;[*| command] MOS38 0588 DFB4 v0F MOS38 0660 DFF0 ; check for override MOS38 0588 DFB4 v0F MOS38 0661 DFF0 C9 2F CMPIM "/" MOS38 0588 DFB4 v0F MOS38 0662 DFF2 D0 09 BNE NOTSL ;[not /] MOS38 0588 DFB4 v0F MOS38 0663 DFF4 ; */name MOS38 0588 DFB4 v0F MOS38 0664 DFF4 C8 INY ;skip past / MOS38 0588 DFB4 v0F MOS38 0665 DFF5 20 68 E0 JSR CLIXY ;make XY -> after / MOS38 0588 DFB4 v0F MOS38 0666 DFF8 A9 02 LDAIM FSNOTA MOS38 0588 DFB4 v0F MOS38 0667 DFFA [ MOS125 = &7F MOS38 0588 DFB4 v0F MOS38 0668 DFFA [ STARGO = &00 MOS38 MOS38 MOS38 MOS38 Acorn macro assembler Page 73 MOS38 MOS38 CLI MOS38 MOS38 0588 DFB4 v0F MOS38 0669 DFFA 4C 92 E0 JMP JMICMD ;[ALWAYS JUMP] MOS38 0588 DFB4 v0F MOS38 0670 DFFD NOTSL MOS38 0588 DFB4 v0F MOS38 0671 DFFD ; save pointer to rest of line MOS38 0588 DFB4 v0F MOS38 0672 DFFD 84 E6 STY CLIRY MOS38 0588 DFB4 v0F MOS38 0673 DFFF C9 3A CMPIM ":" MOS38 0588 DFB4 v0F MOS38 0674 E001 D0 26 BNE NOTCO MOS38 0588 DFB4 v0F MOS38 0675 E003 C8 INY ;skip past colon MOS38 0588 DFB4 v0F MOS38 0676 E004 [ TRUE = &00 MOS38 0588 DFB4 v0F MOS38 0677 E004 D1 F2 CMPIY WORK ;is there a second colon? MOS38 0588 DFB4 v0F MOS38 0678 E006 D0 21 BNE NOTCO ;reject if not MOS38 0588 DFB4 v0F MOS38 0679 E008 C8 INY ;skip past colon MOS38 0588 DFB4 v0F MOS38 0680 E009 ] MOS38 0588 DFB4 v0F MOS38 0681 E009 D1 F2 CMPIY WORK ;three colons? MOS38 0588 DFB4 v0F MOS38 0682 E00B D0 06 BNE COLON ;if not then get hex MOS38 0588 DFB4 v0F MOS38 0683 E00D 20 9C E0 JSR SKIPSN ;else skip colon and spaces MOS38 0588 DFB4 v0F MOS38 0684 E010 98 TYA ;command line offset to A MOS38 0588 DFB4 v0F MOS38 0685 E011 D0 7A BNE CLIFS ;pass rest of line via FSC 3 (always) MOS38 0685 E011 v05 MOS38 0686 E013 COLON MOS38 0685 E011 v05 MOS38 0687 E013 A2 D4 LDXIM INFO +BKEXEC -FBLOCK ;hopefully out of the way MOS38 0685 E011 v05 MOS38 0688 E015 20 8E E2 JSR LSA ;hex to scratch space MOS38 0685 E011 v05 MOS38 0689 E018 08 PHP ;save result MOS38 0685 E011 v05 MOS38 0690 E019 20 9D E0 JSR SKIPSP MOS38 0685 E011 v05 MOS38 0691 E01C 28 PLP MOS38 0685 E011 v05 MOS38 0692 E01D B0 90 BCS COLHEX ;if hex present, call specific ROM MOS38 0685 E011 v05 MOS38 0693 E01F A2 04 LDXIM SVNAME ;else pass to service ROMs only MOS38 0685 E011 v05 MOS38 0694 E021 20 6C F1 JSR SVOP MOS38 0685 E011 v05 MOS38 0695 E024 F0 50 BEQ SVACK MOS38 0685 E011 v05 MOS38 0696 E026 FRIEZE MOS38 0685 E011 v05 MOS38 0697 E026 4C 73 E3 JMP MBDCMD MOS38 0685 E011 v05 MOS38 0698 E029 NOTCO MOS38 0685 E011 v05 MOS38 0699 E029 | MOS38 0685 E011 v05 MOS38 0704 E029 ] MOS38 0685 E011 v05 MOS38 0705 E029 | MOS38 0685 E011 v05 MOS38 0710 E029 ] MOS38 0685 E011 v05 MOS38 0711 E029 ; X=&FF going to 0, point to start of table MOS38 0685 E011 v05 MOS38 0712 E029 A2 FF LDXIM &FF MOS38 0685 E011 v05 MOS38 0713 E02B CLIRST ; restart search at next keyword MOS38 0685 E011 v05 MOS38 0714 E02B A4 E6 LDY CLIRY ; reset pointer to start of user word MOS38 0685 E011 v05 MOS38 0715 E02D 88 DEY ;cancel first INY MOS38 0685 E011 v05 MOS38 0716 E02E CLIADV ; compare characters MOS38 0685 E011 v05 MOS38 0717 E02E C8 INY ; advance user word pointer MOS38 0685 E011 v05 MOS38 0718 E02F B1 F2 LDAIY WORK ; fetch user character MOS38 0685 E011 v05 MOS38 0719 E031 29 DF ANDIM &DF ;equate cases MOS38 0685 E011 v05 MOS38 0720 E033 C9 5B CMPIM "Z"+&01 MOS38 0685 E011 v05 MOS38 0721 E035 90 02 BCC CLIALF ;if above "Z" MOS38 0685 E011 v05 MOS38 0722 E037 A9 00 LDAIM &00 ;then ensure A<&30, C=0 MOS38 0685 E011 v05 MOS38 0723 E039 C9 41 CLIALF CMPIM "A" ;C=1, "A"<=A<="Z" iff alpha MOS38 0685 E011 v05 MOS38 0724 E03B E8 INX ; advance table pointer or skip aux byte MOS38 0685 E011 v05 MOS38 0725 E03C 5D B8 DE EORAX COMTAB ; set b7 from table and compare b6..0 MOS38 0685 E011 v05 MOS38 0726 E03F F0 ED BEQ CLIADV ;keywords must be all capital letters MOS38 0685 E011 v05 MOS38 0727 E041 B0 09 BCS CLISKP ;C=1, mismatch or end of keyword, reject MOS38 0685 E011 v05 MOS38 0728 E043 30 07 BMI CLISKP ;C=0, end of both words, accept MOS38 0685 E011 v05 MOS38 0729 E045 B1 F2 LDAIY WORK ;else end of user word, test for abbreviation MOS38 0685 E011 v05 MOS38 0730 E047 C8 INY ;move past the dot MOS38 0685 E011 v05 MOS38 0731 E048 49 2E EORIM "." MOS38 0685 E011 v05 MOS38 0732 E04A C9 01 CMPIM &01 ;C=1 iff not dot, reject MOS38 0685 E011 v05 MOS38 0733 E04C CLISKP MOS38 0685 E011 v05 MOS38 0734 E04C E8 INX ; skip high byte of action address MOS38 0685 E011 v05 MOS38 0735 E04D CLIALI ; align to keyword terminator MOS38 0685 E011 v05 MOS38 0736 E04D E8 INX ; advance table pointer or skip low byte of action address MOS38 0685 E011 v05 MOS38 0737 E04E BD B6 DE LDAAX COMTAB -&02 ; test table byte at original offset MOS38 0685 E011 v05 MOS38 0738 E051 10 FA BPL CLIALI ;[not reached address hi-byte] MOS38 0685 E011 v05 MOS38 0739 E053 B0 2A BCS CLITMN ;if C=1, compare with next keyword MOS38 0685 E011 v05 MOS38 0740 E055 ;CLIMFN ;full name match MOS38 0685 E011 v05 MOS38 0741 E055 ; found CLI command match MOS38 0685 E011 v05 MOS38 0742 E055 ; construct JMI hi-byte value to command processing code MOS38 0685 E011 v05 MOS38 0743 E055 48 PHA MOS38 0685 E011 v05 MOS38 0744 E056 ; construct JMI lo-byte value to command processing code MOS38 0685 E011 v05 MOS38 0745 E056 BD B7 DE LDAAX COMTAB -&01 MOS38 0685 E011 v05 MOS38 0746 E059 48 PHA MOS38 0685 E011 v05 MOS38 0747 E05A ; skip spaces after command name MOS38 0685 E011 v05 MOS38 0748 E05A 20 9D E0 JSR SKIPSP MOS38 0685 E011 v05 MOS38 0749 E05D 18 CLC ;C=0 used by FXN entry MOS38 0685 E011 v05 MOS38 0750 E05E 08 PHP ;status used by EXEC and SPOOL MOS38 0685 E011 v05 MOS38 0751 E05F ; (optionally) make XY -> rest of line MOS38 0685 E011 v05 MOS38 0752 E05F 20 63 E0 JSR CLIXYA MOS38 0685 E011 v05 MOS38 0753 E062 40 RTI ;enter command processing routine MOS38 0685 E011 v05 MOS38 0754 E063 MOS38 0685 E011 v05 MOS38 0755 E063 MOS38 0685 E011 v05 MOS38 0756 E063 CLIXYA ;conditionally make XY -> rest of line MOS38 0685 E011 v05 MOS38 0757 E063 BD B8 DE LDAAX COMTAB MOS38 0685 E011 v05 MOS38 0758 E066 30 0E BMI CLIXY0 ;[keep Y = offset of rest of line from WORK] MOS38 0685 E011 v05 MOS38 0759 E068 CLIXY ;make XY -> rest of command line MOS38 0685 E011 v05 MOS38 0760 E068 98 TYA ;A = offset of rest of line MOS38 0685 E011 v05 MOS38 0761 E069 BC B8 DE LDYAX COMTAB ;Y := function code MOS38 0685 E011 v05 MOS38 0762 E06C CLIXY2 MOS38 0685 E011 v05 MOS38 0763 E06C 18 CLC MOS38 0685 E011 v05 MOS38 0764 E06D 65 F2 ADC WORK ;N.B. C=1 => carry MOS38 0685 E011 v05 MOS38 0765 E06F AA TAX ;X = lo-byte of pointer to rest of line MOS38 0685 E011 v05 MOS38 0766 E070 98 TYA ;A = function code MOS38 0685 E011 v05 MOS38 0767 E071 A4 F3 LDY WORK +&01 MOS38 0685 E011 v05 MOS38 0768 E073 90 01 BCC CLIXY1 ;[no carry] MOS38 0685 E011 v05 MOS38 0769 E075 ; carry MOS38 0685 E011 v05 MOS38 0770 E075 C8 INY MOS38 0685 E011 v05 MOS38 0771 E076 CLIXY1 ;N.B. Y = hi-byte of pointer to rest of line MOS38 0685 E011 v05 MOS38 0772 E076 CLIXY0 MOS38 0685 E011 v05 MOS38 0773 E076 SVACK ;command accepted by service ROM MOS38 0685 E011 v05 MOS38 0774 E076 60 RTS MOS38 0685 E011 v05 MOS38 0775 E077 MOS38 0685 E011 v05 MOS38 0776 E077 MOS38 0685 E011 v05 MOS38 0777 E077 BASIC ;select BASIC language ROM MOS38 0685 E011 v05 MOS38 0778 E077 AE 4B 02 LDX BROMID MOS38 0685 E011 v05 MOS38 0779 E07A 30 06 BMI NBASIC ;[no BASIC ROM] MOS38 0685 E011 v05 MOS38 0780 E07C 4C A9 DB JMP ILR2 ;enter BASIC ROM (N.B. A b0=1, enter with C=1) MOS38 0685 E011 v05 MOS38 0781 E07F MOS38 0685 E011 v05 MOS38 0782 E07F CLITMN MOS38 0685 E011 v05 MOS38 0783 E07F 0A ASLA MOS38 0685 E011 v05 MOS38 0784 E080 D0 A9 BNE CLIRST MOS38 0685 E011 v05 MOS38 0785 E082 ;else fall through to CLIEND MOS38 0685 E011 v05 MOS38 0786 E082 MOS38 0685 E011 v05 MOS38 0787 E082 MOS38 0685 E011 v05 MOS38 0788 E082 ;END OF MOS 1.25 MOS38 0685 E011 v05 MOS38 0789 E082 ] MOS38 0685 E011 v05 MOS38 0790 E082 MOS38 0685 E011 v05 MOS38 0791 E082 LNK MOS39 MOS38 0685 E011 v05 MOS39 0001 E082 ; > MOS39 MOS38 0685 E011 v05 MOS39 0002 E082 TTL MOS39 CLI MOS38 0685 E011 v05 MOS39 0003 E082 OPT MOS39 MOS39 MOS39 MOS39 MOS39 Acorn macro assembler Page 74 MOS39 MOS39 CLI MOS39 MOS38 0685 E011 v05 MOS39 0004 E082 ;(c) 1981 ACORN MOS38 0685 E011 v05 MOS39 0005 E082 ;BBC MOS MOS38 0685 E011 v05 MOS39 0006 E082 ;Change record: MOS38 0685 E011 v05 MOS39 0007 E082 ;004 29-Jul-81 MP Prototype version MOS38 0685 E011 v05 MOS39 0008 E082 ;Author(s): MOS38 0685 E011 v05 MOS39 0009 E082 ;PB Paul Bond MOS38 0685 E011 v05 MOS39 0010 E082 ;MP Mike Prees MOS38 0685 E011 v05 MOS39 0011 E082 MOS38 0685 E011 v05 MOS39 0012 E082 MOS38 0685 E011 v05 MOS39 0013 E082 NBASIC ;BASIC ROM not present so offer to service ROMs MOS38 0685 E011 v05 MOS39 0014 E082 CLIEND ;entered here if command not recognised or does not exist MOS38 0685 E011 v05 MOS39 0015 E082 ; offer command to service ROMs MOS38 0685 E011 v05 MOS39 0016 E082 A4 E6 LDY CLIRY ;restore Y offset to point to command name MOS38 0685 E011 v05 MOS39 0017 E084 A2 04 LDXIM SVNAME MOS38 0685 E011 v05 MOS39 0018 E086 20 6C F1 JSR SVOP MOS38 0685 E011 v05 MOS39 0019 E089 F0 EB BEQ SVACK ;[accepted by service ROM] MOS38 0685 E011 v05 MOS39 0020 E08B ; command not accepted by a service ROM MOS38 0685 E011 v05 MOS39 0021 E08B ; so pass command to filing system MOS38 0685 E011 v05 MOS39 0022 E08B A5 E6 LDA CLIRY ;A = offset to command name MOS38 0685 E011 v05 MOS39 0023 E08D [ MOS125 = &7F MOS38 0685 E011 v05 MOS39 0024 E08D [ STARGO = &00 MOS38 0685 E011 v05 MOS39 0025 E08D CLIFS MOS38 0685 E011 v05 MOS39 0026 E08D ] MOS38 0685 E011 v05 MOS39 0027 E08D ] MOS38 0685 E011 v05 MOS39 0028 E08D 20 6C E0 JSR CLIXY2 ;make XY -> rest of line -- MOS39 0029 E090 A9 03 LDAIM FSNAME -- MOS39 0030 E092 [ MOS125 = &7F -- MOS39 0031 E092 [ STARGO = &00 -- MOS39 0032 E092 JMICMD -- MOS39 0033 E092 ;entry for FSC calls 2,3,4,(11) -- MOS39 0034 E092 ;cancel OSARGS 1 intercept, FS provides the tail pointer itself -- MOS39 0035 E092 48 PHA -- MOS39 0036 E093 A9 00 LDAIM &00 -- MOS39 0037 E095 8D D1 02 STA TAILHI -- MOS39 0038 E098 68 PLA -- MOS39 0039 E099 ] -- MOS39 0040 E099 ] -- MOS39 0041 E099 -- MOS39 0042 E099 JMIFSC -- MOS39 0043 E099 -- MOS39 0044 E099 6C 1E 02 JMI FSCVEC -- MOS39 0045 E09C [ MOS125 = &FF -- MOS39 0054 E09C ] -- MOS39 0055 E09C -- MOS39 0056 E09C -- MOS39 0057 E09C ; ignore space characters -- MOS39 0058 E09C C8 SKIPSN INY ;skip current character MOS39 0061 E0A1 ^79 MOS39 0059 E09D B1 F2 SKIPSP LDAIY WORK MOS39 0068 E0A6 ^75 MOS39 0060 E09F C9 20 CMPIM SPACE MOS39 0068 E0A6 ^75 MOS39 0061 E0A1 F0 F9 BEQ SKIPSN ;[character is space, ignore] MOS39 0068 E0A6 ^75 MOS39 0062 E0A3 C9 0D SKPSP1 CMPIM MCR MOS39 0073 E0AD ^74 MOS39 0063 E0A5 ; Z=1 next character is CR MOS39 0073 E0AD ^74 MOS39 0064 E0A5 ; Z=0 next character is not CR MOS39 0073 E0AD ^74 MOS39 0065 E0A5 60 RTS MOS39 0073 E0AD ^74 MOS39 0066 E0A6 SKPCM ;C=0 => check for line end MOS39 0073 E0AD ^74 MOS39 0067 E0A6 ;C=1 => skip optional comma and check for line end MOS39 0073 E0AD ^74 MOS39 0068 E0A6 90 F5 BCC SKIPSP MOS39 0073 E0AD ^74 MOS39 0069 E0A8 SKPCOM MOS39 0073 E0AD ^74 MOS39 0070 E0A8 ; skip spaces and an optional comma MOS39 0073 E0AD ^74 MOS39 0071 E0A8 20 9D E0 JSR SKIPSP MOS39 0073 E0AD ^74 MOS39 0072 E0AB C9 2C CMPIM "," MOS39 0073 E0AD ^74 MOS39 0073 E0AD D0 F4 BNE SKPSP1 -- MOS39 0074 E0AF C8 INY ;N.B. force Z=0 (i.e. non-zero result) -- MOS39 0075 E0B0 60 RTS -- MOS39 0076 E0B1 ; get decimal number -- MOS39 0077 E0B1 [ MOS125 = &FF -- MOS39 0110 E0B1 | -- MOS39 0111 E0B1 GETNUM -- MOS39 0112 E0B1 20 9D E0 JSR SKIPSP ;skip leading spaces, A := delimiter -- MOS39 0113 E0B4 20 D9 E0 JSR TSTNUM -- MOS39 0114 E0B7 B0 13 BCS GN0 MOS39 0114 E0B7 v6C MOS39 0115 E0B9 60 RTS ;C=0 [not a digit] MOS39 0114 E0B7 v6C MOS39 0116 E0BA MOS39 0114 E0B7 v6C MOS39 0117 E0BA GNT MOS39 0114 E0B7 v6C MOS39 0118 E0BA E0 1A CPXIM &1A ;if 26 or more MOS39 0134 E0D2 ^66 MOS39 0119 E0BC B0 2B BCS TSTNR ;then overflow MOS39 0119 E0BC v54 MOS39 0120 E0BE AA TAX ;save last digit read MOS39 0119 E0BC v54 MOS39 0121 E0BF A5 E6 LDA NUMBER MOS39 0119 E0BC v54 MOS39 0122 E0C1 0A ASLA ;times 2 MOS39 0119 E0BC v54 MOS39 0123 E0C2 0A ASLA ;times 4 MOS39 0119 E0BC v54 MOS39 0124 E0C3 65 E6 ADC NUMBER ;times 5; C=0 MOS39 0119 E0BC v54 MOS39 0125 E0C5 0A ASLA ;times 10; C=0 MOS39 0119 E0BC v54 MOS39 0126 E0C6 86 E6 STX NUMBER ;NUMBER := most recently read digit MOS39 0119 E0BC v54 MOS39 0127 E0C8 ; N.B. C=0 MOS39 0119 E0BC v54 MOS39 0128 E0C8 65 E6 ADC NUMBER ;A := accumulated value MOS39 0119 E0BC v54 MOS39 0129 E0CA B0 1D BCS TSTNR ;[overflow] MOS39 0119 E0BC v54 MOS39 0130 E0CC GN0 MOS39 0119 E0BC v54 MOS39 0131 E0CC 85 E6 STA NUMBER ;NUMBER := accumulated number so far (must save for KEY) MOS39 0119 E0BC v54 MOS39 0132 E0CE AA TAX MOS39 0119 E0BC v54 MOS39 0133 E0CF 20 D8 E0 JSR TSTNUX ;read digit skipping current character MOS39 0119 E0BC v54 MOS39 0134 E0D2 B0 E6 BCS GNT ;process digit [non-digit serves as terminator] MOS39 0119 E0BC v54 MOS39 0135 E0D4 C9 0D CMPIM MCR MOS39 0119 E0BC v54 MOS39 0136 E0D6 38 SEC MOS39 0119 E0BC v54 MOS39 0137 E0D7 ; return with: MOS39 0119 E0BC v54 MOS39 0138 E0D7 ; C=1 => valid number, Z=1/0 => delimiter is/is_not CR, number in X MOS39 0119 E0BC v54 MOS39 0139 E0D7 60 RTS MOS39 0119 E0BC v54 MOS39 0140 E0D8 ] MOS39 0119 E0BC v54 MOS39 0141 E0D8 MOS39 0119 E0BC v54 MOS39 0142 E0D8 ; check character is a digit MOS39 0119 E0BC v54 MOS39 0143 E0D8 TSTNUX MOS39 0119 E0BC v54 MOS39 0144 E0D8 C8 INY ;skip current character MOS39 0119 E0BC v54 MOS39 0145 E0D9 TSTNUM MOS39 0119 E0BC v54 MOS39 0146 E0D9 B1 F2 LDAIY WORK ;get next character MOS39 0119 E0BC v54 MOS39 0147 E0DB C9 3A CMPIM &3A ;N.B. $3A = '9' + 1 MOS39 0119 E0BC v54 MOS39 0148 E0DD B0 0A BCS TSTNR ;[bad digit, > '9'] MOS39 0119 E0BC v54 MOS39 0149 E0DF C9 30 CMPIM "0" MOS39 0119 E0BC v54 MOS39 0150 E0E1 90 06 BCC TSTNR ;[bad digit, < '0'] MOS39 0119 E0BC v54 MOS39 0151 E0E3 29 0F ANDIM &0F ;convert to number (do not corrupt V) MOS39 0119 E0BC v54 MOS39 0152 E0E5 ; N.B. C=1 MOS39 0119 E0BC v54 MOS39 0153 E0E5 60 RTS MOS39 0119 E0BC v54 MOS39 0154 E0E6 MOS39 0119 E0BC v54 MOS39 0155 E0E6 TSTNRX MOS39 0119 E0BC v54 MOS39 0156 E0E6 20 A8 E0 JSR SKPCOM MOS39 0119 E0BC v54 MOS39 0157 E0E9 TSTNR MOS39 0119 E0BC v54 MOS39 0158 E0E9 18 CLC MOS39 0169 E0F8 ^6C MOS39 0159 E0EA ; C=0 bad number, A = delimiting character MOS39 0169 E0F8 ^6C MOS39 0160 E0EA 60 RTS MOS39 0169 E0F8 ^6C MOS39 0161 E0EB MOS39 0169 E0F8 ^6C MOS39 0162 E0EB TSTHEX ;test for, and convert, hex digit MOS39 0169 E0F8 ^6C MOS39 0163 E0EB 20 D9 E0 JSR TSTNUM MOS39 0169 E0F8 ^6C MOS39 0164 E0EE B0 0E BCS TSTH0 ;[is a number, therefore a valid hex digit] MOS39 MOS39 MOS39 MOS39 Acorn macro assembler Page 75 MOS39 MOS39 CLI MOS39 MOS39 0169 E0F8 ^6C MOS39 0165 E0F0 29 DF ANDIM &DF ;force upper case MOS39 0169 E0F8 ^6C MOS39 0166 E0F2 C9 47 CMPIM "G" MOS39 0169 E0F8 ^6C MOS39 0167 E0F4 B0 F0 BCS TSTNRX ;[>'F' so fail] MOS39 0169 E0F8 ^6C MOS39 0168 E0F6 C9 41 CMPIM "A" MOS39 0169 E0F8 ^6C MOS39 0169 E0F8 90 EC BCC TSTNRX ;[<'A' so fail] MOS39 0164 E0EE v71 MOS39 0170 E0FA 08 PHP ;save V MOS39 0164 E0EE v71 MOS39 0171 E0FB E9 37 SBCIM ALPHAA -&0A ;convert to hex MOS39 0164 E0EE v71 MOS39 0172 E0FD 28 PLP ;restore V MOS39 0164 E0EE v71 MOS39 0173 E0FE ; C=1 MOS39 0164 E0EE v71 MOS39 0174 E0FE TSTH0 ;C=1 MOS39 0164 E0EE v71 MOS39 0175 E0FE C8 INY -- MOS39 0176 E0FF 60 RTS -- MOS39 0177 E100 -- MOS39 0178 E100 -- MOS39 0179 E100 WRCH ;system write character -- MOS39 0180 E100 48 PHA ;save character on stack -- MOS39 0181 E101 8A TXA ;save registers -- MOS39 0182 E102 48 PHA -- MOS39 0183 E103 98 TYA -- MOS39 0184 E104 48 PHA -- MOS39 0185 E105 BA TSX -- MOS39 0186 E106 BD 03 01 LDAAX &0103 ;restore character -- MOS39 0187 E109 48 PHA -- MOS39 0188 E10A ; A = character -- MOS39 0189 E10A -- MOS39 0190 E10A ; examine WRCH selection(s) -- MOS39 0191 E10A ; -- MOS39 0192 E10A 2C 60 02 BIT NETWRC -- MOS39 0193 E10D 10 08 BPL WRCNTN ;[WRCH not to net] MOS39 0193 E10D v77 MOS39 0194 E10F ; WRCH to net MOS39 0193 E10D v77 MOS39 0195 E10F ; A = character MOS39 0193 E10D v77 MOS39 0196 E10F A8 TAY ;send character in Y MOS39 0193 E10D v77 MOS39 0197 E110 A9 04 LDAIM NTWRCH MOS39 0193 E10D v77 MOS39 0198 E112 20 DF E5 JSR JMINET ;WRCH thru net MOS39 0193 E10D v77 MOS39 0199 E115 B0 52 BCS WRCHNN ;[immediate return to caller] MOS39 0199 E115 v2D MOS39 0200 E117 ; MOS39 0199 E115 v2D MOS39 0201 E117 ; continue within WRCH MOS39 0199 E115 v2D MOS39 0202 E117 ; MOS39 0199 E115 v2D MOS39 0203 E117 WRCNTN MOS39 0199 E115 v2D MOS39 0204 E117 MOS39 0199 E115 v2D MOS39 0205 E117 18 CLC ;in case VDU not selected MOS39 0199 E115 v2D MOS39 0206 E118 A9 02 LDAIM WRVDU MOS39 0199 E115 v2D MOS39 0207 E11A 2C 7C 02 BIT WRCHSW MOS39 0199 E115 v2D MOS39 0208 E11D D0 05 BNE WRCHNV ;[WRCH not to VDU] MOS39 0199 E115 v2D MOS39 0209 E11F ; WRCH to VDU MOS39 0199 E115 v2D MOS39 0210 E11F 68 PLA MOS39 0199 E115 v2D MOS39 0211 E120 48 PHA ;A := character MOS39 0199 E115 v2D MOS39 0212 E121 20 C0 C4 JSR VDU MOS39 0199 E115 v2D MOS39 0213 E124 ; C=0 => VDU says do not print character MOS39 0199 E115 v2D MOS39 0214 E124 WRCHNV ;WRCH not to VDU MOS39 0199 E115 v2D MOS39 0215 E124 MOS39 0199 E115 v2D MOS39 0216 E124 ; C=0 => VDU (if selected) says do not print character MOS39 0199 E115 v2D MOS39 0217 E124 ; check who controls printing MOS39 0199 E115 v2D MOS39 0218 E124 A9 08 LDAIM WRPRNT MOS39 0199 E115 v2D MOS39 0219 E126 2C 7C 02 BIT WRCHSW MOS39 0199 E115 v2D MOS39 0220 E129 D0 02 BNE WRCHNC ;[printing not controlled by VDU] MOS39 0199 E115 v2D MOS39 0221 E12B ; printing controlled by VDU MOS39 0199 E115 v2D MOS39 0222 E12B 90 05 BCC WRCHNP ;[VDU says do not print character] MOS39 0199 E115 v2D MOS39 0223 E12D WRCHNC ;conditionally print character MOS39 0199 E115 v2D MOS39 0224 E12D 68 PLA MOS39 0199 E115 v2D MOS39 0225 E12E 48 PHA ;A := character MOS39 0199 E115 v2D MOS39 0226 E12F 20 70 E1 JSR MPRINT ;conditionally print character MOS39 0199 E115 v2D MOS39 0227 E132 WRCHNP ;do not print character MOS39 0199 E115 v2D MOS39 0228 E132 MOS39 0199 E115 v2D MOS39 0229 E132 ; check for output to RS423 MOS39 0199 E115 v2D MOS39 0230 E132 ; MOS39 0199 E115 v2D MOS39 0231 E132 [ FALSE=0 MOS39 0199 E115 v2D MOS39 0235 E132 | MOS39 0199 E115 v2D MOS39 0236 E132 AD 7C 02 LDA WRCHSW MOS39 0199 E115 v2D MOS39 0237 E135 6A RORA ;**************** ASSUME WRRS = 1 **************** MOS39 0199 E115 v2D MOS39 0238 E136 90 1B BCC WRCHNR ;[RS423 disabled] MOS39 0199 E115 v2D MOS39 0239 E138 ] MOS39 0199 E115 v2D MOS39 0240 E138 MOS39 0199 E115 v2D MOS39 0241 E138 ; WRCH via RS423 MOS39 0199 E115 v2D MOS39 0242 E138 A4 EA LDY RSTUT MOS39 0199 E115 v2D MOS39 0243 E13A 88 DEY MOS39 0199 E115 v2D MOS39 0244 E13B 10 16 BPL WRCHNR ;[RS423 managed by CFS, ignore WRCH request] MOS39 0199 E115 v2D MOS39 0245 E13D 68 PLA MOS39 0199 E115 v2D MOS39 0246 E13E 48 PHA ;A := character MOS39 0199 E115 v2D MOS39 0247 E13F ; MOS39 0199 E115 v2D MOS39 0248 E13F 08 PHP MOS39 0199 E115 v2D MOS39 0249 E140 78 SEI MOS39 0199 E115 v2D MOS39 0250 E141 A2 02 LDXIM BRSO MOS39 0199 E115 v2D MOS39 0251 E143 48 PHA MOS39 0199 E115 v2D MOS39 0252 E144 20 BD E4 JSR EXAM MOS39 0199 E115 v2D MOS39 0253 E147 90 03 BCC WRCNP1 ;[buffer not empty] MOS39 0199 E115 v2D MOS39 0254 E149 ; RS423 output buffer empty MOS39 0199 E115 v2D MOS39 0255 E149 20 03 E2 JSR RSBUSY ;enable RS423 Tx interrupts MOS39 0199 E115 v2D MOS39 0256 E14C WRCNP1 MOS39 0199 E115 v2D MOS39 0257 E14C 68 PLA MOS39 0199 E115 v2D MOS39 0258 E14D A2 02 LDXIM BRSO MOS39 0199 E115 v2D MOS39 0259 E14F 20 67 E2 JSR WRITE ;insert character into RS423 output buffer, waiting if necessary MOS39 0199 E115 v2D MOS39 0260 E152 ; N.B. WRITE disables interrupts MOS39 0199 E115 v2D MOS39 0261 E152 ; character not inserted if ESCAPE detected MOS39 0199 E115 v2D MOS39 0262 E152 28 PLP MOS39 0199 E115 v2D MOS39 0263 E153 ; MOS39 0199 E115 v2D MOS39 0264 E153 WRCHNR ;not via RS423 MOS39 0199 E115 v2D MOS39 0265 E153 MOS39 0199 E115 v2D MOS39 0266 E153 ; check for spooling enabled MOS39 0199 E115 v2D MOS39 0267 E153 ; check whether spooling active MOS39 0199 E115 v2D MOS39 0268 E153 A9 10 LDAIM WRSPL MOS39 0199 E115 v2D MOS39 0269 E155 2C 7C 02 BIT WRCHSW MOS39 0199 E115 v2D MOS39 0270 E158 D0 0F BNE WRCHNS ;[spooling disabled] MOS39 0199 E115 v2D MOS39 0271 E15A ; spool character MOS39 0199 E115 v2D MOS39 0272 E15A AC 57 02 LDY SPOOLH MOS39 0199 E115 v2D MOS39 0273 E15D F0 0A BEQ WRCHNS ;[spooling not active] MOS39 0199 E115 v2D MOS39 0274 E15F ; spooling active MOS39 0199 E115 v2D MOS39 0275 E15F ; write byte to spool file MOS39 0199 E115 v2D MOS39 0276 E15F 68 PLA MOS39 0199 E115 v2D MOS39 0277 E160 48 PHA ;A := character MOS39 0199 E115 v2D MOS39 0278 E161 ; MOS39 0199 E115 v2D MOS39 0279 E161 38 SEC MOS39 0199 E115 v2D MOS39 0280 E162 66 EB ROR ESSEMA ;enter critical region MOS39 0199 E115 v2D MOS39 0281 E164 20 D4 FF JSR OSBPUT MOS39 0199 E115 v2D MOS39 0282 E167 46 EB LSR ESSEMA ;exit critical region MOS39 0199 E115 v2D MOS39 0283 E169 WRCHNS ;no spooling MOS39 0199 E115 v2D MOS39 0284 E169 MOS39 0199 E115 v2D MOS39 0285 E169 WRCHNN MOS39 0199 E115 v2D MOS39 0286 E169 ; exit restoring registers MOS39 0199 E115 v2D MOS39 0287 E169 68 PLA ;pull redundant byte -- MOS39 0288 E16A [ MOS125 = &FF MOS39 MOS39 MOS39 MOS39 Acorn macro assembler Page 76 MOS39 MOS39 CLI MOS39 -- MOS39 0289 E16A | -- MOS39 0290 E16A PLYXAR -- MOS39 0291 E16A ] -- MOS39 0292 E16A 68 PLA -- MOS39 0293 E16B A8 TAY -- MOS39 0294 E16C 68 PLA -- MOS39 0295 E16D AA TAX -- MOS39 0296 E16E 68 PLA ;restore character -- MOS39 0297 E16F 60 RTS -- MOS39 0298 E170 -- MOS39 0299 E170 MPRINT ;conditionally print character in A -- MOS39 0300 E170 ; N.B. character should never be NUL -- MOS39 0301 E170 ; decide whether to ignore character -- MOS39 0302 E170 2C 7C 02 BIT WRCHSW -- MOS39 0303 E173 70 20 BVS PRINT0 ;[only print thru VDU1] MOS39 0303 E173 v5F MOS39 0304 E175 CD 86 02 CMP PIGNOR MOS39 0303 E173 v5F MOS39 0305 E178 F0 1B BEQ PRINT0 ;[match on printer ignore character] MOS39 0303 E173 v5F MOS39 0306 E17A ; MOS39 0303 E173 v5F MOS39 0307 E17A ; MOS39 0303 E173 v5F MOS39 0308 E17A ; ====== MOS39 0303 E173 v5F MOS39 0309 E17A ; PRINT MOS39 0303 E173 v5F MOS39 0310 E17A ; ====== MOS39 0303 E173 v5F MOS39 0311 E17A ; MOS39 0303 E173 v5F MOS39 0312 E17A ; Print a character via VDU 1 MOS39 0303 E173 v5F MOS39 0313 E17A ; MOS39 0303 E173 v5F MOS39 0314 E17A ; ENTRY:- A = Character MOS39 0303 E173 v5F MOS39 0315 E17A ; MOS39 0303 E173 v5F MOS39 0316 E17A ; EXIT:- A,X,Y corrupt MOS39 0303 E173 v5F MOS39 0317 E17A ; Flags preserved MOS39 0303 E173 v5F MOS39 0318 E17A ; MOS39 0303 E173 v5F MOS39 0319 E17A PRINT ;used by VDU (SOH), uses fact of exit with C=0 MOS39 0303 E173 v5F MOS39 0320 E17A 08 PHP MOS39 0303 E173 v5F MOS39 0321 E17B 78 SEI MOS39 0303 E173 v5F MOS39 0322 E17C ; N.B. if print sink is 0 then character will MOS39 0303 E173 v5F MOS39 0323 E17C ; eventually be ignored by STROBE MOS39 0303 E173 v5F MOS39 0324 E17C ; MOS39 0303 E173 v5F MOS39 0325 E17C AA TAX ;save print character MOS39 0303 E173 v5F MOS39 0326 E17D ; MOS39 0303 E173 v5F MOS39 0327 E17D ; test whether printer enabled MOS39 0303 E173 v5F MOS39 0328 E17D ; MOS39 0303 E173 v5F MOS39 0329 E17D A9 04 LDAIM WRPREN MOS39 0303 E173 v5F MOS39 0330 E17F 2C 7C 02 BIT WRCHSW MOS39 0303 E173 v5F MOS39 0331 E182 D0 10 BNE PRINT4 ;[printer disabled] MOS39 0303 E173 v5F MOS39 0332 E184 ; MOS39 0303 E173 v5F MOS39 0333 E184 8A TXA ;restore print character MOS39 0303 E173 v5F MOS39 0334 E185 A2 03 LDXIM BPRNT ;X := print bufferid MOS39 0303 E173 v5F MOS39 0335 E187 20 67 E2 JSR WRITE ;write character to buffer, waiting if necessary MOS39 0303 E173 v5F MOS39 0336 E18A B0 08 BCS PRINT3 ;[ESCAPE detected] MOS39 0303 E173 v5F MOS39 0337 E18C ; MOS39 0303 E173 v5F MOS39 0338 E18C ; test printer status; interrupts disabled MOS39 0303 E173 v5F MOS39 0339 E18C ; MOS39 0303 E173 v5F MOS39 0340 E18C 2C D2 02 BIT PFLAG MOS39 0303 E173 v5F MOS39 0341 E18F 10 03 BPL PRINT3 ;[printer busy] MOS39 0303 E173 v5F MOS39 0342 E191 ; MOS39 0303 E173 v5F MOS39 0343 E191 ; printer dormant MOS39 0303 E173 v5F MOS39 0344 E191 ; send the first character MOS39 0303 E173 v5F MOS39 0345 E191 ; MOS39 0303 E173 v5F MOS39 0346 E191 20 CF E1 JSR STROBE ;send character to selected printer MOS39 0303 E173 v5F MOS39 0347 E194 ; MOS39 0303 E173 v5F MOS39 0348 E194 PRINT3 ;printer busy MOS39 0303 E173 v5F MOS39 0349 E194 PRINT4 ;return enabling interrupts MOS39 0303 E173 v5F MOS39 0350 E194 28 PLP ;restore interrupt state, set C=0 (fact used by VDU) MOS39 0303 E173 v5F MOS39 0351 E195 ; MOS39 0303 E173 v5F MOS39 0352 E195 PRINT0 MOS39 0303 E173 v5F MOS39 0353 E195 60 RTS -- MOS39 0354 E196 -- MOS39 0355 E196 -- MOS39 0356 E196 [ MOS125 = &FF -- MOS39 0357 E196 | -- MOS39 0358 E196 FLUSHC ;flush buffer -- MOS39 0359 E196 D0 0F BNE JFLUSH ;[flush currently selected input buffer] MOS39 0359 E196 v70 MOS39 0360 E198 ; X=0 => flush all buffers MOS39 0359 E196 v70 MOS39 0361 E198 FLSHAL ;flush all buffers MOS39 0359 E196 v70 MOS39 0362 E198 A2 08 LDXIM BUPB MOS39 0359 E196 v70 MOS39 0363 E19A FLUSH3 MOS39 0359 E196 v70 MOS39 0364 E19A ; allow interrupts MOS39 0359 E196 v70 MOS39 0365 E19A 58 CLI MOS39 0359 E196 v70 MOS39 0366 E19B 78 SEI MOS39 0359 E196 v70 MOS39 0367 E19C 20 A2 E1 JSR FLUSHS ;flush buffer given by X MOS39 0359 E196 v70 MOS39 0368 E19F CA DEX MOS39 0359 E196 v70 MOS39 0369 E1A0 10 F8 BPL FLUSH3 MOS39 0359 E196 v70 MOS39 0370 E1A2 ; MOS39 0359 E196 v70 MOS39 0371 E1A2 ; N.B. X<0, so is an invalid bufferid (and will be ignored by FLUSHS) MOS39 0359 E196 v70 MOS39 0372 E1A2 ; MOS39 0359 E196 v70 MOS39 0373 E1A2 FLUSHS ;flush specific buffer MOS39 0359 E196 v70 MOS39 0374 E1A2 E0 09 CPXIM BUPB +&01 MOS39 0359 E196 v70 MOS39 0375 E1A4 90 04 BCC FLUSH2 ;[valid bufferid] MOS39 0359 E196 v70 MOS39 0376 E1A6 ; invalid bufferid MOS39 0359 E196 v70 MOS39 0377 E1A6 60 RTS MOS39 0359 E196 v70 MOS39 0378 E1A7 MOS39 0359 E196 v70 MOS39 0379 E1A7 JFLUSH ;flush input buffer and clear soft key expansion MOS39 0359 E196 v70 MOS39 0380 E1A7 AE 41 02 LDX RDCHSW ;X := input bufferid MOS39 0375 E1A4 v7B MOS39 0381 E1AA FLUSH2 MOS39 0375 E1A4 v7B MOS39 0382 E1AA STROB4 ;not user print MOS39 0375 E1A4 v7B MOS39 0383 E1AA STCRS ;RS423 managed by cassette MOS39 0375 E1A4 v7B MOS39 0384 E1AA ; ignore print request by purging buffer AND return MOS39 0375 E1A4 v7B MOS39 0385 E1AA PURGE MOS39 0375 E1A4 v7B MOS39 0386 E1AA ; purge buffer given by index in X MOS39 0375 E1A4 v7B MOS39 0387 E1AA ; this routine does not corrupt A or X MOS39 0375 E1A4 v7B MOS39 0388 E1AA 18 CLC MOS39 0481 E1FE ^2A MOS39 0389 E1AB ; MOS39 0481 E1FE ^2A MOS39 0390 E1AB PURGEX ;entered by OSWORD sound routine with C=1 MOS39 0481 E1FE ^2A MOS39 0391 E1AB 48 PHA ;save A MOS39 0481 E1FE ^2A MOS39 0392 E1AC 08 PHP ;save interrupt state MOS39 0481 E1FE ^2A MOS39 0393 E1AD 78 SEI MOS39 0481 E1FE ^2A MOS39 0394 E1AE ; MOS39 0481 E1FE ^2A MOS39 0395 E1AE ; kill sound channel if sound buffer MOS39 0481 E1FE ^2A MOS39 0396 E1AE B0 08 BCS PURNSB ;[OSWORD call so do not kill sound] MOS39 0481 E1FE ^2A MOS39 0397 E1B0 BD D0 E9 LDAAX BUFTYP MOS39 0481 E1FE ^2A MOS39 0398 E1B3 10 03 BPL PURNSB ;[not a sound buffer] MOS39 0481 E1FE ^2A MOS39 0399 E1B5 ; kill sound on channel X MOS39 0481 E1FE ^2A MOS39 0400 E1B5 20 E3 EC JSR SCRST MOS39 0481 E1FE ^2A MOS39 0401 E1B8 PURNSB MOS39 0481 E1FE ^2A MOS39 0402 E1B8 ; MOS39 0481 E1FE ^2A MOS39 0403 E1B8 ; check for input buffer MOS39 0481 E1FE ^2A MOS39 0404 E1B8 E0 02 CPXIM OUTPUT MOS39 0481 E1FE ^2A MOS39 0405 E1BA B0 08 BCS VAULT ;[output buffer] MOS39 0481 E1FE ^2A MOS39 0406 E1BC ; MOS39 0481 E1FE ^2A MOS39 0407 E1BC ; input buffer, kill soft key expansion and VDU queueing MOS39 0481 E1FE ^2A MOS39 0408 E1BC ; MOS39 0481 E1FE ^2A MOS39 0409 E1BC A9 00 LDAIM ZERO MOS39 MOS39 MOS39 MOS39 Acorn macro assembler Page 77 MOS39 MOS39 CLI MOS39 MOS39 0481 E1FE ^2A MOS39 0410 E1BE 8D 68 02 STA SOFKL ;kill soft key expansion MOS39 0481 E1FE ^2A MOS39 0411 E1C1 8D 6A 02 STA QPOSN ;kill VDU queueing MOS39 0481 E1FE ^2A MOS39 0412 E1C4 ; MOS39 0481 E1FE ^2A MOS39 0413 E1C4 ;if input buffer OR first output buffer i.e. RS423 MOS39 0481 E1FE ^2A MOS39 0414 E1C4 ;then Z=1; buffer flag unused, preserve MOS39 0481 E1FE ^2A MOS39 0415 E1C4 F0 03 VAULT BEQ PURGE3 MOS39 0481 E1FE ^2A MOS39 0416 E1C6 ;otherwise C=1 MOS39 0481 E1FE ^2A MOS39 0417 E1C6 ; flag buffer dormant MOS39 0481 E1FE ^2A MOS39 0418 E1C6 7E CF 02 RORAX BACTIV MOS39 0481 E1FE ^2A MOS39 0419 E1C9 ;CNPV routine ignores C when V=1 MOS39 0481 E1FE ^2A MOS39 0420 E1C9 ; MOS39 0481 E1FE ^2A MOS39 0421 E1C9 PURGE3 MOS39 0481 E1FE ^2A MOS39 0422 E1C9 ; MOS39 0481 E1FE ^2A MOS39 0423 E1C9 20 9B E7 JSR JMIPUR ;use indirection with V=1 (defaults to CNP) MOS39 0481 E1FE ^2A MOS39 0424 E1CC ; MOS39 0481 E1FE ^2A MOS39 0425 E1CC 28 PLP ;restore interrupt state MOS39 0481 E1FE ^2A MOS39 0426 E1CD 68 PLA ;restore A MOS39 0481 E1FE ^2A MOS39 0427 E1CE 60 RTS MOS39 0481 E1FE ^2A MOS39 0428 E1CF ] MOS39 0481 E1FE ^2A MOS39 0429 E1CF MOS39 0481 E1FE ^2A MOS39 0430 E1CF STROBE ;send character to selected printer MOS39 0481 E1FE ^2A MOS39 0431 E1CF ; **************************************** MOS39 0481 E1FE ^2A MOS39 0432 E1CF ; MUST BE ENTERED WITH INTERRUPTS DISABLED MOS39 0481 E1FE ^2A MOS39 0433 E1CF ; ********************************** MOS39 0481 E1FE ^2A MOS39 0434 E1CF ; determine print sink MOS39 0481 E1FE ^2A MOS39 0435 E1CF AD 85 02 LDA PRNTSW MOS39 0481 E1FE ^2A MOS39 0436 E1D2 F0 D6 BEQ PURGE ;[ignore print request] MOS39 0481 E1FE ^2A MOS39 0437 E1D4 ; print sink determined by PRNTSW MOS39 0481 E1FE ^2A MOS39 0438 E1D4 ; 0: infinite print sink MOS39 0481 E1FE ^2A MOS39 0439 E1D4 ; 1: centronics MOS39 0481 E1FE ^2A MOS39 0440 E1D4 ; 2: RS423 output MOS39 0481 E1FE ^2A MOS39 0441 E1D4 ; 3: user print routine MOS39 0481 E1FE ^2A MOS39 0442 E1D4 ; 4: net printer server MOS39 0481 E1FE ^2A MOS39 0443 E1D4 [ MOS125 = &FF MOS39 0481 E1FE ^2A MOS39 0446 E1D4 | MOS39 0481 E1FE ^2A MOS39 0447 E1D4 C9 02 CMPIM PRS MOS39 0481 E1FE ^2A MOS39 0448 E1D6 B0 21 BCS STROB1 ;[not centronics] MOS39 0481 E1FE ^2A MOS39 0449 E1D8 ] MOS39 0481 E1FE ^2A MOS39 0450 E1D8 ; centronics interface MOS39 0481 E1FE ^2A MOS39 0451 E1D8 ; this code must be executed with interrupts disabled MOS39 0481 E1FE ^2A MOS39 0452 E1D8 ; otherwise a CA1 interrupt coinciding with the STA PAR MOS39 0481 E1FE ^2A MOS39 0453 E1D8 ; would result in a spurious interrupt which would not MOS39 0481 E1FE ^2A MOS39 0454 E1D8 ; be recognised, resulting in a 'Bad IRQ' state MOS39 0481 E1FE ^2A MOS39 0455 E1D8 20 C2 E4 JSR REMOV ;remove character from print buffer MOS39 0481 E1FE ^2A MOS39 0456 E1DB 6E D2 02 ROR PFLAG MOS39 0481 E1FE ^2A MOS39 0457 E1DE 30 43 BMI STROB0 ;[no more characters to print] MOS39 0481 E1FE ^2A MOS39 0458 E1E0 A0 82 LDYIM &82 MOS39 0481 E1FE ^2A MOS39 0459 E1E2 8C 6E FE STY IERR ;enable parallel port printer interrupt MOS39 0481 E1FE ^2A MOS39 0460 E1E5 ; write character MOS39 0481 E1FE ^2A MOS39 0461 E1E5 8D 61 FE STA PAR MOS39 0481 E1FE ^2A MOS39 0462 E1E8 ; pulse strobe line MOS39 0481 E1FE ^2A MOS39 0463 E1E8 AD 6C FE LDA PCRR MOS39 0481 E1FE ^2A MOS39 0464 E1EB 29 F1 ANDIM &F1 ;********** DO NOT CHANGE MOS39 0481 E1FE ^2A MOS39 0465 E1ED 09 0C ORAIM CA2LO ;********** DO NOT CHANGE MOS39 0481 E1FE ^2A MOS39 0466 E1EF 8D 6C FE STA PCRR ;CA2 strobe lo (signal inverted by h/w) MOS39 0481 E1FE ^2A MOS39 0467 E1F2 09 0E ORAIM CA2HI ;********** DO NOT CHANGE MOS39 0481 E1FE ^2A MOS39 0468 E1F4 8D 6C FE STA PCRR ;CA2 strobe hi (signal inverted by h/w) MOS39 0481 E1FE ^2A MOS39 0469 E1F7 ; N.B. leave signal hi MOS39 0481 E1FE ^2A MOS39 0470 E1F7 D0 2A BNE STROB0 ;[ALWAYS jump, exit] MOS39 0481 E1FE ^2A MOS39 0471 E1F9 MOS39 0481 E1FE ^2A MOS39 0472 E1F9 STROB1 ;not centronics MOS39 0481 E1FE ^2A MOS39 0473 E1F9 ; X = bufferid MOS39 0481 E1FE ^2A MOS39 0474 E1F9 [ MOS125 = &FF MOS39 0481 E1FE ^2A MOS39 0476 E1F9 ] MOS39 0481 E1FE ^2A MOS39 0477 E1F9 D0 29 BNE STROB3 ;[not RS423] MOS39 0481 E1FE ^2A MOS39 0478 E1FB ; printer is RS423 MOS39 0481 E1FE ^2A MOS39 0479 E1FB A4 EA LDY RSTUT MOS39 0481 E1FE ^2A MOS39 0480 E1FD 88 DEY MOS39 0481 E1FE ^2A MOS39 0481 E1FE 10 AA BPL STCRS ;[RS423 printer managed by CFS, ignore print request] MOS39 0457 E1DE v3C MOS39 0482 E200 ; print to RS423 MOS39 0457 E1DE v3C MOS39 0483 E200 4E D2 02 LSR PFLAG ;flag printer busy MOS39 0457 E1DE v3C MOS39 0484 E203 ; MOS39 0457 E1DE v3C MOS39 0485 E203 RSBUSY MOS39 0457 E1DE v3C MOS39 0486 E203 4E 4F 02 LSR RSFLAG ;flag RS423 busy MOS39 0457 E1DE v3C MOS39 0487 E206 ; MOS39 0457 E1DE v3C MOS39 0488 E206 RSETX ;enable RS423 Tx interrupts MOS39 0457 E1DE v3C MOS39 0489 E206 20 A1 E7 JSR CNTRS MOS39 0457 E1DE v3C MOS39 0490 E209 90 18 BCC RSOVF ;[RS423 input buffer overflow] MOS39 0457 E1DE v3C MOS39 0491 E20B ; MOS39 0457 E1DE v3C MOS39 0492 E20B A2 20 LDXIM RHITXE ;set RTS hi, Tx interrupt enabled MOS39 0457 E1DE v3C MOS39 0493 E20D ; MOS39 0457 E1DE v3C MOS39 0494 E20D RSED ;alter Tx control register to X MOS39 0457 E1DE v3C MOS39 0495 E20D A0 9F LDYIM &9F ;field is b6-b5 MOS39 0457 E1DE v3C MOS39 0496 E20F ; MOS39 0457 E1DE v3C MOS39 0497 E20F RS423 MOS39 0457 E1DE v3C MOS39 0498 E20F 08 PHP MOS39 0457 E1DE v3C MOS39 0499 E210 78 SEI MOS39 0457 E1DE v3C MOS39 0500 E211 98 TYA ;A := mask MOS39 0457 E1DE v3C MOS39 0501 E212 ; ***************************************** MOS39 0457 E1DE v3C MOS39 0502 E212 ; MUST BE EXECUTED WITH INTERRUPTS DISABLED MOS39 0457 E1DE v3C MOS39 0503 E212 ; ***************************************** MOS39 0457 E1DE v3C MOS39 0504 E212 ; A = mask (altered) MOS39 0457 E1DE v3C MOS39 0505 E212 ; X = new value MOS39 0457 E1DE v3C MOS39 0506 E212 86 FA STX RSOP ;save new value of field MOS39 0457 E1DE v3C MOS39 0507 E214 2D 50 02 AND RSCTFL ;copy status and clear field for new status MOS39 0457 E1DE v3C MOS39 0508 E217 45 FA EOR RSOP ;add in new status MOS39 0457 E1DE v3C MOS39 0509 E219 AE 50 02 LDX RSCTFL ;X := old value MOS39 0457 E1DE v3C MOS39 0510 E21C STARSC ;used by MC6850 N.B. does PLP RTS MOS39 0457 E1DE v3C MOS39 0511 E21C MOS39 0457 E1DE v3C MOS39 0512 E21C 8D 50 02 STA RSCTFL ;update record of status MOS39 0457 E1DE v3C MOS39 0513 E21F 8D 08 FE STA RSCTL ;update 6850 MOS39 0457 E1DE v3C MOS39 0514 E222 28 PLP MOS39 0457 E1DE v3C MOS39 0515 E223 RSOVF ;RS423 input buffer overflow MOS39 0457 E1DE v3C MOS39 0516 E223 STROB0 MOS39 0457 E1DE v3C MOS39 0517 E223 60 RTS MOS39 0477 E1F9 v56 MOS39 0518 E224 MOS39 0477 E1F9 v56 MOS39 0519 E224 STROB3 ;not RS423 MOS39 0477 E1F9 v56 MOS39 0520 E224 MOS39 0477 E1F9 v56 MOS39 0521 E224 18 CLC -- MOS39 0522 E225 -- MOS39 0523 E225 ; C=0 -- MOS39 0524 E225 ; user or net print -- MOS39 0525 E225 ; X=print_bufferid -- MOS39 0526 E225 ; character in printer buffer -- MOS39 0527 E225 A9 01 LDAIM UPWRCH -- MOS39 0528 E227 20 35 E2 JSR mUPT ;call print routine (returns with carry meaningful) -- MOS39 0529 E22A PFREE ;indicate printer dormant (OSBYTE call used by UPT routine) -- MOS39 0530 E22A 6E D2 02 ROR PFLAG ;set printer status according to user print routine -- MOS39 0531 E22D ; C=0 => printer busy -- MOS39 0532 E22D ; C=1 => printer free -- MOS39 0533 E22D ; (default user print routine is DEFUPT) MOS39 MOS39 MOS39 MOS39 Acorn macro assembler Page 78 MOS39 MOS39 CLI MOS39 -- MOS39 0534 E22D UPTRTS -- MOS39 0535 E22D 60 RTS MOS39 0540 E231 ^7A MOS39 0536 E22E MOS39 0540 E231 ^7A MOS39 0537 E22E MOS39 0540 E231 ^7A MOS39 0538 E22E UPTINT ;timer interrupt MOS39 0540 E231 ^7A MOS39 0539 E22E 2C D2 02 BIT PFLAG MOS39 0540 E231 ^7A MOS39 0540 E231 30 FA BMI UPTRTS ;[printer dormant] -- MOS39 0541 E233 ; -- MOS39 0542 E233 ; give a hand to polled printers -- MOS39 0543 E233 A9 00 LDAIM UPTIME -- MOS39 0544 E235 ; -- MOS39 0545 E235 MUPT ;call user print routine (also used by VDU software) -- MOS39 0546 E235 ; A = reason code ($02/$03) -- MOS39 0547 E235 A2 03 LDXIM BPRNT ;X := print buffer id -- MOS39 0548 E237 ; -- MOS39 0549 E237 UPTX ;entered by *FX5 -- MOS39 0550 E237 AC 85 02 LDY PRNTSW ;Y := current print selection -- MOS39 0551 E23A 20 DF E5 JSR JMINET ;call net print routine -- MOS39 0552 E23D 6C 22 02 JMI UPTVEC ;call user print routine AND return -- MOS39 0553 E240 -- MOS39 0554 E240 -- MOS39 0555 E240 [ MOS125 = &FF -- MOS39 0598 E240 ] -- MOS39 0599 E240 ; -- MOS39 0600 E240 ; -- MOS39 0601 E240 CNP ;count buffer entries / purge buffer -- MOS39 0602 E240 [ $Tutu -- MOS39 0605 E240 | -- MOS39 0606 E240 50 07 BVC COUNT ;[count buffer entries] MOS39 0606 E240 v78 MOS39 0607 E242 ] MOS39 0606 E240 v78 MOS39 0608 E242 ; MOS39 0606 E240 v78 MOS39 0609 E242 ; purge buffer MOS39 0606 E240 v78 MOS39 0610 E242 ; MOS39 0606 E240 v78 MOS39 0611 E242 ; reset buffer pointers MOS39 0606 E240 v78 MOS39 0612 E242 ; set buffer start = buffer end MOS39 0606 E240 v78 MOS39 0613 E242 BD D8 02 LDAAX BFSTRT MOS39 0606 E240 v78 MOS39 0614 E245 9D E1 02 STAAX BFEND MOS39 0606 E240 v78 MOS39 0615 E248 60 RTS MOS39 0606 E240 v78 MOS39 0616 E249 ; MOS39 0606 E240 v78 MOS39 0617 E249 ; MOS39 0606 E240 v78 MOS39 0618 E249 COUNT MOS39 0606 E240 v78 MOS39 0619 E249 08 PHP -- MOS39 0620 E24A 78 SEI -- MOS39 0621 E24B ; -- MOS39 0622 E24B 08 PHP ;save count type -- MOS39 0623 E24C ; -- MOS39 0624 E24C 38 SEC -- MOS39 0625 E24D BD E1 02 LDAAX BFEND -- MOS39 0626 E250 FD D8 02 SBCAX BFSTRT -- MOS39 0627 E253 B0 04 BCS BUFNX1 MOS39 0627 E253 v7B MOS39 0628 E255 ; adjust for overflow MOS39 0627 E253 v7B MOS39 0629 E255 38 SEC MOS39 0627 E253 v7B MOS39 0630 E256 FD A9 E4 SBCAX BFORG MOS39 0627 E253 v7B MOS39 0631 E259 BUFNX1 MOS39 0627 E253 v7B MOS39 0632 E259 ; MOS39 0627 E253 v7B MOS39 0633 E259 28 PLP ;restore count type -- MOS39 0634 E25A ; -- MOS39 0635 E25A 90 06 BCC BFCNT0 ;[input buffer] MOS39 0635 E25A v79 MOS39 0636 E25C ; MOS39 0635 E25A v79 MOS39 0637 E25C ; output buffer MOS39 0635 E25A v79 MOS39 0638 E25C ; adjust to give remaining entries MOS39 0635 E25A v79 MOS39 0639 E25C 18 CLC MOS39 0635 E25A v79 MOS39 0640 E25D 7D A9 E4 ADCAX BFORG MOS39 0635 E25A v79 MOS39 0641 E260 49 FF EORIM &FF MOS39 0635 E25A v79 MOS39 0642 E262 ; MOS39 0635 E25A v79 MOS39 0643 E262 BFCNT0 MOS39 0635 E25A v79 MOS39 0644 E262 A0 00 LDYIM ZERO -- MOS39 0645 E264 AA TAX -- MOS39 0646 E265 ; -- MOS39 0647 E265 28 PLP -- MOS39 0648 E266 60 RTS -- MOS39 0649 E267 -- MOS39 0650 E267 -- MOS39 0651 E267 LNK MOS40 -- MOS40 0001 E267 -- MOS40 0002 E267 ; MOS40 -- MOS40 0003 E267 TTL MOS40 Machine operating system internal commands -- MOS40 0004 E267 OPT MOS40 MOS40 MOS40 MOS40 MOS40 Acorn macro assembler Page 79 MOS40 MOS40 Machine operating system internal commands MOS40 -- MOS40 0005 E267 ;(c) 1981 ACORN Computers Limited -- MOS40 0006 E267 ;BBC Microcomputer Machine Operating System (MOS) -- MOS40 0007 E267 ;Change record: -- MOS40 0008 E267 ;033 12-Aug-81 PB Reset SKNEND code, check KEY line termination -- MOS40 0009 E267 ;032 12-Aug-81 PB Extracted from CLI code -- MOS40 0010 E267 ;Author(s): -- MOS40 0011 E267 ;PB Paul Bond -- MOS40 0012 E267 ;MP Mike Prees -- MOS40 0013 E267 -- MOS40 0014 E267 -- MOS40 0015 E267 WRITE -- MOS40 0016 E267 WRITE1 -- MOS40 0017 E267 78 SEI ;another critical region MOS40 0039 E27A ^6B MOS40 0018 E268 20 12 E5 JSR INSRT ;attempt to add character to print queue MOS40 0039 E27A ^6B MOS40 0019 E26B 90 0F BCC WRITE0 ;[character inserted into printer buffer] MOS40 0039 E27A ^6B MOS40 0020 E26D ; printer buffer full MOS40 0039 E27A ^6B MOS40 0021 E26D ; C=1 MOS40 0039 E27A ^6B MOS40 0022 E26D 20 0D EA JSR LEDSON ;conditionally set LEDs and test escape condition MOS40 0039 E27A ^6B MOS40 0023 E270 ; N.B. does not corrupt C or X MOS40 0039 E27A ^6B MOS40 0024 E270 ; C=1 MOS40 0039 E27A ^6B MOS40 0025 E270 ; reset LEDs MOS40 0039 E27A ^6B MOS40 0026 E270 08 PHP MOS40 0039 E27A ^6B MOS40 0027 E271 48 PHA MOS40 0039 E27A ^6B MOS40 0028 E272 20 22 EF JSR KBDIS MOS40 0039 E27A ^6B MOS40 0029 E275 68 PLA MOS40 0039 E27A ^6B MOS40 0030 E276 28 PLP MOS40 0039 E27A ^6B MOS40 0031 E277 ; MOS40 0039 E27A ^6B MOS40 0032 E277 30 03 BMI WRITE0 ;[escape detected] MOS40 0039 E27A ^6B MOS40 0033 E279 58 CLI ;enable interrupts to allow printer buffer to purge. MOS40 0039 E27A ^6B MOS40 0034 E27A ; Interrupts are enabled at this part of the loop, MOS40 0039 E27A ^6B MOS40 0035 E27A ; rather than at the begining (which would save 2 bytes of code) MOS40 0039 E27A ^6B MOS40 0036 E27A ; in order to ensure that if the print routine is called with MOS40 0039 E27A ^6B MOS40 0037 E27A ; interrupts disabled, then interrupts are not enabled if there is MOS40 0039 E27A ^6B MOS40 0038 E27A ; room in the print buffer. MOS40 0039 E27A ^6B MOS40 0039 E27A B0 EB BCS WRITE1 ;[ALWAYS jump, wait for room in printer buffer, C=1] MOS40 0019 E26B v70 MOS40 0040 E27C WRITE0 MOS40 0019 E26B v70 MOS40 0041 E27C 60 RTS -- MOS40 0042 E27D -- MOS40 0043 E27D -- MOS40 0044 E27D CLRFB ;clear file control block -- MOS40 0045 E27D 48 PHA -- MOS40 0046 E27E A9 00 LDAIM ZERO -- MOS40 0047 E280 9D EE 02 STAAX FBLOCK -- MOS40 0048 E283 9D EF 02 STAAX FBLOCK +&01 -- MOS40 0049 E286 9D F0 02 STAAX FBLOCK +&02 -- MOS40 0050 E289 9D F1 02 STAAX FBLOCK +&03 -- MOS40 0051 E28C 68 PLA -- MOS40 0052 E28D 60 RTS -- MOS40 0053 E28E [ MOS125 = &FF -- MOS40 0076 E28E | -- MOS40 0077 E28E 20 9D E0 LSA JSR SKIPSP -- MOS40 0078 E291 20 EB E0 JSR TSTHEX -- MOS40 0079 E294 90 1F BCC LSA0 ;[hex not present, return V=1] MOS40 0079 E294 v60 MOS40 0080 E296 ; MOS40 0079 E294 v60 MOS40 0081 E296 ; clear field MOS40 0079 E294 v60 MOS40 0082 E296 ; MOS40 0079 E294 v60 MOS40 0083 E296 20 7D E2 JSR CLRFB MOS40 0079 E294 v60 MOS40 0084 E299 ; MOS40 0079 E294 v60 MOS40 0085 E299 ; read address MOS40 0079 E294 v60 MOS40 0086 E299 ; MOS40 0079 E294 v60 MOS40 0087 E299 LSA1 ;rotate hex digit into 4-byte address MOS40 0079 E294 v60 MOS40 0088 E299 ; move nibble into high nibble MOS40 0079 E294 v60 MOS40 0089 E299 ;set b3, clear b2..0 MOS40 0079 E294 v60 MOS40 0090 E299 ;SEC ;C=1 from BCC LSA0 (CLRFB preserves) or BCS LSA1 MOS40 0079 E294 v60 MOS40 0091 E299 2A ROLA MOS40 0079 E294 v60 MOS40 0092 E29A 0A ASLA MOS40 0079 E294 v60 MOS40 0093 E29B 0A ASLA MOS40 0079 E294 v60 MOS40 0094 E29C 0A ASLA MOS40 0079 E294 v60 MOS40 0095 E29D ;shift once more. C=hex b3, A b4=1, b3..0=0 MOS40 0079 E294 v60 MOS40 0096 E29D 0A ASLA MOS40 0079 E294 v60 MOS40 0097 E29E ROL4A ;rotate bit into address MOS40 0079 E294 v60 MOS40 0098 E29E 3E EE 02 ROLAX FBLOCK MOS40 0079 E294 v60 MOS40 0099 E2A1 3E EF 02 ROLAX FBLOCK +&01 MOS40 0079 E294 v60 MOS40 0100 E2A4 3E F0 02 ROLAX FBLOCK +&02 MOS40 0079 E294 v60 MOS40 0101 E2A7 3E F1 02 ROLAX FBLOCK +&03 MOS40 0079 E294 v60 MOS40 0102 E2AA B0 35 BCS MBADHX ;[overflow] MOS40 0102 E2AA v4A MOS40 0103 E2AC ; C=0 MOS40 0102 E2AA v4A MOS40 0104 E2AC 0A ASLA MOS40 0102 E2AA v4A MOS40 0105 E2AD D0 EF BNE ROL4A ;execute loop four times MOS40 0102 E2AA v4A MOS40 0106 E2AF ; C=1 which TSTHEX ignores MOS40 0102 E2AA v4A MOS40 0107 E2AF 20 EB E0 JSR TSTHEX MOS40 0102 E2AA v4A MOS40 0108 E2B2 B0 E5 BCS LSA1 MOS40 0102 E2AA v4A MOS40 0109 E2B4 38 SEC ;return C=1 MOS40 0102 E2AA v4A MOS40 0110 E2B5 LSA0 ;Z=1 => CR terminator MOS40 0102 E2AA v4A MOS40 0111 E2B5 60 RTS MOS40 0102 E2AA v4A MOS40 0112 E2B6 ] MOS40 0102 E2AA v4A MOS40 0113 E2B6 MOS40 0102 E2AA v4A MOS40 0114 E2B6 MOS40 0102 E2AA v4A MOS40 0115 E2B6 LOAD ;LOAD [load address] MOS40 0102 E2AA v4A MOS40 0116 E2B6 A9 FF LDAIM &FF MOS40 0102 E2AA v4A MOS40 0117 E2B8 SAVE ;(A=$00) SAVE [exechex] [loadhex] MOS40 0102 E2AA v4A MOS40 0118 E2B8 86 F2 STX WORK MOS40 0102 E2AA v4A MOS40 0119 E2BA 84 F3 STY WORK +&01 MOS40 0102 E2AA v4A MOS40 0120 E2BC 8E EE 02 STX FBLOCK+FSTR+&0 MOS40 0102 E2AA v4A MOS40 0121 E2BF 8C EF 02 STY FBLOCK+FSTR+&1 MOS40 0102 E2AA v4A MOS40 0122 E2C2 48 PHA MOS40 0102 E2AA v4A MOS40 0123 E2C3 ; clear load address MOS40 0102 E2AA v4A MOS40 0124 E2C3 A2 02 LDXIM FLOAD MOS40 0102 E2AA v4A MOS40 0125 E2C5 20 7D E2 JSR CLRFB MOS40 0102 E2AA v4A MOS40 0126 E2C8 ; set lsb exec address = $FF (preparing for possible LOAD) MOS40 0102 E2AA v4A MOS40 0127 E2C8 A0 FF LDYIM &FF MOS40 0102 E2AA v4A MOS40 0128 E2CA 8C F4 02 STY FBLOCK+FEXEC ;'use file load address' MOS40 0102 E2AA v4A MOS40 0129 E2CD ; set to read characters from WORK buffer MOS40 0102 E2AA v4A MOS40 0130 E2CD C8 INY ;Y:=0 MOS40 0102 E2AA v4A MOS40 0131 E2CE ; skip filename MOS40 0102 E2AA v4A MOS40 0132 E2CE 20 96 EA JSR GSINTC MOS40 0102 E2AA v4A MOS40 0133 E2D1 20 A8 EA LS2 JSR GSREAD MOS40 0102 E2AA v4A MOS40 0134 E2D4 90 FB BCC LS2 ;[string character] MOS40 0102 E2AA v4A MOS40 0135 E2D6 ; determine command type MOS40 0102 E2AA v4A MOS40 0136 E2D6 68 PLA MOS40 0102 E2AA v4A MOS40 0137 E2D7 48 PHA MOS40 0102 E2AA v4A MOS40 0138 E2D8 F0 4D BEQ SAVEX ;[SAVE command] MOS40 0138 E2D8 v32 MOS40 0139 E2DA ; LOAD command MOS40 0138 E2D8 v32 MOS40 0140 E2DA ; MOS40 0138 E2D8 v32 MOS40 0141 E2DA ; read load address MOS40 0138 E2D8 v32 MOS40 0142 E2DA ; N.B. X=FLOAD MOS40 0138 E2D8 v32 MOS40 0143 E2DA 20 8E E2 JSR LSA MOS40 0138 E2D8 v32 MOS40 0144 E2DD B0 3B BCS LOADX1 ;hex present MOS40 0138 E2D8 v32 MOS40 0145 E2DF F0 3E BEQ LS0 ;[just CR terminator] MOS40 0138 E2D8 v32 MOS40 0146 E2E1 MBADHX ;report error 'Bad address' MOS40 0138 E2D8 v32 MOS40 0147 E2E1 00 BRK MOS40 MOS40 MOS40 MOS40 Acorn macro assembler Page 80 MOS40 MOS40 Machine operating system internal commands MOS40 MOS40 0138 E2D8 v32 MOS40 0148 E2E2 FC = BADADR MOS40 0138 E2D8 v32 MOS40 0149 E2E3 42 61 64 = "Bad address" MOS40 0138 E2D8 v32 MOS40 0150 E2EE 00 = ZERO ;message terminator MOS40 0138 E2D8 v32 MOS40 0151 E2EF MOS40 0138 E2D8 v32 MOS40 0152 E2EF MOS40 0138 E2D8 v32 MOS40 0153 E2EF SHUTES ;shut EXEC and SPOOL files MOS40 0138 E2D8 v32 MOS40 0154 E2EF MOS40 0138 E2D8 v32 MOS40 0155 E2EF ; MOS40 0138 E2D8 v32 MOS40 0156 E2EF ; inform paged ROMs of intentions MOS40 0138 E2D8 v32 MOS40 0157 E2EF ; MOS40 0138 E2D8 v32 MOS40 0158 E2EF A2 10 LDXIM SVSHES MOS40 0138 E2D8 v32 MOS40 0159 E2F1 20 6C F1 JSR SVOP MOS40 0138 E2D8 v32 MOS40 0160 E2F4 F0 23 BEQ SPOOL0 ;[claimed, do not close files] MOS40 0138 E2D8 v32 MOS40 0161 E2F6 ; MOS40 0138 E2D8 v32 MOS40 0162 E2F6 ; deal with EXEC file MOS40 0138 E2D8 v32 MOS40 0163 E2F6 ; MOS40 0138 E2D8 v32 MOS40 0164 E2F6 20 C1 F6 JSR ECLOSE ;Close EXEC file MOS40 0138 E2D8 v32 MOS40 0165 E2F9 ; MOS40 0138 E2D8 v32 MOS40 0166 E2F9 ; close SPOOL file AND return MOS40 0138 E2D8 v32 MOS40 0167 E2F9 ; MOS40 0138 E2D8 v32 MOS40 0168 E2F9 A9 00 LDAIM ZERO ;Z=1, A=$00 MOS40 0138 E2D8 v32 MOS40 0169 E2FB ; MOS40 0138 E2D8 v32 MOS40 0170 E2FB SPOOL ;SPOOL MOS40 0138 E2D8 v32 MOS40 0171 E2FB ; XY -> filename MOS40 0138 E2D8 v32 MOS40 0172 E2FB ; A = $00 MOS40 0138 E2D8 v32 MOS40 0173 E2FB ; EQ -> spool off MOS40 0138 E2D8 v32 MOS40 0174 E2FB ;remember whether to just turn spooling off MOS40 0138 E2D8 v32 MOS40 0175 E2FB 08 PHP MOS40 0138 E2D8 v32 MOS40 0176 E2FC ; close old spool file MOS40 0138 E2D8 v32 MOS40 0177 E2FC 84 E6 STY SPOOLY ;save Y MOS40 0138 E2D8 v32 MOS40 0178 E2FE AC 57 02 LDY SPOOLH MOS40 0138 E2D8 v32 MOS40 0179 E301 8D 57 02 STA SPOOLH ;clear spooling MOS40 0138 E2D8 v32 MOS40 0180 E304 F0 03 BEQ SPOOL2 ;[not currently spooling] MOS40 0138 E2D8 v32 MOS40 0181 E306 ; A=0 MOS40 0138 E2D8 v32 MOS40 0182 E306 20 CE FF JSR OSFIND ;close spool file MOS40 0138 E2D8 v32 MOS40 0183 E309 SPOOL2 MOS40 0138 E2D8 v32 MOS40 0184 E309 A4 E6 LDY SPOOLY ;restore Y MOS40 0138 E2D8 v32 MOS40 0185 E30B 28 PLP MOS40 0138 E2D8 v32 MOS40 0186 E30C F0 0B BEQ SPOOL0 ;[just close spool file] MOS40 0138 E2D8 v32 MOS40 0187 E30E ; open given spool file MOS40 0138 E2D8 v32 MOS40 0188 E30E A9 80 LDAIM &80 ;open file for output MOS40 0138 E2D8 v32 MOS40 0189 E310 20 CE FF JSR OSFIND MOS40 0138 E2D8 v32 MOS40 0190 E313 A8 TAY MOS40 0138 E2D8 v32 MOS40 0191 E314 F0 5D BEQ BADFX ;[open failure] MOS40 0191 E314 v22 MOS40 0192 E316 8D 57 02 STA SPOOLH MOS40 0191 E314 v22 MOS40 0193 E319 SPOOL0 ;Z=1 MOS40 0191 E314 v22 MOS40 0194 E319 60 RTS MOS40 0191 E314 v22 MOS40 0195 E31A MOS40 0191 E314 v22 MOS40 0196 E31A MOS40 0191 E314 v22 MOS40 0197 E31A LOADX1 ;explicit load address given MOS40 0191 E314 v22 MOS40 0198 E31A D0 57 BNE BADFX ;[no CR terminator] MOS40 0191 E314 v22 MOS40 0199 E31C EE F4 02 INC FBLOCK+FEXEC ;use explicit load address MOS40 0191 E314 v22 MOS40 0200 E31F LS0 ;load file MOS40 0191 E314 v22 MOS40 0201 E31F A2 EE LDXIM FBLOCK MOS40 0191 E314 v22 MOS40 0202 E321 A0 02 LDYIM /(FBLOCK ) MOS40 0191 E314 v22 MOS40 0203 E323 68 PLA MOS40 0191 E314 v22 MOS40 0204 E324 4C DD FF JMP OSFILE MOS40 0191 E314 v22 MOS40 0205 E327 ; MOS40 0191 E314 v22 MOS40 0206 E327 [ MOS125 = &FF MOS40 0191 E314 v22 MOS40 0223 E327 ] MOS40 0191 E314 v22 MOS40 0224 E327 ; MOS40 0191 E314 v22 MOS40 0225 E327 ; MOS40 0191 E314 v22 MOS40 0226 E327 SAVEX ;SAVE command MOS40 0191 E314 v22 MOS40 0227 E327 ; MOS40 0191 E314 v22 MOS40 0228 E327 ; read FROM address MOS40 0191 E314 v22 MOS40 0229 E327 ; MOS40 0191 E314 v22 MOS40 0230 E327 A2 0A LDXIM FFROM MOS40 0191 E314 v22 MOS40 0231 E329 20 8E E2 JSR LSA MOS40 0191 E314 v22 MOS40 0232 E32C 90 45 BCC BADFX MOS40 0191 E314 v22 MOS40 0233 E32E ; MOS40 0191 E314 v22 MOS40 0234 E32E ; read TO address MOS40 0191 E314 v22 MOS40 0235 E32E ; check if preceeded by '+' MOS40 0191 E314 v22 MOS40 0236 E32E ; MOS40 0191 E314 v22 MOS40 0237 E32E [ MOS125 = &FF MOS40 0191 E314 v22 MOS40 0243 E32E | MOS40 0191 E314 v22 MOS40 0244 E32E B1 F2 LDAIY WORK MOS40 0191 E314 v22 MOS40 0245 E330 49 AB EORIM "+":EOR:&80 MOS40 0191 E314 v22 MOS40 0246 E332 69 FE ADCIM &FE ;c=1, set V iff symbol='+' MOS40 0191 E314 v22 MOS40 0247 E334 50 01 BVC SAVEX3 ;['+' not present] MOS40 0191 E314 v22 MOS40 0248 E336 ] MOS40 0191 E314 v22 MOS40 0249 E336 C8 INY ;skip '+' symbol MOS40 0191 E314 v22 MOS40 0250 E337 SAVEX3 MOS40 0191 E314 v22 MOS40 0251 E337 A2 0E LDXIM FTO MOS40 0191 E314 v22 MOS40 0252 E339 20 8E E2 JSR LSA ;N.B. does not corrupt V MOS40 0191 E314 v22 MOS40 0253 E33C 90 35 BCC BADFX ;[to address not given] MOS40 0191 E314 v22 MOS40 0254 E33E ; C=1 MOS40 0191 E314 v22 MOS40 0255 E33E 08 PHP ;Z => no exec address MOS40 0191 E314 v22 MOS40 0256 E33F ; if '+' was specified then the TO address was really MOS40 0191 E314 v22 MOS40 0257 E33F ; a length specification MOS40 0191 E314 v22 MOS40 0258 E33F 50 0F BVC SAVEX4 ;['+' not specified] MOS40 0191 E314 v22 MOS40 0259 E341 ; convert length to end address MOS40 0191 E314 v22 MOS40 0260 E341 ; N.B. C=1 MOS40 0191 E314 v22 MOS40 0261 E341 00FC MINUS4 * &00FC MOS40 0191 E314 v22 MOS40 0262 E341 A2 FC LDXIM MINUS4 MOS40 0191 E314 v22 MOS40 0263 E343 18 CLC MOS40 0191 E314 v22 MOS40 0264 E344 SAVEX5 MOS40 0191 E314 v22 MOS40 0265 E344 BD FC 01 LDAAX FBLOCK+FFROM-MINUS4 MOS40 0191 E314 v22 MOS40 0266 E347 7D 00 02 ADCAX FBLOCK+FTO-MINUS4 MOS40 0191 E314 v22 MOS40 0267 E34A 9D 00 02 STAAX FBLOCK+FTO-MINUS4 MOS40 0191 E314 v22 MOS40 0268 E34D E8 INX MOS40 0191 E314 v22 MOS40 0269 E34E D0 F4 BNE SAVEX5 ;[execute loop four times] MOS40 0191 E314 v22 MOS40 0270 E350 SAVEX4 ;copy 'from' address to execute and load fields MOS40 0191 E314 v22 MOS40 0271 E350 A2 03 LDXIM &03 MOS40 0191 E314 v22 MOS40 0272 E352 SAVEX1 MOS40 0191 E314 v22 MOS40 0273 E352 BD F8 02 LDAAX FBLOCK+FFROM MOS40 0191 E314 v22 MOS40 0274 E355 9D F4 02 STAAX FBLOCK+FEXEC MOS40 0191 E314 v22 MOS40 0275 E358 9D F0 02 STAAX FBLOCK+FLOAD MOS40 0191 E314 v22 MOS40 0276 E35B CA DEX MOS40 0191 E314 v22 MOS40 0277 E35C 10 F4 BPL SAVEX1 MOS40 0191 E314 v22 MOS40 0278 E35E ; check if exec address present MOS40 0191 E314 v22 MOS40 0279 E35E 28 PLP MOS40 0191 E314 v22 MOS40 0280 E35F F0 BE BEQ LS0 ;[no exec address] MOS40 0191 E314 v22 MOS40 0281 E361 ; read exec address MOS40 0191 E314 v22 MOS40 0282 E361 A2 06 LDXIM FEXEC MOS40 0191 E314 v22 MOS40 0283 E363 20 8E E2 JSR LSA MOS40 0191 E314 v22 MOS40 0284 E366 90 0B BCC BADFX ;[expected exec address not found] MOS40 0191 E314 v22 MOS40 0285 E368 F0 B5 BEQ LS0 ;[no following load address] MOS40 0191 E314 v22 MOS40 0286 E36A ; read load address MOS40 0191 E314 v22 MOS40 0287 E36A A2 02 LDXIM FLOAD MOS40 0191 E314 v22 MOS40 0288 E36C 20 8E E2 JSR LSA MOS40 0191 E314 v22 MOS40 0289 E36F 90 02 BCC BADFX ;[expected load address not found] MOS40 MOS40 MOS40 MOS40 Acorn macro assembler Page 81 MOS40 MOS40 Machine operating system internal commands MOS40 MOS40 0191 E314 v22 MOS40 0290 E371 F0 AC BEQ LS0 ;[good line termination] MOS40 0191 E314 v22 MOS40 0291 E373 BADFX MOS40 0191 E314 v22 MOS40 0292 E373 MBDCMD MOS40 0191 E314 v22 MOS40 0293 E373 00 BRK ;report error 'Bad command' MOS40 0389 E3BC ^35 MOS40 0294 E374 FE = BADCMD MOS40 0389 E3BC ^35 MOS40 0295 E375 42 61 64 = "Bad command" MOS40 0389 E3BC ^35 MOS40 0296 E380 00 BADKEY BRK ;report error 'Bad KEY' / end of preceeding error message MOS40 0444 E3EA ^14 MOS40 0297 E381 FB = BADKY MOS40 0444 E3EA ^14 MOS40 0298 E382 42 61 64 = "Bad key" MOS40 0444 E3EA ^14 MOS40 0299 E389 00 = ZERO ;message terminator MOS40 0444 E3EA ^14 MOS40 0300 E38A MOS40 0444 E3EA ^14 MOS40 0301 E38A [ MOS125 = &FF MOS40 0444 E3EA ^14 MOS40 0333 E38A ] MOS40 0444 E3EA ^14 MOS40 0334 E38A MOS40 0444 E3EA ^14 MOS40 0335 E38A MOS40 0444 E3EA ^14 MOS40 0336 E38A MOS40 0444 E3EA ^14 MOS40 0337 E38A FX ;*FX x,y MOS40 0444 E3EA ^14 MOS40 0338 E38A 20 B1 E0 JSR GETNUM ;read FX function code MOS40 0444 E3EA ^14 MOS40 0339 E38D 90 E4 BCC BADFX ;[bad FX number] MOS40 0444 E3EA ^14 MOS40 0340 E38F ; MOS40 0444 E3EA ^14 MOS40 0341 E38F ; N.B. C=1 MOS40 0444 E3EA ^14 MOS40 0342 E38F ; push function code MOS40 0444 E3EA ^14 MOS40 0343 E38F ; MOS40 0444 E3EA ^14 MOS40 0344 E38F 8A TXA MOS40 0444 E3EA ^14 MOS40 0345 E390 FXN ;entry point used by CLI, C=0 MOS40 0444 E3EA ^14 MOS40 0346 E390 48 PHA MOS40 0444 E3EA ^14 MOS40 0347 E391 A9 00 LDAIM ZERO ;set default argument values MOS40 0444 E3EA ^14 MOS40 0348 E393 85 E5 STA FXREGX MOS40 0444 E3EA ^14 MOS40 0349 E395 85 E4 STA FXREGY MOS40 0444 E3EA ^14 MOS40 0350 E397 ; MOS40 0444 E3EA ^14 MOS40 0351 E397 ; check for line end MOS40 0444 E3EA ^14 MOS40 0352 E397 ; MOS40 0444 E3EA ^14 MOS40 0353 E397 20 A6 E0 JSR SKPCM ;N.B. C=0 => just check for line end MOS40 0444 E3EA ^14 MOS40 0354 E39A ; MOS40 0444 E3EA ^14 MOS40 0355 E39A ; C=1 => skip an optional comma and check for line end MOS40 0444 E3EA ^14 MOS40 0356 E39A ; MOS40 0444 E3EA ^14 MOS40 0357 E39A F0 18 BEQ FX1 ;[line end, just a function code] MOS40 0444 E3EA ^14 MOS40 0358 E39C ; MOS40 0444 E3EA ^14 MOS40 0359 E39C ; try reading another argument MOS40 0444 E3EA ^14 MOS40 0360 E39C ; MOS40 0444 E3EA ^14 MOS40 0361 E39C 20 B1 E0 JSR GETNUM MOS40 0444 E3EA ^14 MOS40 0362 E39F 90 D2 BCC BADFX ;[bad FX number] MOS40 0444 E3EA ^14 MOS40 0363 E3A1 ; MOS40 0444 E3EA ^14 MOS40 0364 E3A1 ; N.B. C=1 MOS40 0444 E3EA ^14 MOS40 0365 E3A1 ; MOS40 0444 E3EA ^14 MOS40 0366 E3A1 86 E5 STX FXREGX MOS40 0444 E3EA ^14 MOS40 0367 E3A3 ; MOS40 0444 E3EA ^14 MOS40 0368 E3A3 ; check for line end MOS40 0444 E3EA ^14 MOS40 0369 E3A3 ; MOS40 0444 E3EA ^14 MOS40 0370 E3A3 20 A8 E0 JSR SKPCOM MOS40 0444 E3EA ^14 MOS40 0371 E3A6 F0 0C BEQ FX1 MOS40 0444 E3EA ^14 MOS40 0372 E3A8 ; MOS40 0444 E3EA ^14 MOS40 0373 E3A8 ; try reading another argument MOS40 0444 E3EA ^14 MOS40 0374 E3A8 ; MOS40 0444 E3EA ^14 MOS40 0375 E3A8 20 B1 E0 JSR GETNUM MOS40 0444 E3EA ^14 MOS40 0376 E3AB 90 C6 BCC BADFX ;[bad FX number] MOS40 0444 E3EA ^14 MOS40 0377 E3AD 86 E4 STX FXREGY MOS40 0444 E3EA ^14 MOS40 0378 E3AF ; MOS40 0444 E3EA ^14 MOS40 0379 E3AF ; ensure line end MOS40 0444 E3EA ^14 MOS40 0380 E3AF ; MOS40 0444 E3EA ^14 MOS40 0381 E3AF 20 9D E0 JSR SKIPSP MOS40 0444 E3EA ^14 MOS40 0382 E3B2 D0 BF BNE BADFX ;[bad command termination] MOS40 0444 E3EA ^14 MOS40 0383 E3B4 ; MOS40 0444 E3EA ^14 MOS40 0384 E3B4 FX1 MOS40 0444 E3EA ^14 MOS40 0385 E3B4 A4 E4 LDY FXREGY ;load OSBYTE arguments MOS40 0444 E3EA ^14 MOS40 0386 E3B6 A6 E5 LDX FXREGX MOS40 0444 E3EA ^14 MOS40 0387 E3B8 68 PLA MOS40 0444 E3EA ^14 MOS40 0388 E3B9 20 F4 FF JSR OSBYTE MOS40 0444 E3EA ^14 MOS40 0389 E3BC 70 B5 BVS BADFX ;[unrecognised FX code] MOS40 0444 E3EA ^14 MOS40 0390 E3BE [ MOS125 = &FF MOS40 0444 E3EA ^14 MOS40 0391 E3BE | MOS40 0444 E3EA ^14 MOS40 0392 E3BE KEYZAP MOS40 0444 E3EA ^14 MOS40 0393 E3BE ] MOS40 0444 E3EA ^14 MOS40 0394 E3BE 60 RTS MOS40 0444 E3EA ^14 MOS40 0395 E3BF MOS40 0444 E3EA ^14 MOS40 0396 E3BF MOS40 0444 E3EA ^14 MOS40 0397 E3BF [ MOS125 = &FF MOS40 0444 E3EA ^14 MOS40 0398 E3BF | MOS40 0444 E3EA ^14 MOS40 0399 E3BF KEY ;KEY MOS40 0444 E3EA ^14 MOS40 0400 E3BF 20 B1 E0 JSR GETNUM MOS40 0444 E3EA ^14 MOS40 0401 E3C2 90 BC BCC BADKEY ;[bad soft key number (>255)] MOS40 0444 E3EA ^14 MOS40 0402 E3C4 ; A = character delimiting number MOS40 0444 E3EA ^14 MOS40 0403 E3C4 ; X = NUMBER = CSKEY = key number MOS40 0444 E3EA ^14 MOS40 0404 E3C4 ; Y = soft key number argument MOS40 0444 E3EA ^14 MOS40 0405 E3C4 ; check soft key number range MOS40 0444 E3EA ^14 MOS40 0406 E3C4 E0 10 CPXIM NSOFTK MOS40 0444 E3EA ^14 MOS40 0407 E3C6 B0 B8 BCS BADKEY ;[soft_key_number > number of soft keys - 1] MOS40 0444 E3EA ^14 MOS40 0408 E3C8 ; key number in range 0 to NSOFTK-1 MOS40 0444 E3EA ^14 MOS40 0409 E3C8 ; MOS40 0444 E3EA ^14 MOS40 0410 E3C8 [ FALSE=0 MOS40 0444 E3EA ^14 MOS40 0413 E3C8 ] MOS40 0444 E3EA ^14 MOS40 0414 E3C8 ; MOS40 0444 E3EA ^14 MOS40 0415 E3C8 20 A8 E0 JSR SKPCOM ;skip optional spaces and an optional comma MOS40 0444 E3EA ^14 MOS40 0416 E3CB 08 PHP ;save line end status MOS40 0444 E3EA ^14 MOS40 0417 E3CC AE 10 0B LDX SKEND ;Y points to unused portion of soft key buffer area MOS40 0444 E3EA ^14 MOS40 0418 E3CF ; (set to reset SKNEND as it might have been set as a result MOS40 0444 E3EA ^14 MOS40 0419 E3CF ; of a 'KEY in use' error) MOS40 0444 E3EA ^14 MOS40 0420 E3CF 98 TYA MOS40 0444 E3EA ^14 MOS40 0421 E3D0 48 PHA MOS40 0444 E3EA ^14 MOS40 0422 E3D1 20 33 E4 JSR SKGCR ;delete soft key (uses value in X) MOS40 0444 E3EA ^14 MOS40 0423 E3D4 ; on exit X = SKEND MOS40 0444 E3EA ^14 MOS40 0424 E3D4 68 PLA MOS40 0444 E3EA ^14 MOS40 0425 E3D5 A8 TAY MOS40 0444 E3EA ^14 MOS40 0426 E3D6 28 PLP ;restore line end status MOS40 0444 E3EA ^14 MOS40 0427 E3D7 F0 E5 BEQ KEYZAP ; end of line - specified soft key value value has been deleted so return MOS40 0444 E3EA ^14 MOS40 0428 E3D9 ] MOS40 0444 E3EA ^14 MOS40 0429 E3D9 CLI1 MOS40 0444 E3EA ^14 MOS40 0430 E3D9 38 SEC MOS40 0444 E3EA ^14 MOS40 0431 E3DA 20 97 EA JSR GSINTS ;initialise for reading quoted string MOS40 0444 E3EA ^14 MOS40 0432 E3DD CLIWP MOS40 0444 E3EA ^14 MOS40 0433 E3DD 20 A8 EA JSR GSREAD ;read string character MOS40 0444 E3EA ^14 MOS40 0434 E3E0 B0 08 BCS CLIY ;end of string MOS40 0444 E3EA ^14 MOS40 0435 E3E2 E8 INX MOS40 0444 E3EA ^14 MOS40 0436 E3E3 F0 9B BEQ BADKEY ;[buffer full, (N.B. buffer assumed to be 256 bytes long)] MOS40 0444 E3EA ^14 MOS40 0437 E3E5 ; buffer not full MOS40 0444 E3EA ^14 MOS40 0438 E3E5 9D 00 0B STAAX SKBUF -&01 ;store character in soft key buffer MOS40 0444 E3EA ^14 MOS40 0439 E3E8 ;(N.B. note offset of -1) MOS40 0444 E3EA ^14 MOS40 0440 E3E8 90 F3 BCC CLIWP ;[ALWAYS jump, go process next character] MOS40 0444 E3EA ^14 MOS40 0441 E3EA ; SOFT KEY FINAL CHECK TO SEE IF ANY OTHER KEY SHARES SAME MOS40 0444 E3EA ^14 MOS40 0442 E3EA ; VALUE POINTER - IF IT DOES THEN SET IT EQUAL TO SKEND MOS40 0444 E3EA ^14 MOS40 0443 E3EA CLIY MOS40 MOS40 MOS40 MOS40 Acorn macro assembler Page 82 MOS40 MOS40 Machine operating system internal commands MOS40 MOS40 0444 E3EA ^14 MOS40 0444 E3EA D0 94 BNE BADKEY ;[string not terminated by CR] -- MOS40 0445 E3EC ; N.B. new buffer end in X -- MOS40 0446 E3EC 08 PHP -- MOS40 0447 E3ED 78 SEI ;** DISABLE INTERRUPTS ** -- MOS40 0448 E3EE 20 33 E4 JSR SKGCR ;delete old soft key and replace with new value (uses value in X) -- MOS40 0449 E3F1 ;N.B. sets Y to specified soft key number -- MOS40 0450 E3F1 A2 10 LDXIM NSOFTK ;X to be roving soft key number -- MOS40 0451 E3F3 CLIYP -- MOS40 0452 E3F3 E4 E6 CPX CSKEY MOS40 0461 E406 ^6B MOS40 0453 E3F5 F0 0E BEQ CLIYQ ;[do not process specified soft key] MOS40 0461 E406 ^6B MOS40 0454 E3F7 BD 00 0B LDAAX SKPTR MOS40 0461 E406 ^6B MOS40 0455 E3FA D9 00 0B CMPAY SKPTR ;compare soft key buffer pointers MOS40 0461 E406 ^6B MOS40 0456 E3FD D0 06 BNE CLIYQ ;[pointers differ] MOS40 0461 E406 ^6B MOS40 0457 E3FF AD 10 0B LDA SKEND MOS40 0461 E406 ^6B MOS40 0458 E402 9D 00 0B STAAX SKPTR ;update soft key buffer pointer MOS40 0461 E406 ^6B MOS40 0459 E405 CLIYQ MOS40 0461 E406 ^6B MOS40 0460 E405 CA DEX MOS40 0461 E406 ^6B MOS40 0461 E406 10 EB BPL CLIYP ;[go process next soft key] -- MOS40 0462 E408 28 PLP ;** ENABLE INTERRUPTS ** -- MOS40 0463 E409 60 RTS -- MOS40 0464 E40A -- MOS40 0465 E40A -- MOS40 0466 E40A SKSIZE ;A := size of soft key given by Y -- MOS40 0467 E40A ; ** THIS MODULE DISABLES INTERRUPTS ** -- MOS40 0468 E40A ; this routine is called by soft key set (via *KEY command) -- MOS40 0469 E40A ; and soft key read (via RDCH processing). -- MOS40 0470 E40A ; the choice is to duplicate the code, using a distinct work slot, -- MOS40 0471 E40A ; or share the code within a critical region in order that SKSZWK -- MOS40 0472 E40A ; may be shared -- MOS40 0473 E40A 08 PHP ;save interrupt state -- MOS40 0474 E40B 78 SEI ;** DISABLE INTERRUPTS ** -- MOS40 0475 E40C AD 10 0B LDA SKEND -- MOS40 0476 E40F 38 SEC -- MOS40 0477 E410 F9 00 0B SBCAY SKPTR -- MOS40 0478 E413 85 FB STA SKSZWK ;SKSZWK := number of bytes to end of buffer -- MOS40 0479 E415 8A TXA -- MOS40 0480 E416 48 PHA ;push X -- MOS40 0481 E417 A2 10 LDXIM NSOFTK ;X is roving soft key number -- MOS40 0482 E419 SKS1 -- MOS40 0483 E419 BD 00 0B LDAAX SKPTR MOS40 0492 E42B ^6C MOS40 0484 E41C 38 SEC MOS40 0492 E42B ^6C MOS40 0485 E41D F9 00 0B SBCAY SKPTR ;A := length of soft key w.r.t. specified soft key MOS40 0492 E42B ^6C MOS40 0486 E420 90 08 BCC SKS2 ;[ignore negative length] MOS40 0492 E42B ^6C MOS40 0487 E422 F0 06 BEQ SKS2 ;[ignore zero length] MOS40 0492 E42B ^6C MOS40 0488 E424 C5 FB CMP SKSZWK MOS40 0492 E42B ^6C MOS40 0489 E426 B0 02 BCS SKS2 ;[this length >= past lengths] MOS40 0492 E42B ^6C MOS40 0490 E428 85 FB STA SKSZWK ;remember new minimum length MOS40 0492 E42B ^6C MOS40 0491 E42A CA SKS2 DEX MOS40 0492 E42B ^6C MOS40 0492 E42B 10 EC BPL SKS1 ;[go process next soft key] -- MOS40 0493 E42D 68 PLA -- MOS40 0494 E42E AA TAX ;restore X -- MOS40 0495 E42F A5 FB LDA SKSZWK -- MOS40 0496 E431 28 PLP ;** RESTORE INTERRUPT STATE ** -- MOS40 0497 E432 ; A := length of soft key string -- MOS40 0498 E432 ; Y := soft key number given on entry -- MOS40 0499 E432 60 RTS -- MOS40 0500 E433 -- MOS40 0501 E433 -- MOS40 0502 E433 ; SOFT KEY BUFFER GARBAGE COLLECTION ROUTINE.STRING -- MOS40 0503 E433 ; FOR KEY NUMBER GIVEN IN 'CSKEY' IS DELETED & ALL -- MOS40 0504 E433 ; POINTERS ADJUSTED ACC -- MOS40 0505 E433 SKGCR ;delete (and insert) key value(s) -- MOS40 0506 E433 ;** THIS MODULE DISABLES INTERRUPTS ** -- MOS40 0507 E433 08 PHP ;** SAVE INTERRUPT STATE OF CALLER ** -- MOS40 0508 E434 78 SEI ;** DISABLE INTERRUPTS ** -- MOS40 0509 E435 ; save new end address -- MOS40 0510 E435 8A TXA -- MOS40 0511 E436 48 PHA -- MOS40 0512 E437 A4 E6 LDY CSKEY ;Y is specified soft key number -- MOS40 0513 E439 20 0A E4 JSR SKSIZE ;A := length of soft key string -- MOS40 0514 E43C ; NOW SKSZWK = LENGTH OF CURRENT SK STRING -- MOS40 0515 E43C ; SO SETUP FOR DELETING THIS STRING. -- MOS40 0516 E43C B9 00 0B LDAAY SKPTR -- MOS40 0517 E43F A8 TAY ;Y points to specified soft key string -- MOS40 0518 E440 18 CLC -- MOS40 0519 E441 65 FB ADC SKSZWK -- MOS40 0520 E443 AA TAX ;X points to start of byte area to be moved down -- MOS40 0521 E444 85 FA STA KEYSV -- MOS40 0522 E446 ; TO AVOID MASHING POINTER STRUCTURE IF -- MOS40 0523 E446 ; MACHINE CRASHES ELSEWHERE,IT IS ESSENTIAL -- MOS40 0524 E446 ; THAT INTERRUPTS ARE *OFF* FOR THIS NEXT BIT -- MOS40 0525 E446 ; before altering the data structure, check that a soft key -- MOS40 0526 E446 ; is not being used by RDCH -- MOS40 0527 E446 AD 68 02 LDA SOFKL ;A := length of soft key in use by RDCH -- MOS40 0528 E449 F0 0D BEQ SK3 ;[no soft key in use] MOS40 0528 E449 v72 MOS40 0529 E44B ; soft key being 'unwound' by RDCH MOS40 0528 E449 v72 MOS40 0530 E44B ; N.B. altering the data structure would confuse RDCH MOS40 0528 E449 v72 MOS40 0531 E44B 00 BRK ;report error 'KEY in use' MOS40 0528 E449 v72 MOS40 0532 E44C FA = KEYUSE MOS40 0528 E449 v72 MOS40 0533 E44D 4B 65 79 = "Key in use" MOS40 0528 E449 v72 MOS40 0534 E457 00 = ZERO ;end of error message MOS40 0528 E449 v72 MOS40 0535 E458 MOS40 0528 E449 v72 MOS40 0536 E458 SK3 MOS40 0528 E449 v72 MOS40 0537 E458 CE 84 02 DEC USKFLG ;indicate update of soft keys in progress (USKFLG<>0) -- MOS40 0538 E45B 68 PLA ;A := new end of buffer -- MOS40 0539 E45C 38 SEC -- MOS40 0540 E45D E5 FA SBC KEYSV -- MOS40 0541 E45F 85 FA STA KEYSV ;KEYSV := number of bytes to copy -- MOS40 0542 E461 F0 0C BEQ SKGCV ;[zero bytes to copy] MOS40 0542 E461 v73 MOS40 0543 E463 SKGCS MOS40 0542 E461 v73 MOS40 0544 E463 BD 01 0B LDAAX SKBUF ;*MOVE MOS40 0542 E461 v73 MOS40 0545 E466 99 01 0B STAAY SKBUF ;*CHARACTERS MOS40 0542 E461 v73 MOS40 0546 E469 C8 INY MOS40 0542 E461 v73 MOS40 0547 E46A E8 INX MOS40 0542 E461 v73 MOS40 0548 E46B C6 FA DEC KEYSV MOS40 0542 E461 v73 MOS40 0549 E46D D0 F4 BNE SKGCS ;[more bytes to copy] MOS40 0542 E461 v73 MOS40 0550 E46F ; NOW ADJUST ALL POINTERS WHICH ARE GREATER MOS40 0542 E461 v73 MOS40 0551 E46F ; THAN THE ONE AT CSKEY. MOS40 0542 E461 v73 MOS40 0552 E46F SKGCV MOS40 0542 E461 v73 MOS40 0553 E46F ; save new end address MOS40 0542 E461 v73 MOS40 0554 E46F 98 TYA -- MOS40 0555 E470 48 PHA -- MOS40 0556 E471 A4 E6 LDY CSKEY ;Y is specified soft key number -- MOS40 0557 E473 A2 10 LDXIM NSOFTK ;X is roving soft key number, including end pointer -- MOS40 0558 E475 SKGCT -- MOS40 0559 E475 BD 00 0B LDAAX SKPTR MOS40 0573 E485 ^6E MOS40 0560 E478 D9 00 0B CMPAY SKPTR MOS40 0573 E485 ^6E MOS40 0561 E47B 90 07 BCC SKGCU ;[current pointer precedes specified pointer] MOS40 0573 E485 ^6E MOS40 0562 E47D [ TRUE=0 MOS40 0573 E485 ^6E MOS40 0563 E47D F0 05 BEQ SKGCU ;[current pointer equals specified pointer] MOS40 0573 E485 ^6E MOS40 0564 E47F ] MOS40 MOS40 MOS40 MOS40 Acorn macro assembler Page 83 MOS40 MOS40 Machine operating system internal commands MOS40 MOS40 0573 E485 ^6E MOS40 0565 E47F ; current pointer is beyond specified pointer MOS40 0573 E485 ^6E MOS40 0566 E47F ; if pointers are equal then specified soft key was null ... MOS40 0573 E485 ^6E MOS40 0567 E47F ; ... therefore its size was zero and a drop thru is a no-operation MOS40 0573 E485 ^6E MOS40 0568 E47F ; C=1 MOS40 0573 E485 ^6E MOS40 0569 E47F E5 FB SBC SKSZWK ;C already 1 MOS40 0573 E485 ^6E MOS40 0570 E481 9D 00 0B STAAX SKPTR ;adjust current buffer pointer MOS40 0573 E485 ^6E MOS40 0571 E484 SKGCU MOS40 0573 E485 ^6E MOS40 0572 E484 CA DEX MOS40 0573 E485 ^6E MOS40 0573 E485 10 EE BPL SKGCT ;[go process next soft key] -- MOS40 0574 E487 ; NOW UPDATE CURRENT KEY POINTER -- MOS40 0575 E487 AD 10 0B LDA SKEND -- MOS40 0576 E48A 99 00 0B STAAY SKPTR ;adjust specified soft key pointer to point to end of buffer -- MOS40 0577 E48D 68 PLA ;A := new end address -- MOS40 0578 E48E 8D 10 0B STA SKEND ;make end buffer pointers equal -- MOS40 0579 E491 AA TAX ;X := new end of buffer pointer -- MOS40 0580 E492 EE 84 02 INC USKFLG ;indicate update of soft keys over (USKFLG=0) -- MOS40 0581 E495 28 PLP ;** RESTORE INTERRUPT STATE OF CALLER ** -- MOS40 0582 E496 ; X = SKEND -- MOS40 0583 E496 ; Y = specified soft key number -- MOS40 0584 E496 60 RTS -- MOS40 0585 E497 LNK MOS42 -- MOS42 0001 E497 -- MOS42 0002 E497 ; > MOS42 -- MOS42 0003 E497 TTL MOS42 Buffer management -- MOS42 0004 E497 OPT MOS42 MOS42 MOS42 MOS42 MOS42 Acorn macro assembler Page 84 MOS42 MOS42 Buffer management MOS42 -- MOS42 0005 E497 ;(c) 1981 ACORN Computers Limited -- MOS42 0006 E497 ;BBC Microcomputer Machine Operating System (MOS) -- MOS42 0007 E497 ;Change record: -- MOS42 0008 E497 ;201 01-May-82 PB EVENT restores A -- MOS42 0009 E497 ;004 29-Jul-81 MP Prototype version -- MOS42 0010 E497 ;Author(s): -- MOS42 0011 E497 ;PB Paul Bond -- MOS42 0012 E497 ;MP Mike Prees -- MOS42 0013 E497 ; buffer address table (hi byte) -- MOS42 0014 E497 BFADHI -- MOS42 0015 E497 03 = /(RDCHBF+RDCHSZ-&0100 ) -- MOS42 0016 E498 0A = /(RSRIBF+RSRISZ-&0100 ) -- MOS42 0017 E499 08 = /(RSROBF+RSROSZ-&0100 ) -- MOS42 0018 E49A 07 = /(PRNBF+PRNSZ-&0100 ) -- MOS42 0019 E49B 07 = /(SNDBF1+SBSIZE-&0100 ) -- MOS42 0020 E49C 07 = /(SNDBF2+SBSIZE-&0100 ) -- MOS42 0021 E49D 07 = /(SNDBF3+SBSIZE-&0100 ) -- MOS42 0022 E49E 07 = /(SNDBF4+SBSIZE-&0100 ) -- MOS42 0023 E49F 09 = /(SPCHBF+SPCHSZ-&0100 ) -- MOS42 0024 E4A0 ; buffer address table (lo byte) -- MOS42 0025 E4A0 BFADLO -- MOS42 0026 E4A0 00 = RDCHBF+RDCHSZ-&0100 ;RDCH (keyboard) buffer -- MOS42 0027 E4A1 00 = RSRIBF+RSRISZ-&0100 ;RS423 input -- MOS42 0028 E4A2 C0 = RSROBF+RSROSZ-&0100 ;RS423 output -- MOS42 0029 E4A3 C0 = PRNBF+PRNSZ-&0100 ;print -- MOS42 0030 E4A4 50 = SNDBF1+SBSIZE-&0100 ;sound channel 1 -- MOS42 0031 E4A5 60 = SNDBF2+SBSIZE-&0100 ;sound channel 2 -- MOS42 0032 E4A6 70 = SNDBF3+SBSIZE-&0100 ;sound channel 3 -- MOS42 0033 E4A7 80 = SNDBF4+SBSIZE-&0100 ;sound channel 4 -- MOS42 0034 E4A8 00 = SPCHBF+SPCHSZ-&0100 ;speech -- MOS42 0035 E4A9 ; buffer origin offsets within page -- MOS42 0036 E4A9 BFORG -- MOS42 0037 E4A9 E0 = &0100-RDCHSZ -- MOS42 0038 E4AA 00 = &0100-RSRISZ -- MOS42 0039 E4AB 40 = &0100-RSROSZ -- MOS42 0040 E4AC C0 = &0100-PRNSZ -- MOS42 0041 E4AD F0 = &0100-SBSIZE -- MOS42 0042 E4AE F0 = &0100-SBSIZE -- MOS42 0043 E4AF F0 = &0100-SBSIZE -- MOS42 0044 E4B0 F0 = &0100-SBSIZE -- MOS42 0045 E4B1 C0 = &0100-SPCHSZ -- MOS42 0046 E4B2 ; general buffer manipulation routines -- MOS42 0047 E4B2 SETBUF -- MOS42 0048 E4B2 ; set buffer pointer -- MOS42 0049 E4B2 BD A0 E4 LDAAX BFADLO -- MOS42 0050 E4B5 85 FA STA BUFFLO -- MOS42 0051 E4B7 BD 97 E4 LDAAX BFADHI -- MOS42 0052 E4BA 85 FB STA BUFFHI -- MOS42 0053 E4BC 60 RTS -- MOS42 0054 E4BD -- MOS42 0055 E4BD -- MOS42 0056 E4BD EXAM ;examine character in buffer -- MOS42 0057 E4BD 2C 49 D9 BIT FFBYT ;V=1 => examine option -- MOS42 0058 E4C0 70 01 BVS EXAM1 ;[ALWAYS jump] MOS42 0058 E4C0 v7E MOS42 0059 E4C2 ; NEVER fall thru MOS42 0058 E4C0 v7E MOS42 0060 E4C2 REMOV ;remove character from buffer MOS42 0058 E4C0 v7E MOS42 0061 E4C2 B8 CLV ;V=0 => indicate remove option MOS42 0058 E4C0 v7E MOS42 0062 E4C3 ; X = buffer index MOS42 0058 E4C0 v7E MOS42 0063 E4C3 ; V=0 => remove, V=1 => examine MOS42 0058 E4C0 v7E MOS42 0064 E4C3 EXAM1 ;entered with V=1 MOS42 0058 E4C0 v7E MOS42 0065 E4C3 ; MOS42 0058 E4C0 v7E MOS42 0066 E4C3 6C 2C 02 JMI REMVEC ;use indirection (defaults to REM) -- MOS42 0067 E4C6 ; -- MOS42 0068 E4C6 REM -- MOS42 0069 E4C6 [ $Tutu -- MOS42 0072 E4C6 | -- MOS42 0073 E4C6 ; disable interrupts -- MOS42 0074 E4C6 08 PHP -- MOS42 0075 E4C7 78 SEI -- MOS42 0076 E4C8 ] -- MOS42 0077 E4C8 ; get buffer start pointer -- MOS42 0078 E4C8 BD D8 02 LDAAX BFSTRT -- MOS42 0079 E4CB DD E1 02 CMPAX BFEND -- MOS42 0080 E4CE F0 72 BEQ REMOV1 MOS42 0080 E4CE v0D MOS42 0081 E4D0 A8 TAY ;Y := buffer start pointer MOS42 0080 E4CE v0D MOS42 0082 E4D1 ; set buffer pointer MOS42 0080 E4CE v0D MOS42 0083 E4D1 20 B2 E4 JSR SETBUF MOS42 0080 E4CE v0D MOS42 0084 E4D4 ; remove character from buffer MOS42 0080 E4CE v0D MOS42 0085 E4D4 B1 FA LDAIY BUFFLO MOS42 0080 E4CE v0D MOS42 0086 E4D6 70 1B BVS REMOV3 ;[examine option, exit with character] MOS42 0080 E4CE v0D MOS42 0087 E4D8 48 PHA ;push character MOS42 0080 E4CE v0D MOS42 0088 E4D9 ; update buffer start pointer MOS42 0080 E4CE v0D MOS42 0089 E4D9 C8 INY MOS42 0080 E4CE v0D MOS42 0090 E4DA 98 TYA MOS42 0080 E4CE v0D MOS42 0091 E4DB D0 03 BNE REMOV2 MOS42 0080 E4CE v0D MOS42 0092 E4DD ; wraparound MOS42 0080 E4CE v0D MOS42 0093 E4DD BD A9 E4 LDAAX BFORG MOS42 0080 E4CE v0D MOS42 0094 E4E0 REMOV2 MOS42 0080 E4CE v0D MOS42 0095 E4E0 9D D8 02 STAAX BFSTRT MOS42 0080 E4CE v0D MOS42 0096 E4E3 ; check for removal of last character in buffer MOS42 0080 E4CE v0D MOS42 0097 E4E3 ; N.B. this code is only executed for the remove option MOS42 0080 E4CE v0D MOS42 0098 E4E3 E0 02 CPXIM OUTPUT MOS42 0080 E4CE v0D MOS42 0099 E4E5 90 0A BCC REMOV4 ;[input buffer, buffer empty event not applicable] MOS42 0080 E4CE v0D MOS42 0100 E4E7 DD E1 02 CMPAX BFEND MOS42 0080 E4CE v0D MOS42 0101 E4EA D0 05 BNE REMOV4 ;[not last character] MOS42 0080 E4CE v0D MOS42 0102 E4EC ; signal buffer empty event MOS42 0080 E4CE v0D MOS42 0103 E4EC A0 00 LDYIM EVMPTY MOS42 0080 E4CE v0D MOS42 0104 E4EE 20 F6 E4 JSR EVENT MOS42 0080 E4CE v0D MOS42 0105 E4F1 REMOV4 MOS42 0080 E4CE v0D MOS42 0106 E4F1 68 PLA ;restore character read MOS42 0080 E4CE v0D MOS42 0107 E4F2 A8 TAY ;Y := character MOS42 0080 E4CE v0D MOS42 0108 E4F3 REMOV3 ;return with C=0 indicating removal successful MOS42 0080 E4CE v0D MOS42 0109 E4F3 28 PLP ;restore interrupt state MOS42 0080 E4CE v0D MOS42 0110 E4F4 18 CLC MOS42 0080 E4CE v0D MOS42 0111 E4F5 60 RTS MOS42 0080 E4CE v0D MOS42 0112 E4F6 MOS42 0080 E4CE v0D MOS42 0113 E4F6 MOS42 0080 E4CE v0D MOS42 0114 E4F6 EVENT ;signal event given by Y, optional arguments given in A & X MOS42 0080 E4CE v0D MOS42 0115 E4F6 ; this routine must not corrupt A MOS42 0080 E4CE v0D MOS42 0116 E4F6 08 PHP MOS42 0080 E4CE v0D MOS42 0117 E4F7 78 SEI MOS42 0080 E4CE v0D MOS42 0118 E4F8 48 PHA ;save A MOS42 0080 E4CE v0D MOS42 0119 E4F9 85 FA STA EVENTA ;save A MOS42 0080 E4CE v0D MOS42 0120 E4FB B9 BF 02 LDAAY EVENTS MOS42 0080 E4CE v0D MOS42 0121 E4FE F0 41 BEQ EVENT0 ;[event disabled] MOS42 0080 E4CE v0D MOS42 0122 E500 ; event enabled, call event routine MOS42 0080 E4CE v0D MOS42 0123 E500 98 TYA ;A = event code MOS42 0080 E4CE v0D MOS42 0124 E501 A4 FA LDY EVENTA ;Y := argument passed originally in A MOS42 0080 E4CE v0D MOS42 0125 E503 20 85 F0 JSR JMIEVT ;A = event code, must not corrupt X MOS42 0080 E4CE v0D MOS42 0126 E506 68 PLA ;restore A MOS42 0080 E4CE v0D MOS42 0127 E507 28 PLP MOS42 MOS42 MOS42 MOS42 Acorn macro assembler Page 85 MOS42 MOS42 Buffer management MOS42 MOS42 0080 E4CE v0D MOS42 0128 E508 18 CLC ;indicate event was enabled MOS42 0080 E4CE v0D MOS42 0129 E509 60 RTS MOS42 0080 E4CE v0D MOS42 0130 E50A MOS42 0080 E4CE v0D MOS42 0131 E50A CKESCY ;insert character in Y into buffer MOS42 0080 E4CE v0D MOS42 0132 E50A ; MOS42 0080 E4CE v0D MOS42 0133 E50A ; signal input event MOS42 0080 E4CE v0D MOS42 0134 E50A ; MOS42 0080 E4CE v0D MOS42 0135 E50A 98 TYA ;A := character MOS42 0080 E4CE v0D MOS42 0136 E50B A0 02 LDYIM EVKYBD MOS42 0080 E4CE v0D MOS42 0137 E50D 20 F6 E4 JSR EVENT ;assumes A and X not corrupted MOS42 0080 E4CE v0D MOS42 0138 E510 A8 TAY MOS42 0080 E4CE v0D MOS42 0139 E511 INSERT ;FX call to insert character into buffer MOS42 0080 E4CE v0D MOS42 0140 E511 98 TYA MOS42 0080 E4CE v0D MOS42 0141 E512 INSRT ;insert character into buffer MOS42 0080 E4CE v0D MOS42 0142 E512 ; MOS42 0080 E4CE v0D MOS42 0143 E512 6C 2A 02 JMI INSVEC ;use indirection (defaults to INS) MOS42 0080 E4CE v0D MOS42 0144 E515 ; MOS42 0080 E4CE v0D MOS42 0145 E515 INS MOS42 0080 E4CE v0D MOS42 0146 E515 ; A = character MOS42 0080 E4CE v0D MOS42 0147 E515 ; X = buffer index MOS42 0080 E4CE v0D MOS42 0148 E515 [ $Tutu MOS42 0080 E4CE v0D MOS42 0151 E515 | MOS42 0080 E4CE v0D MOS42 0152 E515 ; disable interrupts MOS42 0080 E4CE v0D MOS42 0153 E515 08 PHP MOS42 0080 E4CE v0D MOS42 0154 E516 78 SEI MOS42 0080 E4CE v0D MOS42 0155 E517 ] MOS42 0080 E4CE v0D MOS42 0156 E517 ; save character MOS42 0080 E4CE v0D MOS42 0157 E517 48 PHA MOS42 0080 E4CE v0D MOS42 0158 E518 ; construct buffer end offset in Y MOS42 0080 E4CE v0D MOS42 0159 E518 BC E1 02 LDYAX BFEND MOS42 0080 E4CE v0D MOS42 0160 E51B C8 INY MOS42 0080 E4CE v0D MOS42 0161 E51C D0 03 BNE INSRT2 MOS42 0080 E4CE v0D MOS42 0162 E51E ; buffer wraparound MOS42 0080 E4CE v0D MOS42 0163 E51E BC A9 E4 LDYAX BFORG MOS42 0080 E4CE v0D MOS42 0164 E521 INSRT2 MOS42 0080 E4CE v0D MOS42 0165 E521 98 TYA MOS42 0080 E4CE v0D MOS42 0166 E522 DD D8 02 CMPAX BFSTRT MOS42 0080 E4CE v0D MOS42 0167 E525 F0 0F BEQ INSRT1 ;[buffer full] MOS42 0080 E4CE v0D MOS42 0168 E527 ; update buffer end pointer MOS42 0080 E4CE v0D MOS42 0169 E527 BC E1 02 LDYAX BFEND MOS42 0080 E4CE v0D MOS42 0170 E52A 9D E1 02 STAAX BFEND MOS42 0080 E4CE v0D MOS42 0171 E52D ; construct buffer pointer MOS42 0080 E4CE v0D MOS42 0172 E52D 20 B2 E4 JSR SETBUF MOS42 0080 E4CE v0D MOS42 0173 E530 ; store character in buffer MOS42 0080 E4CE v0D MOS42 0174 E530 68 PLA ;A := character MOS42 0080 E4CE v0D MOS42 0175 E531 91 FA STAIY BUFFLO MOS42 0080 E4CE v0D MOS42 0176 E533 ; return with C=0 => insert successful MOS42 0080 E4CE v0D MOS42 0177 E533 28 PLP ;restore interrupt state MOS42 0080 E4CE v0D MOS42 0178 E534 18 CLC MOS42 0080 E4CE v0D MOS42 0179 E535 60 RTS MOS42 0080 E4CE v0D MOS42 0180 E536 MOS42 0080 E4CE v0D MOS42 0181 E536 INSRT1 ;signal buffer full event MOS42 0080 E4CE v0D MOS42 0182 E536 68 PLA ;restore character MOS42 0080 E4CE v0D MOS42 0183 E537 E0 02 CPXIM OUTPUT MOS42 0080 E4CE v0D MOS42 0184 E539 B0 07 BCS INOBUF ;[output buffer, buffer full event not applicable] MOS42 0080 E4CE v0D MOS42 0185 E53B ; signal input buffer full event MOS42 0080 E4CE v0D MOS42 0186 E53B A0 01 LDYIM EVFULL MOS42 0080 E4CE v0D MOS42 0187 E53D 20 F6 E4 JSR EVENT ;A=character, X=bufferid MOS42 0080 E4CE v0D MOS42 0188 E540 ; (N.B. does not corrupt A, should not corrupt X) MOS42 0080 E4CE v0D MOS42 0189 E540 48 PHA ;compensate for following PLA MOS42 0080 E4CE v0D MOS42 0190 E541 EVENT0 ;indicate event was disabled MOS42 0080 E4CE v0D MOS42 0191 E541 68 PLA MOS42 0080 E4CE v0D MOS42 0192 E542 INOBUF ;output buffer, buffer full event not applicable MOS42 0080 E4CE v0D MOS42 0193 E542 REMOV1 ;return with C=1 => insert/remove failed due to buffer full/empty MOS42 0080 E4CE v0D MOS42 0194 E542 28 PLP ;restore interrupt state MOS42 0245 E561 ^27 MOS42 0195 E543 38 SEC MOS42 0245 E561 ^27 MOS42 0196 E544 60 RTS MOS42 0245 E561 ^27 MOS42 0197 E545 MOS42 0245 E561 ^27 MOS42 0198 E545 MOS42 0245 E561 ^27 MOS42 0199 E545 CAPS ;test for an uppercase letter MOS42 0245 E561 ^27 MOS42 0200 E545 MOS42 0245 E561 ^27 MOS42 0201 E545 [ MOS125 = &FF MOS42 0245 E561 ^27 MOS42 0214 E545 | MOS42 0245 E561 ^27 MOS42 0215 E545 48 PHA MOS42 0245 E561 ^27 MOS42 0216 E546 ;Must preserve V during LOADGO->SRCH0->LOOK->CMPFT->CAPS MOS42 0245 E561 ^27 MOS42 0217 E546 ;ANDIM &DF;CMPIM "A";EORIM &FF;RORA;ADCIM "Z":SHR:1 MOS42 0245 E561 ^27 MOS42 0218 E546 ;ORAIM &20;CMPIM "z"+&01;EORIM &FF;RORA;ADCIM ("a":SHR:1):OR:&80 MOS42 0245 E561 ^27 MOS42 0219 E546 29 DF ANDIM &DF MOS42 0245 E561 ^27 MOS42 0220 E548 C9 5B CMPIM "Z"+&01 MOS42 0245 E561 ^27 MOS42 0221 E54A B0 04 BCS CAPSX MOS42 0245 E561 ^27 MOS42 0222 E54C 49 FF EORIM &FF MOS42 0245 E561 ^27 MOS42 0223 E54E C9 BF CMPIM "A"-&01:EOR:&FF MOS42 0245 E561 ^27 MOS42 0224 E550 CAPSX MOS42 0245 E561 ^27 MOS42 0225 E550 68 PLA MOS42 0245 E561 ^27 MOS42 0226 E551 ; C=0 => Pass, C=1 => Fail MOS42 0245 E561 ^27 MOS42 0227 E551 60 RTS MOS42 0245 E561 ^27 MOS42 0228 E552 ] MOS42 0245 E561 ^27 MOS42 0229 E552 MOS42 0245 E561 ^27 MOS42 0230 E552 MOS42 0245 E561 ^27 MOS42 0231 E552 RDCHS ;insert character into RDCH (keyboard) buffer MOS42 0245 E561 ^27 MOS42 0232 E552 A2 00 LDXIM BRDCH MOS42 0245 E561 ^27 MOS42 0233 E554 RNSRT MOS42 0245 E561 ^27 MOS42 0234 E554 ; insert character Y into buffer whose index is X, MOS42 0245 E561 ^27 MOS42 0235 E554 ; checking for the interrupt character (default ASCII escape) MOS42 0245 E561 ^27 MOS42 0236 E554 ; MOS42 0245 E561 ^27 MOS42 0237 E554 ; RS423 8 bit does not detect interrupt character MOS42 0245 E561 ^27 MOS42 0238 E554 8A TXA MOS42 0245 E561 ^27 MOS42 0239 E555 2D 45 02 AND RS8BIT MOS42 0245 E561 ^27 MOS42 0240 E558 D0 B7 BNE INSERT ;[RSI & RS423-8-bit, no input event] MOS42 0245 E561 ^27 MOS42 0241 E55A ; MOS42 0245 E561 ^27 MOS42 0242 E55A 98 TYA MOS42 0245 E561 ^27 MOS42 0243 E55B 4D 6C 02 EOR INTCH ;default INTCH is ESC MOS42 0245 E561 ^27 MOS42 0244 E55E 0D 75 02 ORA ESCHAR ;treat as character? MOS42 0245 E561 ^27 MOS42 0245 E561 D0 A7 BNE CKESCY ;[not escape character or let escape thru, take no action] -- MOS42 0246 E563 ; -- MOS42 0247 E563 ; ESC detected - ignore ? -- MOS42 0248 E563 AD 58 02 LDA CRIT -- MOS42 0249 E566 6A RORA -- MOS42 0250 E567 98 TYA ;A := character -- MOS42 0251 E568 B0 0A BCS CLCRTS ;[ignore escape] MOS42 0251 E568 v75 MOS42 0252 E56A ; MOS42 0251 E568 v75 MOS42 0253 E56A A0 06 LDYIM EVESC MOS42 0251 E568 v75 MOS42 0254 E56C 20 F6 E4 JSR EVENT ;N.B. does not corrupt A MOS42 0251 E568 v75 MOS42 0255 E56F 90 03 BCC CKESC1 ;[event was enabled, no need to take default action] MOS42 0251 E568 v75 MOS42 0256 E571 ; MOS42 0251 E568 v75 MOS42 0257 E571 ; event was disabled, so take default action MOS42 0251 E568 v75 MOS42 0258 E571 ; default escape routine MOS42 0251 E568 v75 MOS42 0259 E571 ; C=1 MOS42 0251 E568 v75 MOS42 0260 E571 20 D5 E6 JSR CESCPS ;set escape flag **** MUST USE ROUTINE CESCPS **** MOS42 0251 E568 v75 MOS42 0261 E574 CKESC1 ;character 'inserted' successfully MOS42 0251 E568 v75 MOS42 0262 E574 CLCRTS MOS42 MOS42 MOS42 MOS42 Acorn macro assembler Page 86 MOS42 MOS42 Buffer management MOS42 MOS42 0251 E568 v75 MOS42 0263 E574 18 CLC -- MOS42 0264 E575 ; C=0 => character inserted OK, C=1 => character not inserted -- MOS42 0265 E575 60 RTS ;RETURN - do not insert ESC into buffer -- MOS42 0266 E576 -- MOS42 0267 E576 RDCHGX ;check for cursor option 1 -- MOS42 0268 E576 6A RORA MOS42 0367 E5C1 ^33 MOS42 0269 E577 68 PLA MOS42 0367 E5C1 ^33 MOS42 0270 E578 B0 79 BCS RDCHGCLC ;[option 1 active, return &87..&8B] MOS42 0270 E578 v06 MOS42 0271 E57A ; treat as cursor option 2 MOS42 0270 E578 v06 MOS42 0272 E57A RDCHGS ;process character as real softkey MOS42 0270 E578 v06 MOS42 0273 E57A 98 TYA ;A := character MOS42 0270 E578 v06 MOS42 0274 E57B ; MOS42 0270 E578 v06 MOS42 0275 E57B 48 PHA MOS42 0270 E578 v06 MOS42 0276 E57C 4A LSRA MOS42 0270 E578 v06 MOS42 0277 E57D 4A LSRA MOS42 0270 E578 v06 MOS42 0278 E57E 4A LSRA MOS42 0270 E578 v06 MOS42 0279 E57F 4A LSRA MOS42 0270 E578 v06 MOS42 0280 E580 ; MOS42 0270 E578 v06 MOS42 0281 E580 49 04 EORIM &04 ;fudge to tie in with frozen documentation MOS42 0270 E578 v06 MOS42 0282 E582 A8 TAY MOS42 0270 E578 v06 MOS42 0283 E583 ; character on stack MOS42 0270 E578 v06 MOS42 0284 E583 ; MOS42 0270 E578 v06 MOS42 0285 E583 B9 65 02 LDAAY SOFTLO-&08 MOS42 0270 E578 v06 MOS42 0286 E586 C9 01 CMPIM &01 ;test softkey range option MOS42 0270 E578 v06 MOS42 0287 E588 F0 6B BEQ GKEY ;[expand softkey] MOS42 0270 E578 v06 MOS42 0288 E58A 68 PLA ;restore character MOS42 0270 E578 v06 MOS42 0289 E58B 90 0D BCC RDCHG1 ;[ignore key] MOS42 0270 E578 v06 MOS42 0290 E58D ; return byte code MOS42 0270 E578 v06 MOS42 0291 E58D ; C=1 MOS42 0270 E578 v06 MOS42 0292 E58D 29 0F ANDIM &0F ;A := offset of soft key MOS42 0270 E578 v06 MOS42 0293 E58F 18 CLC MOS42 0270 E578 v06 MOS42 0294 E590 79 65 02 ADCAY SOFTLO-&08 MOS42 0270 E578 v06 MOS42 0295 E593 MOS42 0270 E578 v06 MOS42 0296 E593 18 CLC MOS42 0270 E578 v06 MOS42 0297 E594 60 RTS ;read successful, character in A MOS42 0270 E578 v06 MOS42 0298 E595 MOS42 0270 E578 v06 MOS42 0299 E595 MOS42 0270 E578 v06 MOS42 0300 E595 RDCHGB MOS42 0270 E578 v06 MOS42 0301 E595 ; invalid character at cursor position MOS42 0270 E578 v06 MOS42 0302 E595 ; complain by transmitting BEL MOS42 0270 E578 v06 MOS42 0303 E595 20 95 E8 JSR BELL ;**** N.B. NOT THRU OSWRCH **** must restore X MOS42 0270 E578 v06 MOS42 0304 E598 68 PLA MOS42 0270 E578 v06 MOS42 0305 E599 AA TAX ;restore X MOS42 0270 E578 v06 MOS42 0306 E59A ; get next character MOS42 0270 E578 v06 MOS42 0307 E59A ; MOS42 0270 E578 v06 MOS42 0308 E59A RDCHG1 ;process character from currently selected input buffer MOS42 0270 E578 v06 MOS42 0309 E59A 20 C2 E4 JSR REMOV ;get character from buffer MOS42 0270 E578 v06 MOS42 0310 E59D B0 55 BCS RDCHG0 ;[buffer empty, C=1] MOS42 0270 E578 v06 MOS42 0311 E59F ; MOS42 0270 E578 v06 MOS42 0312 E59F ; C=0 MOS42 0270 E578 v06 MOS42 0313 E59F ; MOS42 0270 E578 v06 MOS42 0314 E59F ; character is in A MOS42 0270 E578 v06 MOS42 0315 E59F ; MOS42 0270 E578 v06 MOS42 0316 E59F ; check whether to set RTS hi for RS423 input MOS42 0270 E578 v06 MOS42 0317 E59F ; save A MOS42 0270 E578 v06 MOS42 0318 E59F 48 PHA MOS42 0270 E578 v06 MOS42 0319 E5A0 ; MOS42 0270 E578 v06 MOS42 0320 E5A0 ; check for RS423 input buffer MOS42 0270 E578 v06 MOS42 0321 E5A0 E0 01 CPXIM BRSI MOS42 0270 E578 v06 MOS42 0322 E5A2 D0 06 BNE RDCHL ;[keyboard buffer, C=0] MOS42 0270 E578 v06 MOS42 0323 E5A4 ; MOS42 0270 E578 v06 MOS42 0324 E5A4 20 06 E2 JSR RSETX ;set RHITXE if applicable MOS42 0270 E578 v06 MOS42 0325 E5A7 ; MOS42 0270 E578 v06 MOS42 0326 E5A7 A2 01 LDXIM BRSI ;restore bufferid MOS42 0270 E578 v06 MOS42 0327 E5A9 38 SEC MOS42 0270 E578 v06 MOS42 0328 E5AA ; MOS42 0270 E578 v06 MOS42 0329 E5AA RDCHL ;do not alter RTS MOS42 0270 E578 v06 MOS42 0330 E5AA ; C=0 => keyboard, C=1 => RS423 MOS42 0270 E578 v06 MOS42 0331 E5AA ; MOS42 0270 E578 v06 MOS42 0332 E5AA ; restore A MOS42 0270 E578 v06 MOS42 0333 E5AA 68 PLA MOS42 0270 E578 v06 MOS42 0334 E5AB ; MOS42 0270 E578 v06 MOS42 0335 E5AB 90 05 BCC RDCHK ;[keyboard] MOS42 0270 E578 v06 MOS42 0336 E5AD ; MOS42 0270 E578 v06 MOS42 0337 E5AD ; RS423 MOS42 0270 E578 v06 MOS42 0338 E5AD ; MOS42 0270 E578 v06 MOS42 0339 E5AD AC 45 02 LDY RS8BIT MOS42 0270 E578 v06 MOS42 0340 E5B0 D0 41 BNE RDCHGCLC ;[let RS423 deliver 8 bit codes] MOS42 0270 E578 v06 MOS42 0341 E5B2 RDCHK MOS42 0270 E578 v06 MOS42 0342 E5B2 ; MOS42 0270 E578 v06 MOS42 0343 E5B2 ; test to see if it is a softkey (real or pseudo) MOS42 0270 E578 v06 MOS42 0344 E5B2 A8 TAY ;Y := character MOS42 0270 E578 v06 MOS42 0345 E5B3 10 3E BPL RDCHGCLC ;[not a soft key (top bit zero), C=0] MOS42 0270 E578 v06 MOS42 0346 E5B5 MOS42 0270 E578 v06 MOS42 0347 E5B5 [ FALSE=0 MOS42 0270 E578 v06 MOS42 0350 E5B5 ] MOS42 0270 E578 v06 MOS42 0351 E5B5 MOS42 0270 E578 v06 MOS42 0352 E5B5 ; character is a softkey MOS42 0270 E578 v06 MOS42 0353 E5B5 ; check for cursor control key MOS42 0270 E578 v06 MOS42 0354 E5B5 29 0F ANDIM &0F MOS42 0270 E578 v06 MOS42 0355 E5B7 C9 0B CMPIM MCOPY-SOFTK0 MOS42 0270 E578 v06 MOS42 0356 E5B9 90 BF BCC RDCHGS ;[not a cursor control, therefore a real softkey] MOS42 0270 E578 v06 MOS42 0357 E5BB ; cursor control key MOS42 0270 E578 v06 MOS42 0358 E5BB ; C=1 MOS42 0270 E578 v06 MOS42 0359 E5BB ; convert character to codes &87..&8B MOS42 0270 E578 v06 MOS42 0360 E5BB 69 7B ADCIM &87-MCOPY+SOFTK0-&1 MOS42 0270 E578 v06 MOS42 0361 E5BD 48 PHA ;save converted code, real character still in Y MOS42 0270 E578 v06 MOS42 0362 E5BE ; there are 3 cursor options (selected by *FX4) MOS42 0270 E578 v06 MOS42 0363 E5BE ; 0 cursor edit VDU MOS42 0270 E578 v06 MOS42 0364 E5BE ; 1 return codes &87..&8B MOS42 0270 E578 v06 MOS42 0365 E5BE ; 2 treat as softkey MOS42 0270 E578 v06 MOS42 0366 E5BE AD 7D 02 LDA CURSED MOS42 0270 E578 v06 MOS42 0367 E5C1 D0 B3 BNE RDCHGX ;[not option 0] MOS42 0270 E578 v06 MOS42 0368 E5C3 ; option 0 MOS42 0270 E578 v06 MOS42 0369 E5C3 ; check if output to VDU MOS42 0270 E578 v06 MOS42 0370 E5C3 AD 7C 02 LDA WRCHSW MOS42 0270 E578 v06 MOS42 0371 E5C6 6A RORA MOS42 0270 E578 v06 MOS42 0372 E5C7 6A RORA MOS42 0270 E578 v06 MOS42 0373 E5C8 68 PLA ;restore converted code MOS42 0270 E578 v06 MOS42 0374 E5C9 B0 CF BCS RDCHG1 ;[ignore character, output not to VDU] MOS42 0270 E578 v06 MOS42 0375 E5CB ; let VDU process code MOS42 0270 E578 v06 MOS42 0376 E5CB C9 87 CMPIM &87 MOS42 0270 E578 v06 MOS42 0377 E5CD F0 38 BEQ RDCHGY ;[COPY key] MOS42 0270 E578 v06 MOS42 0378 E5CF ; cursor direction key MOS42 0270 E578 v06 MOS42 0379 E5CF A8 TAY ;save X MOS42 0270 E578 v06 MOS42 0380 E5D0 8A TXA MOS42 0270 E578 v06 MOS42 0381 E5D1 48 PHA MOS42 0270 E578 v06 MOS42 0382 E5D2 98 TYA MOS42 0270 E578 v06 MOS42 0383 E5D3 20 60 D8 JSR VDUB ;N.B. cursor control entry point MOS42 0270 E578 v06 MOS42 0384 E5D6 68 PLA MOS42 0270 E578 v06 MOS42 0385 E5D7 AA TAX ;restore X MOS42 MOS42 MOS42 MOS42 Acorn macro assembler Page 87 MOS42 MOS42 Buffer management MOS42 MOS42 0270 E578 v06 MOS42 0386 E5D8 ; falling thru will transfer control to RDCHG1 MOS42 0270 E578 v06 MOS42 0387 E5D8 RDCHG MOS42 0270 E578 v06 MOS42 0388 E5D8 ; FETCH CHAR FROM RDCH BUFFER MOS42 0270 E578 v06 MOS42 0389 E5D8 ; EXPAND SOFT KEYS AS NECESSARY MOS42 0270 E578 v06 MOS42 0390 E5D8 ; PASS CURSOR CONTROL KEYS MOS42 0270 E578 v06 MOS42 0391 E5D8 ; STRAIGHT TO VDU DRIVER MOS42 0270 E578 v06 MOS42 0392 E5D8 ; RETURN CARRY SET IF CHARACTER MOS42 0270 E578 v06 MOS42 0393 E5D8 ; AVAILABLE MOS42 0270 E578 v06 MOS42 0394 E5D8 ; MOS42 0270 E578 v06 MOS42 0395 E5D8 ; check for ECONET interception MOS42 0270 E578 v06 MOS42 0396 E5D8 ; MOS42 0270 E578 v06 MOS42 0397 E5D8 2C 5F 02 BIT NETRDC MOS42 0270 E578 v06 MOS42 0398 E5DB 10 05 BPL RDCHNM ;[normal RDCH] MOS42 0270 E578 v06 MOS42 0399 E5DD ; MOS42 0270 E578 v06 MOS42 0400 E5DD ; let network supply character MOS42 0270 E578 v06 MOS42 0401 E5DD ; MOS42 0270 E578 v06 MOS42 0402 E5DD A9 06 LDAIM NTRDCH MOS42 0270 E578 v06 MOS42 0403 E5DF 6C 24 02 JMINET JMI NETVEC ;network operation call, results returned in A and C MOS42 0270 E578 v06 MOS42 0404 E5E2 MOS42 0270 E578 v06 MOS42 0405 E5E2 MOS42 0270 E578 v06 MOS42 0406 E5E2 RDCHNM ;not reading from network MOS42 0270 E578 v06 MOS42 0407 E5E2 AD 68 02 LDA SOFKL MOS42 0270 E578 v06 MOS42 0408 E5E5 F0 B3 BEQ RDCHG1 ;[no pending soft key expansion] MOS42 0270 E578 v06 MOS42 0409 E5E7 AC C9 02 LDY SOFKP MOS42 0270 E578 v06 MOS42 0410 E5EA B9 01 0B LDAAY SKBUF ;GET EXPANSION CHAR MOS42 0270 E578 v06 MOS42 0411 E5ED EE C9 02 INC SOFKP ;increment pointer into soft key buffer MOS42 0270 E578 v06 MOS42 0412 E5F0 CE 68 02 DEC SOFKL ;decrement remaining count of soft key characters MOS42 0270 E578 v06 MOS42 0413 E5F3 RDCHGCLC MOS42 0270 E578 v06 MOS42 0414 E5F3 18 CLC ;C=0 => character read successfully MOS42 0434 E60D ^06 MOS42 0415 E5F4 RDCHG0 MOS42 0434 E60D ^06 MOS42 0416 E5F4 60 RTS MOS42 0434 E60D ^06 MOS42 0417 E5F5 MOS42 0434 E60D ^06 MOS42 0418 E5F5 GKEY ;soft key detected AND soft keys enabled MOS42 0434 E60D ^06 MOS42 0419 E5F5 68 PLA ;restore softkey code MOS42 0434 E60D ^06 MOS42 0420 E5F6 29 0F ANDIM &0F ;convert to soft key number in range 0-15 (assumes SFTKY0=$x0)) MOS42 0434 E60D ^06 MOS42 0421 E5F8 A8 TAY ;Y := soft key number MOS42 0434 E60D ^06 MOS42 0422 E5F9 20 0A E4 JSR SKSIZE ;A := length of soft key string given by Y MOS42 0434 E60D ^06 MOS42 0423 E5FC 8D 68 02 STA SOFKL ;SOFKL := length of soft key string MOS42 0434 E60D ^06 MOS42 0424 E5FF ; N.B. X = soft key number MOS42 0434 E60D ^06 MOS42 0425 E5FF B9 00 0B LDAAY SKPTR MOS42 0434 E60D ^06 MOS42 0426 E602 8D C9 02 STA SOFKP ;SOFKP points to key string (N.B. pointer always <> 0) MOS42 0434 E60D ^06 MOS42 0427 E605 D0 D1 BNE RDCHG ;[ALWAYS JUMP] MOS42 0434 E60D ^06 MOS42 0428 E607 MOS42 0434 E60D ^06 MOS42 0429 E607 RDCHGY ;copy character at text cursor position MOS42 0434 E60D ^06 MOS42 0430 E607 8A TXA MOS42 0434 E60D ^06 MOS42 0431 E608 48 PHA ;save X MOS42 0434 E60D ^06 MOS42 0432 E609 20 97 D8 JSR COPYCH ;N.B. VDU sets Z bit, but this is not used MOS42 0434 E60D ^06 MOS42 0433 E60C A8 TAY ;save character MOS42 0434 E60D ^06 MOS42 0434 E60D F0 86 BEQ RDCHGB ;[invalid character at text cursor] -- MOS42 0435 E60F ; valid character at cursor position -- MOS42 0436 E60F 68 PLA -- MOS42 0437 E610 AA TAX ;restore X -- MOS42 0438 E611 98 TYA ;restore character -- MOS42 0439 E612 ; C=0, character in A -- MOS42 0440 E612 18 CLC -- MOS42 0441 E613 60 RTS -- MOS42 0442 E614 -- MOS42 0443 E614 -- MOS42 0444 E614 LNK MOS44 -- MOS44 0001 E614 ; > MOS44 -- MOS44 0002 E614 TTL MOS44 OSBYTE routines -- MOS44 0003 E614 OPT MOS44 MOS44 MOS44 MOS44 MOS44 Acorn macro assembler Page 88 MOS44 MOS44 OSBYTE routines MOS44 -- MOS44 0004 E614 ;(c) 1981 ACORN Computers Limited -- MOS44 0005 E614 ;BBC Microcomputer Machine Operating System (MOS) -- MOS44 0006 E614 ;Change record: -- MOS44 0007 E614 ;01-Mar-82 PB PEEK and POKE introduced -- MOS44 0008 E614 ;Author(s): -- MOS44 0009 E614 ;PB Paul Bond -- MOS44 0010 E614 -- MOS44 0011 E614 -- MOS44 0012 E614 BYTET ;table for OSBYTE. N.B. lo-byte followed by hi-byte -- MOS44 0013 E614 ; -- MOS44 0014 E614 ; 0 indicate version number -- MOS44 0015 E614 ; X=0 => BRK message -- MOS44 0016 E614 ; X<>0 => return version number in X -- MOS44 0017 E614 77 EA & VER -- MOS44 0018 E616 -- MOS44 0019 E616 ; -- MOS44 0020 E616 ; 1 set value -- MOS44 0021 E616 AB E9 & V2B156 -- MOS44 0022 E618 -- MOS44 0023 E618 ; -- MOS44 0024 E618 ; 2 select input stream -- MOS44 0025 E618 ; X=0 => select keyboard, disable RS423 -- MOS44 0026 E618 ; X=1 => select RS423, enable RS423 -- MOS44 0027 E618 ; X=2 => select keyboard, enable RS423 -- MOS44 0028 E618 33 E7 & SELIN -- MOS44 0029 E61A -- MOS44 0030 E61A ; -- MOS44 0031 E61A ; 3 select output stream(s) -- MOS44 0032 E61A ; X=rrrrspvl -- MOS44 0033 E61A ; r (reserved) -- MOS44 0034 E61A ; s=0 => spooling enabled -- MOS44 0035 E61A ; p=0 => printing enabled -- MOS44 0036 E61A ; v=0 => output to VDU enabled -- MOS44 0037 E61A ; l=1 => output to RS423 enabled -- MOS44 0038 E61A BA E9 & V2B34 -- MOS44 0039 E61C -- MOS44 0040 E61C ; -- MOS44 0041 E61C ; 4 enable/disable cursor edit -- MOS44 0042 E61C ; X=0 => cursor editing enabled -- MOS44 0043 E61C ; X=1 => COPY/LEFT/RIGHT/DOWN/UP return $87/$88/$89/$8A/$8B -- MOS44 0044 E61C ; X=2 => COPY/LEFT/RIGHT/DOWN/UP at as soft keys 11 thru 15 -- MOS44 0045 E61C BA E9 & V2B34 -- MOS44 0046 E61E -- MOS44 0047 E61E ; -- MOS44 0048 E61E ; 5 select print destination -- MOS44 0049 E61E ; X=0 => infinite sink -- MOS44 0050 E61E ; X=1 => centronics -- MOS44 0051 E61E ; X=2 => RS423 -- MOS44 0052 E61E 99 E9 & SPRINT -- MOS44 0053 E620 -- MOS44 0054 E620 ; -- MOS44 0055 E620 ; 6 set printer ignore character -- MOS44 0056 E620 ; X=0 => ignore no characters -- MOS44 0057 E620 ; X<>0 => ignore character -- MOS44 0058 E620 AB E9 & V2B156 -- MOS44 0059 E622 -- MOS44 0060 E622 ; -- MOS44 0061 E622 ; 7 set RS423 receive baud rate -- MOS44 0062 E622 ; X=0 => set default (9600) -- MOS44 0063 E622 ; X=1/2/3/4/5/6/7/8 => 75/150/300/1200/2400/4800/9600/19200 -- MOS44 0064 E622 EB E6 & RXBAUD -- MOS44 0065 E624 -- MOS44 0066 E624 ; -- MOS44 0067 E624 ; 8 set RS423 trasmit baud rate -- MOS44 0068 E624 ; [values as for OSBYTE(7)] -- MOS44 0069 E624 E9 E6 & TXBAUD -- MOS44 0070 E626 -- MOS44 0071 E626 ; -- MOS44 0072 E626 ; 9 set flash mark period -- MOS44 0073 E626 ; X=0 => infinite -- MOS44 0074 E626 ; X<>0 => * 20 milliseconds -- MOS44 0075 E626 10 E7 & FMRK -- MOS44 0076 E628 -- MOS44 0077 E628 ; -- MOS44 0078 E628 ; 10 set flash space period -- MOS44 0079 E628 ; 9 set flash mark period -- MOS44 0080 E628 ; X=0 => infinite -- MOS44 0081 E628 ; X<>0 => * 20 milliseconds -- MOS44 0082 E628 12 E7 & FSPC -- MOS44 0083 E62A -- MOS44 0084 E62A ; -- MOS44 0085 E62A ; 11 set auto-repeat delay period -- MOS44 0086 E62A ; X=0 => suppress auto-repeat -- MOS44 0087 E62A ; X<>0 => set delay between first and second character to centiseconds -- MOS44 0088 E62A B8 E9 & ARDLY -- MOS44 0089 E62C -- MOS44 0090 E62C ; -- MOS44 0091 E62C ; 12 set auto-repeat repeat period -- MOS44 0092 E62C ; X=0 => set delay and period to values on power-up -- MOS44 0093 E62C ; X<>0 => set period between subsequent characters to centiseconds -- MOS44 0094 E62C AF E9 & ARRPT -- MOS44 0095 E62E -- MOS44 0096 E62E ; -- MOS44 0097 E62E ; 13 disable event -- MOS44 0098 E62E ; X=event_code -- MOS44 0099 E62E ; 0: output buffer empty -- MOS44 0100 E62E ; 1: input buffer full -- MOS44 0101 E62E ; 2: character entering input buffer -- MOS44 0102 E62E ; 3: ADC conversion complete -- MOS44 0103 E62E ; 4: vertical SYNC -- MOS44 0104 E62E ; 5: interval timer crossing zero -- MOS44 0105 E62E ; 6: ESCAPE detected -- MOS44 0106 E62E ; 7: RS423 error -- MOS44 0107 E62E 59 E7 & MDSABL -- MOS44 0108 E630 -- MOS44 0109 E630 ; -- MOS44 0110 E630 ; 14 enable event -- MOS44 0111 E630 ; [values as for OSBYTE(13)] -- MOS44 0112 E630 5A E7 & ENABLE -- MOS44 0113 E632 -- MOS44 0114 E632 ; -- MOS44 0115 E632 ; 15 flush buffer class -- MOS44 0116 E632 ; X=0 => flush all buffers -- MOS44 0117 E632 ; X=1 => flush currently selected input buffer -- MOS44 0118 E632 96 E1 & FLUSHC -- MOS44 0119 E634 -- MOS44 0120 E634 ; -- MOS44 0121 E634 ; 16 select number of ADC channels -- MOS44 0122 E634 ; X=0 => stop scanning ADC channels -- MOS44 0123 E634 ; X=1/2/3/4 => only scan channels 1 thru -- MOS44 0124 E634 66 E7 & SETADC MOS44 MOS44 MOS44 MOS44 Acorn macro assembler Page 89 MOS44 MOS44 OSBYTE routines MOS44 -- MOS44 0125 E636 -- MOS44 0126 E636 ; -- MOS44 0127 E636 ; 17 start ADC conversion on channel X -- MOS44 0128 E636 ; X=1/2/3/4 => start conversion on channel -- MOS44 0129 E636 38 DE & ADCBEG -- MOS44 0130 E638 -- MOS44 0131 E638 ; -- MOS44 0132 E638 ; 18 reset soft keys -- MOS44 0133 E638 EB E9 & RSOFT -- MOS44 0134 E63A -- MOS44 0135 E63A ; -- MOS44 0136 E63A ; 19 wait for vertical sync -- MOS44 0137 E63A D9 E9 & WFVS -- MOS44 0138 E63C -- MOS44 0139 E63C ; -- MOS44 0140 E63C ; 20 implode/explode soft font -- MOS44 0141 E63C FD CC & FONT -- MOS44 0142 E63E -- MOS44 0143 E63E ; -- MOS44 0144 E63E ; 21 flush specific buffer -- MOS44 0145 E63E A2 E1 & FLUSHS -- MOS44 0146 E640 -- MOS44 0147 E640 ; -- MOS44 0148 E640 0016 BYTEL * .-BYTET:SHR: 1 ;next entry in BYTETL table (lo component) -- MOS44 0149 E640 ; -- MOS44 0150 E640 BYTET2 -- MOS44 0151 E640 0075 BYTEM * &0075 -- MOS44 0152 E640 ; -- MOS44 0153 E640 ; -- MOS44 0154 E640 92 E8 & VDUST ;read VDU status; $75 -- MOS44 0155 E642 -- MOS44 0156 E642 ; -- MOS44 0157 E642 FC E9 & MOSTST ;reflect state of KSTAT; $76 -- MOS44 0158 E644 -- MOS44 0159 E644 ; -- MOS44 0160 E644 EF E2 & SHUTES ;close EXEC and SPOOL files; $77 -- MOS44 0161 E646 -- MOS44 0162 E646 ; -- MOS44 0163 E646 52 F2 & OLDKEY ;set keyboard old key; $78 -- MOS44 0164 E648 -- MOS44 0165 E648 ; -- MOS44 0166 E648 D5 F0 & XSCANB ;scan keyboard at specific address; $79 -- MOS44 0167 E64A -- MOS44 0168 E64A ; -- MOS44 0169 E64A D3 F0 & XSCANA ;scan keyboard from matrix entry $10; $7A -- MOS44 0170 E64C -- MOS44 0171 E64C ; -- MOS44 0172 E64C 2A E2 & PFREE ;indicate printer dormant; $7B -- MOS44 0173 E64E -- MOS44 0174 E64E ; -- MOS44 0175 E64E D4 E6 & CESCPC ;clear escape flag; $7C -- MOS44 0176 E650 -- MOS44 0177 E650 ; -- MOS44 0178 E650 D5 E6 & CESCPS ;set escape flag; $7D -- MOS44 0179 E652 -- MOS44 0180 E652 ; -- MOS44 0181 E652 BD E6 & CESCP ;clear escape flag and purge selected input buffer; $7E -- MOS44 0182 E654 -- MOS44 0183 E654 ; -- MOS44 0184 E654 C3 F0 & EOF ;end of file; $7F -- MOS44 0185 E656 -- MOS44 0186 E656 ; -- MOS44 0187 E656 ; $80 -- MOS44 0188 E656 ;; read data on ADC channel -- MOS44 0189 E656 ; in: Y>=0 => X=0 => read control information -- MOS44 0190 E656 ; X<>0 => read last conversion on channel X -- MOS44 0191 E656 ; Y<0 => read info for buffer NOT(X) -- MOS44 0192 E656 ; out: Y>=0 => X=0 => X=fire-buttons, Y=last-channel-to-convert -- MOS44 0193 E656 ; X<>0 => X=lo-data, Y=hi-data -- MOS44 0194 E656 ; Y<0 => X=buffer-count (input: bytes ready, output: bytes left) -- MOS44 0195 E656 AF E7 & RADCX -- MOS44 0196 E658 -- MOS44 0197 E658 ; -- MOS44 0198 E658 ; $81 -- MOS44 0199 E658 ; read key with time limit -- MOS44 0200 E658 ; in: Y>=0 => X=lo-count, Y=hi-count (centiseconds) -- MOS44 0201 E658 ; Y<0 => X=NOT(key-matrix-address) -- MOS44 0202 E658 ; out: Y>=0 => Y=$00 => X=character -- MOS44 0203 E658 ; Y=$1B => escape condition detected -- MOS44 0204 E658 ; Y=$FF => timeout -- MOS44 0205 E658 ; Y<0 => X=0 => key not pressed -- MOS44 0206 E658 ; X<>0 => key pressed -- MOS44 0207 E658 73 E7 & INKY -- MOS44 0208 E65A -- MOS44 0209 E65A ; -- MOS44 0210 E65A ; $82 -- MOS44 0211 E65A ; read machine high order address -- MOS44 0212 E65A ; out: X = lo-component, Y = hi-component -- MOS44 0213 E65A 89 E7 & RMHA -- MOS44 0214 E65C -- MOS44 0215 E65C ; -- MOS44 0216 E65C ; $83 -- MOS44 0217 E65C ; read operating system high water mark -- MOS44 0218 E65C ; out: X = lo-address, Y = hi-address -- MOS44 0219 E65C B2 F0 & RMLA -- MOS44 0220 E65E -- MOS44 0221 E65E ; -- MOS44 0222 E65E ; $84 -- MOS44 0223 E65E ; read address of start of current screen mode -- MOS44 0224 E65E ; out: X = lo-address, Y = hi-address -- MOS44 0225 E65E B5 D8 & TOPCMD -- MOS44 0226 E660 -- MOS44 0227 E660 ; -- MOS44 0228 E660 ; $85 -- MOS44 0229 E660 ; read address of start of screen for mode X -- MOS44 0230 E660 ; in: X = mode -- MOS44 0231 E660 ; out: X = lo-address, Y = hi-address -- MOS44 0232 E660 B8 D8 & TOPMDX -- MOS44 0233 E662 -- MOS44 0234 E662 ; -- MOS44 0235 E662 ; $86 -- MOS44 0236 E662 ;; read text cursor position -- MOS44 0237 E662 ; out: X = x-text-coord, Y = y-text-coord -- MOS44 0238 E662 E4 D5 & CSRPOS -- MOS44 0239 E664 -- MOS44 0240 E664 ; -- MOS44 0241 E664 ; $87 -- MOS44 0242 E664 ;; read character at text cursor -- MOS44 0243 E664 ; out: X=0 => no character at cursor position -- MOS44 0244 E664 ; X<>0 => X=character -- MOS44 0245 E664 ; Y = current screen mode MOS44 MOS44 MOS44 MOS44 Acorn macro assembler Page 90 MOS44 MOS44 OSBYTE routines MOS44 -- MOS44 0246 E664 5C D7 & READCH -- MOS44 0247 E666 -- MOS44 0248 E666 ; -- MOS44 0249 E666 ; $88 -- MOS44 0250 E666 ; *CODE X, Y -- MOS44 0251 E666 ; in: X = arg, Y = arg -- MOS44 0252 E666 ; out: C = return code -- MOS44 0253 E666 ; X = return code -- MOS44 0254 E666 ; Y = return code -- MOS44 0255 E666 B8 E6 & MCODE -- MOS44 0256 E668 -- MOS44 0257 E668 ; -- MOS44 0258 E668 ; $89 -- MOS44 0259 E668 ; *MOTOR X, Y -- MOS44 0260 E668 ; in: X=0 => turn motor off -- MOS44 0261 E668 ; X=1 => turn motor on -- MOS44 0262 E668 ; Y => motor selection -- MOS44 0263 E668 DF E6 & MOTOR ;MOTOR command; $89 -- MOS44 0264 E66A -- MOS44 0265 E66A ; -- MOS44 0266 E66A ; $8A -- MOS44 0267 E66A ; insert character into buffer -- MOS44 0268 E66A ; in: X = bufferid, Y = character -- MOS44 0269 E66A 11 E5 & INSERT -- MOS44 0270 E66C -- MOS44 0271 E66C ; -- MOS44 0272 E66C ; $8B -- MOS44 0273 E66C ; *OPT X, Y -- MOS44 0274 E66C ; in: X = arg, Y = arg (effect is filing system dependent) -- MOS44 0275 E66C C2 F0 & OPT -- MOS44 0276 E66E -- MOS44 0277 E66E ; -- MOS44 0278 E66E ; $8C -- MOS44 0279 E66E ; *TAPE X, Y -- MOS44 0280 E66E ; in: X=0 => tape filing system at default baud rate (1200 baud) -- MOS44 0281 E66E ; X=3 => tape filing system at 300 baud -- MOS44 0282 E66E ; X=12 => tape filing system at 1200 baud -- MOS44 0283 E66E ; Y=$00 => tape filing system is cassette -- MOS44 0284 E66E ; Y=$FF => tape filing system is ROMs -- MOS44 0285 E66E 47 F1 & TAPE -- MOS44 0286 E670 -- MOS44 0287 E670 ; -- MOS44 0288 E670 ; $8D -- MOS44 0289 E670 ; *ROM X, Y -- MOS44 0290 E670 ; X and Y ignored -- MOS44 0291 E670 47 F1 & CROM -- MOS44 0292 E672 -- MOS44 0293 E672 ; -- MOS44 0294 E672 ; $8E -- MOS44 0295 E672 ; enter language -- MOS44 0296 E672 ; in: X = ROMid of language, Y = arg -- MOS44 0297 E672 AA DB & SELANG -- MOS44 0298 E674 -- MOS44 0299 E674 ; -- MOS44 0300 E674 ; $8F -- MOS44 0301 E674 ; call paged ROM function -- MOS44 0302 E674 ; in: X = reason code, Y = arg -- MOS44 0303 E674 ; out: C = return code -- MOS44 0304 E674 ; Y = return code -- MOS44 0305 E674 6C F1 & SVOP -- MOS44 0306 E676 -- MOS44 0307 E676 ; -- MOS44 0308 E676 ; $90 -- MOS44 0309 E676 ; alter TV characteristics -- MOS44 0310 E676 ; in: X = vertical sync adjust, Y = interlace adjust -- MOS44 0311 E676 4D EB & TV -- MOS44 0312 E678 -- MOS44 0313 E678 ; -- MOS44 0314 E678 ; $91 -- MOS44 0315 E678 ; remove character from buffer -- MOS44 0316 E678 ; in: X = bufferid -- MOS44 0317 E678 ; out: C=0 => Y=character -- MOS44 0318 E678 ; C=1 => buffer empty -- MOS44 0319 E678 C2 E4 & REMOV -- MOS44 0320 E67A -- MOS44 0321 E67A [ MOS125 = &FF -- MOS44 0360 E67A | -- MOS44 0361 E67A ; -- MOS44 0362 E67A ; $92 -- MOS44 0363 E67A ; read from FRED -- MOS44 0364 E67A ; in: X = offset -- MOS44 0365 E67A ; out: Y = value -- MOS44 0366 E67A 40 EA & CHEQUE -- MOS44 0367 E67C -- MOS44 0368 E67C ; -- MOS44 0369 E67C ; $93 -- MOS44 0370 E67C ; write to FRED -- MOS44 0371 E67C ; in: X = offset, Y = value -- MOS44 0372 E67C 40 EA & CHEQUE -- MOS44 0373 E67E -- MOS44 0374 E67E ; -- MOS44 0375 E67E ; $94 -- MOS44 0376 E67E ; read from JIM -- MOS44 0377 E67E ; in: X = offset -- MOS44 0378 E67E ; out: Y = value -- MOS44 0379 E67E 40 EA & CHEQUE -- MOS44 0380 E680 -- MOS44 0381 E680 ; -- MOS44 0382 E680 ; $95 -- MOS44 0383 E680 ; write to JIM -- MOS44 0384 E680 ; in: X = offset, Y = value -- MOS44 0385 E680 40 EA & CHEQUE -- MOS44 0386 E682 -- MOS44 0387 E682 ; -- MOS44 0388 E682 ; $96 -- MOS44 0389 E682 ; read from SHEILA -- MOS44 0390 E682 ; in: X = offset -- MOS44 0391 E682 ; out: Y = value -- MOS44 0392 E682 40 EA & CHEQUE -- MOS44 0393 E684 -- MOS44 0394 E684 ; -- MOS44 0395 E684 ; $97 -- MOS44 0396 E684 ; write to SHEILA -- MOS44 0397 E684 ; in: X = offset, Y = value -- MOS44 0398 E684 40 EA & CHEQUE -- MOS44 0399 E686 ] -- MOS44 0400 E686 -- MOS44 0401 E686 ; -- MOS44 0402 E686 ; $98 -- MOS44 0403 E686 ; examine character in buffer -- MOS44 0404 E686 ; in: X = bufferid MOS44 MOS44 MOS44 MOS44 Acorn macro assembler Page 91 MOS44 MOS44 OSBYTE routines MOS44 -- MOS44 0405 E686 ; out: C=0 => Y=character -- MOS44 0406 E686 ; C=1 => buffer empty -- MOS44 0407 E686 BD E4 & EXAM -- MOS44 0408 E688 -- MOS44 0409 E688 ; -- MOS44 0410 E688 ; $99 -- MOS44 0411 E688 ; insert character into buffer dealing with ESC code -- MOS44 0412 E688 ; in: X = bufferid, Y = character -- MOS44 0413 E688 54 E5 & RNSRT -- MOS44 0414 E68A -- MOS44 0415 E68A ; -- MOS44 0416 E68A ;; $9A -- MOS44 0417 E68A ; update vidproc control register -- MOS44 0418 E68A ; in: X = value -- MOS44 0419 E68A 22 EA & VP0 -- MOS44 0420 E68C -- MOS44 0421 E68C ; -- MOS44 0422 E68C ; $9B -- MOS44 0423 E68C ; update vidproc palette register -- MOS44 0424 E68C ; in: X = value EOR $07 -- MOS44 0425 E68C 33 EA & VP1 -- MOS44 0426 E68E -- MOS44 0427 E68E ; -- MOS44 0428 E68E ; $9C -- MOS44 0429 E68E ; update 6850 ACIA -- MOS44 0430 E68E ; in: X = value, Y = mask -- MOS44 0431 E68E 0F E2 & RS423 -- MOS44 0432 E690 -- MOS44 0433 E690 ; -- MOS44 0434 E690 ; $9D -- MOS44 0435 E690 ; fast tube BPUT -- MOS44 0436 E690 ; in: X = byte, Y = handle -- MOS44 0437 E690 66 FF & FXBPUT -- MOS44 0438 E692 -- MOS44 0439 E692 ; -- MOS44 0440 E692 ; $9E -- MOS44 0441 E692 ; read from speech chip -- MOS44 0442 E692 ; in: Y = command -- MOS44 0443 E692 ; out: Y = result -- MOS44 0444 E692 A7 EE & RSPECH -- MOS44 0445 E694 -- MOS44 0446 E694 ; -- MOS44 0447 E694 ; $9F -- MOS44 0448 E694 ; write to speech chip -- MOS44 0449 E694 ; in: Y = command -- MOS44 0450 E694 B9 EE & WSPECH -- MOS44 0451 E696 -- MOS44 0452 E696 ; -- MOS44 0453 E696 ; $A0 -- MOS44 0454 E696 ; read VDU variables -- MOS44 0455 E696 ; in: X = index -- MOS44 0456 E696 ; out: X = variable0, Y = variable1 -- MOS44 0457 E696 E3 E9 & VDUVAR -- MOS44 0458 E698 -- MOS44 0459 E698 ; -- MOS44 0460 E698 00A1 BYTEH * .-BYTET2:SHR: 1+BYTEM ;next entry in BYTET table (hi component) -- MOS44 0461 E698 ; -- MOS44 0462 E698 BF E9 & SETV ;set variable -- MOS44 0463 E69A -- MOS44 0464 E69A ; -- MOS44 0465 E69A BA E6 & JMIUSR ;OSWORD calls >=$E0 -- MOS44 0466 E69C -- MOS44 0467 E69C -- MOS44 0468 E69C -- MOS44 0469 E69C WORDT ;table for OSWORD. N.B. lo-byte followed by hi-byte -- MOS44 0470 E69C ; -- MOS44 0471 E69C 21 E9 & RDLN ;read line; $00 -- MOS44 0472 E69E -- MOS44 0473 E69E ; -- MOS44 0474 E69E F7 E8 & RATM ;read absolute time; $01 -- MOS44 0475 E6A0 -- MOS44 0476 E6A0 ; -- MOS44 0477 E6A0 06 E9 & WATM ;write absolute time; $02 -- MOS44 0478 E6A2 -- MOS44 0479 E6A2 ; -- MOS44 0480 E6A2 F3 E8 & RITM ;read interval time; $03 -- MOS44 0481 E6A4 -- MOS44 0482 E6A4 ; -- MOS44 0483 E6A4 0A E9 & WITM ;write interval time; $04 -- MOS44 0484 E6A6 -- MOS44 0485 E6A6 ; -- MOS44 0486 E6A6 64 EA & PEEK ;PEEK; $05 -- MOS44 0487 E6A8 -- MOS44 0488 E6A8 ; -- MOS44 0489 E6A8 65 EA & POKE ;POKE; $06 -- MOS44 0490 E6AA -- MOS44 0491 E6AA ; -- MOS44 0492 E6AA 0007 OSWSND * .-WORDT:SHR: 1 -- MOS44 0493 E6AA ; -- MOS44 0494 E6AA 53 E8 & NOTE ;sound; $07 -- MOS44 0495 E6AC -- MOS44 0496 E6AC ; -- MOS44 0497 E6AC D4 E8 & NVLP ;define envelope; $08 -- MOS44 0498 E6AE -- MOS44 0499 E6AE ; -- MOS44 0500 E6AE 34 C7 & RPXLXY ;read pixel at given coordinate to X; $09 -- MOS44 0501 E6B0 -- MOS44 0502 E6B0 ; -- MOS44 0503 E6B0 CF CB & RCHDEF ;read character definition of XY to XY+1..8; $0A -- MOS44 0504 E6B2 -- MOS44 0505 E6B2 ; -- MOS44 0506 E6B2 7A C7 & RPALET ;read palette for XY to XY+1..4; $0B -- MOS44 0507 E6B4 -- MOS44 0508 E6B4 ; -- MOS44 0509 E6B4 C6 C8 & PRPAL ;programme palette; $0C -- MOS44 0510 E6B6 -- MOS44 0511 E6B6 ; -- MOS44 0512 E6B6 80 D5 & CSREAD ;cursor read; $0D -- MOS44 0513 E6B8 -- MOS44 0514 E6B8 ; -- MOS44 0515 E6B8 000E WORDN * .-WORDT:SHR: 1 ;number of entries in WORDT table -- MOS44 0516 E6B8 -- MOS44 0517 E6B8 -- MOS44 0518 E6B8 [ NOSP = &00 -- MOS44 0520 E6B8 | -- MOS44 0521 E6B8 MCODE ;call user code -- MOS44 0522 E6B8 A9 00 LDAIM ZERO -- MOS44 0523 E6BA 6C 00 02 JMIUSR JMI USRVEC ;user OSBYTE call/OSWORD calls -- MOS44 0524 E6BD ] -- MOS44 0525 E6BD -- MOS44 0526 E6BD MOS44 MOS44 MOS44 MOS44 Acorn macro assembler Page 92 MOS44 MOS44 OSBYTE routines MOS44 -- MOS44 0527 E6BD ; OSBYTE specific routines -- MOS44 0528 E6BD ; N.B. routines must exit with PLP to restore -- MOS44 0529 E6BD ; caller's interrupt state -- MOS44 0530 E6BD CESCP ;clear escape flag ad purge selected input buffer -- MOS44 0531 E6BD A2 00 LDXIM ZERO ;indicate escape not cleared -- MOS44 0532 E6BF 24 FF BIT ESCFLG -- MOS44 0533 E6C1 10 11 BPL CESCPC ;[no escape to clear] MOS44 0533 E6C1 v6E MOS44 0534 E6C3 ; bypass procedure ? MOS44 0533 E6C1 v6E MOS44 0535 E6C3 AD 76 02 LDA EAOPT MOS44 0533 E6C1 v6E MOS44 0536 E6C6 D0 0A BNE CESCX ;[bypass normal acknowledge procedure] MOS44 0533 E6C1 v6E MOS44 0537 E6C8 ; Z=1, A=$00 MOS44 0533 E6C1 v6E MOS44 0538 E6C8 ; close exec file MOS44 0533 E6C1 v6E MOS44 0539 E6C8 58 CLI ;********** (close may be a long operation) MOS44 0533 E6C1 v6E MOS44 0540 E6C9 8D 69 02 STA LINES ;reset page mode page origin MOS44 0533 E6C1 v6E MOS44 0541 E6CC 20 C3 F6 JSR EXEC ;just close exec file, N.B. needs Z=1, A=$00 MOS44 0533 E6C1 v6E MOS44 0542 E6CF ; flush all buffers and clear soft key expansion MOS44 0533 E6C1 v6E MOS44 0543 E6CF 20 98 E1 JSR FLSHAL ;N.B. also kills sound AND cancels VDU queueing MOS44 0533 E6C1 v6E MOS44 0544 E6D2 CESCX MOS44 0533 E6C1 v6E MOS44 0545 E6D2 A2 FF LDXIM &FF ;indicate escape cleared MOS44 0533 E6C1 v6E MOS44 0546 E6D4 CESCPC ;clear system escape flag MOS44 0533 E6C1 v6E MOS44 0547 E6D4 18 CLC -- MOS44 0548 E6D5 CESCPS ;set system escape flag (N.B. C=1) -- MOS44 0549 E6D5 66 FF ROR ESCFLG -- MOS44 0550 E6D7 2C 7A 02 BIT TUBEM -- MOS44 0551 E6DA [ MOS125 = &FF -- MOS44 0554 E6DA | -- MOS44 0555 E6DA 10 33 BPL TESCO ;[tube inactive] MOS44 0555 E6DA v4C MOS44 0556 E6DC ] MOS44 0555 E6DA v4C MOS44 0557 E6DC ; MOS44 0555 E6DA v4C MOS44 0558 E6DC TESC MOS44 0555 E6DA v4C MOS44 0559 E6DC 4C 03 04 JMP TBESC ;tube escape MOS44 0555 E6DA v4C MOS44 0560 E6DF MOS44 0555 E6DA v4C MOS44 0561 E6DF MOS44 0555 E6DA v4C MOS44 0562 E6DF MOTOR ;control cassette motor MOS44 0555 E6DA v4C MOS44 0563 E6DF ; on entry: X=0 => motor off MOS44 0555 E6DA v4C MOS44 0564 E6DF ; X<>0 => motor on MOS44 0555 E6DA v4C MOS44 0565 E6DF ; N.B. previous instruction was LDX MOS44 0555 E6DA v4C MOS44 0566 E6DF AD 82 02 LDA SPREGA MOS44 0555 E6DA v4C MOS44 0567 E6E2 A8 TAY ;Y := old value MOS44 0555 E6DA v4C MOS44 0568 E6E3 ; MOS44 0555 E6DA v4C MOS44 0569 E6E3 2A ROLA MOS44 0555 E6DA v4C MOS44 0570 E6E4 E0 01 CPXIM &01 ;C=0 => X=0, C=1 => X<>0 MOS44 0555 E6DA v4C MOS44 0571 E6E6 6A RORA MOS44 0555 E6DA v4C MOS44 0572 E6E7 50 1E BVC STASP ;[ALWAYS jump] MOS44 0555 E6DA v4C MOS44 0573 E6E9 MOS44 0555 E6DA v4C MOS44 0574 E6E9 MOS44 0555 E6DA v4C MOS44 0575 E6E9 TXBAUD ;set RS423 transmit baudrate (N.B. A=$08) MOS44 0555 E6DA v4C MOS44 0576 E6E9 A9 38 LDAIM &38 MOS44 0555 E6DA v4C MOS44 0577 E6EB RXBAUD ;set RS423 receive baudrate (N.B. A=$07) MOS44 0555 E6DA v4C MOS44 0578 E6EB 49 3F EORIM &3F ;Rx: A=$38, Tx: A=$07 MOS44 0555 E6DA v4C MOS44 0579 E6ED 85 FA STA MASK MOS44 0555 E6DA v4C MOS44 0580 E6EF AC 82 02 LDY SPREGA MOS44 0555 E6DA v4C MOS44 0581 E6F2 E0 09 CPXIM &09 MOS44 0555 E6DA v4C MOS44 0582 E6F4 B0 17 BCS BAUD1 ;[bad baud selection] MOS44 0555 E6DA v4C MOS44 0583 E6F6 3D D0 E9 ANDAX BAUDS ;extract serproc baud bits MOS44 0555 E6DA v4C MOS44 0584 E6F9 85 FB STA BAUD MOS44 0555 E6DA v4C MOS44 0585 E6FB 98 TYA MOS44 0555 E6DA v4C MOS44 0586 E6FC 05 FA ORA MASK MOS44 0555 E6DA v4C MOS44 0587 E6FE 45 FA EOR MASK ;clear slot for baudrate MOS44 0555 E6DA v4C MOS44 0588 E700 05 FB ORA BAUD MOS44 0555 E6DA v4C MOS44 0589 E702 09 40 ORAIM &40 ;set cassette/RS423 bit MOS44 0555 E6DA v4C MOS44 0590 E704 4D 5D 02 EOR RSCASS ;select cassette/RS423 MOS44 0555 E6DA v4C MOS44 0591 E707 ; MOS44 0555 E6DA v4C MOS44 0592 E707 STASP ;used by MOTOR and RESET MOS44 0555 E6DA v4C MOS44 0593 E707 8D 82 02 STA SPREGA MOS44 0555 E6DA v4C MOS44 0594 E70A 8D 10 FE STA SERPRC MOS44 0555 E6DA v4C MOS44 0595 E70D ; MOS44 0555 E6DA v4C MOS44 0596 E70D BAUD1 MOS44 0555 E6DA v4C MOS44 0597 E70D TYATAX ;used by TXBAUD, RXBAUD, FSPC, FMRK MOS44 0555 E6DA v4C MOS44 0598 E70D 98 TYA MOS44 0686 E764 ^27 MOS44 0599 E70E BADEVT MOS44 0686 E764 ^27 MOS44 0600 E70E AA TAX ;X := old value (bad events appear disabled) MOS44 0686 E764 ^27 MOS44 0601 E70F [ MOS125 = &FF MOS44 0686 E764 ^27 MOS44 0602 E70F | MOS44 0686 E764 ^27 MOS44 0603 E70F TESCO MOS44 0686 E764 ^27 MOS44 0604 E70F ] MOS44 0686 E764 ^27 MOS44 0605 E70F 60 RTS MOS44 0686 E764 ^27 MOS44 0606 E710 MOS44 0686 E764 ^27 MOS44 0607 E710 MOS44 0686 E764 ^27 MOS44 0608 E710 FMRK ;set flash mark, Y=0, C=1 MOS44 0686 E764 ^27 MOS44 0609 E710 C8 INY MOS44 0686 E764 ^27 MOS44 0610 E711 18 CLC MOS44 0686 E764 ^27 MOS44 0611 E712 ; MOS44 0686 E764 ^27 MOS44 0612 E712 ; Y=1, C=0 MOS44 0686 E764 ^27 MOS44 0613 E712 ; MOS44 0686 E764 ^27 MOS44 0614 E712 FSPC ;set flash space, Y=0, C=1 MOS44 0686 E764 ^27 MOS44 0615 E712 B9 52 02 LDAAY FLASHB MOS44 0686 E764 ^27 MOS44 0616 E715 ; MOS44 0686 E764 ^27 MOS44 0617 E715 48 PHA MOS44 0686 E764 ^27 MOS44 0618 E716 8A TXA MOS44 0686 E764 ^27 MOS44 0619 E717 99 52 02 STAAY FLASHB MOS44 0686 E764 ^27 MOS44 0620 E71A 68 PLA MOS44 0686 E764 ^27 MOS44 0621 E71B ; MOS44 0686 E764 ^27 MOS44 0622 E71B A8 TAY MOS44 0686 E764 ^27 MOS44 0623 E71C ; MOS44 0686 E764 ^27 MOS44 0624 E71C ; C=0 => mark, C=1 => space MOS44 0686 E764 ^27 MOS44 0625 E71C ; FMS0 exit used, despite X not being corrupted MOS44 0686 E764 ^27 MOS44 0626 E71C ; (makes code clearer) MOS44 0686 E764 ^27 MOS44 0627 E71C AD 51 02 LDA FLCNT MOS44 0686 E764 ^27 MOS44 0628 E71F D0 10 BNE FMS1 ;[flash enabled] MOS44 0686 E764 ^27 MOS44 0629 E721 ; 'kick' flash count MOS44 0686 E764 ^27 MOS44 0630 E721 8E 51 02 STX FLCNT MOS44 0686 E764 ^27 MOS44 0631 E724 ; force mark/space (lsb VPREGA := C) MOS44 0686 E764 ^27 MOS44 0632 E724 AD 48 02 LDA VPREGA MOS44 0686 E764 ^27 MOS44 0633 E727 [ MOS125 = &FF MOS44 0686 E764 ^27 MOS44 0638 E727 | MOS44 0686 E764 ^27 MOS44 0639 E727 ;same size, faster, reduce stack load MOS44 0686 E764 ^27 MOS44 0640 E727 29 FE ANDIM &FE MOS44 0686 E764 ^27 MOS44 0641 E729 69 00 ADCIM &00 ;V=0 MOS44 0686 E764 ^27 MOS44 0642 E72B ] MOS44 0686 E764 ^27 MOS44 0643 E72B 8D 48 02 STA VPREGA MOS44 0686 E764 ^27 MOS44 0644 E72E 8D 20 FE STA VPROC0 MOS44 0686 E764 ^27 MOS44 0645 E731 FMS1 ; chain from clear escape condition routine MOS44 0686 E764 ^27 MOS44 0646 E731 50 DA BVC TYATAX ;[ALWAYS jump] MOS44 0686 E764 ^27 MOS44 0647 E733 MOS44 0686 E764 ^27 MOS44 0648 E733 MOS44 0686 E764 ^27 MOS44 0649 E733 SELIN ;select input MOS44 0686 E764 ^27 MOS44 0650 E733 8A TXA MOS44 0686 E764 ^27 MOS44 0651 E734 29 01 ANDIM &01 ;force legal bufferid MOS44 0686 E764 ^27 MOS44 0652 E736 48 PHA ;save change MOS44 0686 E764 ^27 MOS44 0653 E737 AD 50 02 LDA RSCTFL ;A := old state of controller status MOS44 MOS44 MOS44 MOS44 Acorn macro assembler Page 93 MOS44 MOS44 OSBYTE routines MOS44 MOS44 0686 E764 ^27 MOS44 0654 E73A 2A ROLA MOS44 0686 E764 ^27 MOS44 0655 E73B E0 01 CPXIM &01 ;C=0 => disable RS423, C=1 => enable RS423 MOS44 0686 E764 ^27 MOS44 0656 E73D 6A RORA ;A := new state of controller status MOS44 0686 E764 ^27 MOS44 0657 E73E ; *FX 2,0 disables RS423, *FX 2,(1,2) enables RS423 MOS44 0686 E764 ^27 MOS44 0658 E73E ; if RS423 then enable RS423 Rx interrupt MOS44 0686 E764 ^27 MOS44 0659 E73E CD 50 02 CMP RSCTFL MOS44 0686 E764 ^27 MOS44 0660 E741 08 PHP MOS44 0686 E764 ^27 MOS44 0661 E742 8D 50 02 STA RSCTFL MOS44 0686 E764 ^27 MOS44 0662 E745 8D 08 FE STA RSCTL ;update RS423 control register MOS44 0686 E764 ^27 MOS44 0663 E748 20 06 E2 JSR RSETX ;set RHITXE if possible MOS44 0686 E764 ^27 MOS44 0664 E74B 28 PLP MOS44 0686 E764 ^27 MOS44 0665 E74C F0 03 BEQ SELIN1 ;branch if no change MOS44 0686 E764 ^27 MOS44 0666 E74E 2C 09 FE BIT RSDATA ;purge character in controller MOS44 0686 E764 ^27 MOS44 0667 E751 ; this purges data register if: disabled state -> enabled state MOS44 0686 E764 ^27 MOS44 0668 E751 ; this does not matter if: enabled state -> disabled state MOS44 0686 E764 ^27 MOS44 0669 E751 SELIN1 MOS44 0686 E764 ^27 MOS44 0670 E751 AE 41 02 LDX RDCHSW ;X := old value MOS44 0686 E764 ^27 MOS44 0671 E754 68 PLA MOS44 0686 E764 ^27 MOS44 0672 E755 8D 41 02 STA RDCHSW ;update value MOS44 0686 E764 ^27 MOS44 0673 E758 60 RTS MOS44 0686 E764 ^27 MOS44 0674 E759 MOS44 0686 E764 ^27 MOS44 0675 E759 MOS44 0686 E764 ^27 MOS44 0676 E759 MDSABL ;disable event X MOS44 0686 E764 ^27 MOS44 0677 E759 ; N.B. Y=0 MOS44 0686 E764 ^27 MOS44 0678 E759 98 TYA ;A := 0 MOS44 0686 E764 ^27 MOS44 0679 E75A ;* LDAIM ZERO MOS44 0686 E764 ^27 MOS44 0680 E75A ENABLE ;enable event X (N.B. A<>$00) MOS44 0686 E764 ^27 MOS44 0681 E75A E0 0A CPXIM NEVENT MOS44 0686 E764 ^27 MOS44 0682 E75C B0 B0 BCS BADEVT MOS44 0686 E764 ^27 MOS44 0683 E75E BC BF 02 LDYAX EVENTS MOS44 0686 E764 ^27 MOS44 0684 E761 9D BF 02 STAAX EVENTS MOS44 0686 E764 ^27 MOS44 0685 E764 ; MOS44 0686 E764 ^27 MOS44 0686 E764 50 A7 BVC TYATAX ;[ALWAYS jump] -- MOS44 0687 E766 -- MOS44 0688 E766 -- MOS44 0689 E766 SETADC ;set number of ADC channels to scan -- MOS44 0690 E766 ; N.B. preceeding instruction was LDX -- MOS44 0691 E766 ; Y=0 -- MOS44 0692 E766 F0 03 BEQ SETAD1 ;[kill ADC (eventually)] MOS44 0692 E766 v7C MOS44 0693 E768 20 38 DE JSR ADCBEG ;initiate conversion on channel X, uses Y=0 MOS44 0692 E766 v7C MOS44 0694 E76B ; N.B. X not corrupted MOS44 0692 E766 v7C MOS44 0695 E76B SETAD1 MOS44 0692 E766 v7C MOS44 0696 E76B ; a value of X=0 stops the ADC after the next (external) channel 1 MOS44 0692 E766 v7C MOS44 0697 E76B ; conversion MOS44 0692 E766 v7C MOS44 0698 E76B AD 4D 02 LDA MAXADC -- MOS44 0699 E76E 8E 4D 02 STX MAXADC -- MOS44 0700 E771 AA TAX ;X := old value -- MOS44 0701 E772 60 RTS -- MOS44 0702 E773 -- MOS44 0703 E773 -- MOS44 0704 E773 INKY ;read key with time limit -- MOS44 0705 E773 98 TYA -- MOS44 0706 E774 30 0B BMI RDKY MOS44 0706 E774 v74 MOS44 0707 E776 58 CLI ;**** ENABLE INTERRUPTS MOS44 0706 E774 v74 MOS44 0708 E777 20 67 DE JSR INKEY MOS44 0706 E774 v74 MOS44 0709 E77A B0 03 BCS INKY1 ;[escape detected or count exhausted] MOS44 0706 E774 v74 MOS44 0710 E77C ; MOS44 0706 E774 v74 MOS44 0711 E77C ; character read MOS44 0706 E774 v74 MOS44 0712 E77C ; MOS44 0706 E774 v74 MOS44 0713 E77C AA TAX ;X := character (INKEY) or lo-count (BUFN) MOS44 0706 E774 v74 MOS44 0714 E77D A9 00 LDAIM ZERO ;Y = 0 => success MOS44 0706 E774 v74 MOS44 0715 E77F ; MOS44 0706 E774 v74 MOS44 0716 E77F INKY1 ;escape detected or count exhausted, C=1 MOS44 0706 E774 v74 MOS44 0717 E77F A8 TAY ;Y < $80 => escape, Y >= $80 => count exhausted MOS44 0706 E774 v74 MOS44 0718 E780 60 RTS MOS44 0706 E774 v74 MOS44 0719 E781 MOS44 0706 E774 v74 MOS44 0720 E781 MOS44 0706 E774 v74 MOS44 0721 E781 RDKY ;C=1, V=0, read key addressed by X MOS44 0706 E774 v74 MOS44 0722 E781 ; N.B. interrupts disabled MOS44 0706 E774 v74 MOS44 0723 E781 ; MOS44 0706 E774 v74 MOS44 0724 E781 ; test key at matrix address MOS44 0706 E774 v74 MOS44 0725 E781 ; MOS44 0706 E774 v74 MOS44 0726 E781 [ $Tutu MOS44 0706 E774 v74 MOS44 0734 E781 | MOS44 0706 E774 v74 MOS44 0735 E781 8A TXA -- MOS44 0736 E782 49 7F EORIM &7F -- MOS44 0737 E784 AA TAX -- MOS44 0738 E785 20 95 F0 JSR JMIKEY -- MOS44 0739 E788 2A ROLA ;result into C -- MOS44 0740 E789 ] -- MOS44 0741 E789 ; -- MOS44 0742 E789 BADADC ;entered with C=1 -- MOS44 0743 E789 RMHA ;entered with C=1 -- MOS44 0744 E789 ; C=0 => return 0, C=1 => return -1 -- MOS44 0745 E789 A2 FF LDXIM &FF ;N.B. I/O processor is notionally located at address $FFFFxxxx MOS44 0806 E7B3 ^54 MOS44 0746 E78B A0 FF LDYIM &FF MOS44 0806 E7B3 ^54 MOS44 0747 E78D B0 02 BCS RDKY0 MOS44 0806 E7B3 ^54 MOS44 0748 E78F ; INKEY entry (key open) MOS44 0806 E7B3 ^54 MOS44 0749 E78F E8 INX ;X=0 MOS44 0806 E7B3 ^54 MOS44 0750 E790 ; invalid soft key read, return Y<>0 MOS44 0806 E7B3 ^54 MOS44 0751 E790 C8 INY ;Y=0 (except for soft key read entry) MOS44 0806 E7B3 ^54 MOS44 0752 E791 RDKY0 MOS44 0806 E7B3 ^54 MOS44 0753 E791 60 RTS MOS44 0806 E7B3 ^54 MOS44 0754 E792 MOS44 0806 E7B3 ^54 MOS44 0755 E792 MOS44 0806 E7B3 ^54 MOS44 0756 E792 BUFN ;count entries in buffer, called by FX ADVAL with negative argument MOS44 0806 E7B3 ^54 MOS44 0757 E792 ; -N gives count for buffer with external id N MOS44 0806 E7B3 ^54 MOS44 0758 E792 ; C=1 (by FX conventions) MOS44 0806 E7B3 ^54 MOS44 0759 E792 8A TXA MOS44 0806 E7B3 ^54 MOS44 0760 E793 49 FF EORIM &FF MOS44 0806 E7B3 ^54 MOS44 0761 E795 AA TAX ;X := bufferid MOS44 0806 E7B3 ^54 MOS44 0762 E796 ; MOS44 0806 E7B3 ^54 MOS44 0763 E796 ; count entries (in)/(remaining in) buffer given by X MOS44 0806 E7B3 ^54 MOS44 0764 E796 ; returns: MOS44 0806 E7B3 ^54 MOS44 0765 E796 ; number of entries present for input buffers MOS44 0806 E7B3 ^54 MOS44 0766 E796 ; number of entries remaining for output buffers MOS44 0806 E7B3 ^54 MOS44 0767 E796 ; MOS44 0806 E7B3 ^54 MOS44 0768 E796 E0 02 CPXIM OUTPUT MOS44 0806 E7B3 ^54 MOS44 0769 E798 ; C=0 => count used entries MOS44 0806 E7B3 ^54 MOS44 0770 E798 ; C=1 => count free slots MOS44 0806 E7B3 ^54 MOS44 0771 E798 ; MOS44 0806 E7B3 ^54 MOS44 0772 E798 JMICNT MOS44 0806 E7B3 ^54 MOS44 0773 E798 B8 CLV ;V=0 => count buffer entry MOS44 0806 E7B3 ^54 MOS44 0774 E799 50 03 BVC JMICNP ;[ALWAYS jump] MOS44 0806 E7B3 ^54 MOS44 0775 E79B ; MOS44 0806 E7B3 ^54 MOS44 0776 E79B 2C 49 D9 JMIPUR BIT FFBYT ;V=1 MOS44 0806 E7B3 ^54 MOS44 0777 E79E 6C 2E 02 JMICNP JMI CNPVEC ;use indirection (defaults to CNP) MOS44 0806 E7B3 ^54 MOS44 0778 E7A1 ; return count in X (lo) and Y (hi) MOS44 0806 E7B3 ^54 MOS44 0779 E7A1 MOS44 0806 E7B3 ^54 MOS44 0780 E7A1 MOS44 0806 E7B3 ^54 MOS44 0781 E7A1 CNTRS ;count bytes left in RS423 input buffer MOS44 MOS44 MOS44 MOS44 Acorn macro assembler Page 94 MOS44 MOS44 OSBYTE routines MOS44 MOS44 0806 E7B3 ^54 MOS44 0782 E7A1 38 SEC ;count empty slots left ... MOS44 0806 E7B3 ^54 MOS44 0783 E7A2 A2 01 LDXIM BRSI ;... in RS423 input buffer MOS44 0806 E7B3 ^54 MOS44 0784 E7A4 20 98 E7 JSR JMICNT MOS44 0806 E7B3 ^54 MOS44 0785 E7A7 ; count in Y (hi) and X (lo) MOS44 0806 E7B3 ^54 MOS44 0786 E7A7 C0 01 CPYIM &01 MOS44 0806 E7B3 ^54 MOS44 0787 E7A9 B0 03 BCS CNTRS0 ;[more than RSOVER bytes left] MOS44 0806 E7B3 ^54 MOS44 0788 E7AB ; MOS44 0806 E7B3 ^54 MOS44 0789 E7AB EC 5B 02 CPX RSHLVL MOS44 0806 E7B3 ^54 MOS44 0790 E7AE ; MOS44 0806 E7B3 ^54 MOS44 0791 E7AE CNTRS0 MOS44 0806 E7B3 ^54 MOS44 0792 E7AE ; C=0 => overflow MOS44 0806 E7B3 ^54 MOS44 0793 E7AE ; C=1 => no overflow MOS44 0806 E7B3 ^54 MOS44 0794 E7AE 60 RTS MOS44 0806 E7B3 ^54 MOS44 0795 E7AF MOS44 0806 E7B3 ^54 MOS44 0796 E7AF MOS44 0806 E7B3 ^54 MOS44 0797 E7AF RADCX ;read ADC channel X MOS44 0806 E7B3 ^54 MOS44 0798 E7AF [ MOS125 = &FF MOS44 0806 E7B3 ^54 MOS44 0803 E7AF | MOS44 0806 E7B3 ^54 MOS44 0804 E7AF 30 E1 BMI BUFN ;[count entries in buffer] MOS44 0806 E7B3 ^54 MOS44 0805 E7B1 E0 05 CPXIM &05 MOS44 0806 E7B3 ^54 MOS44 0806 E7B3 B0 D4 BCS BADADC -- MOS44 0807 E7B5 8A TXA -- MOS44 0808 E7B6 F0 08 BEQ FIRE ;[get status of fire buttons] MOS44 0808 E7B6 v77 MOS44 0809 E7B8 ] MOS44 0808 E7B6 v77 MOS44 0810 E7B8 ; return latest conversion MOS44 0808 E7B6 v77 MOS44 0811 E7B8 BC B9 02 LDYAX ADCHIV -&01 MOS44 0808 E7B6 v77 MOS44 0812 E7BB BD B5 02 LDAAX ADCLOV -&01 MOS44 0808 E7B6 v77 MOS44 0813 E7BE AA TAX ;X := lo-byte MOS44 0808 E7B6 v77 MOS44 0814 E7BF 60 RTS MOS44 0808 E7B6 v77 MOS44 0815 E7C0 MOS44 0808 E7B6 v77 MOS44 0816 E7C0 MOS44 0808 E7B6 v77 MOS44 0817 E7C0 FIRE ;get status of fire buttons MOS44 0808 E7B6 v77 MOS44 0818 E7C0 [ MOS125 = &FF MOS44 0808 E7B6 v77 MOS44 0826 E7C0 | MOS44 0808 E7B6 v77 MOS44 0827 E7C0 ; X=0, A=0, C=0 MOS44 0808 E7B6 v77 MOS44 0828 E7C0 ED 40 FE SBC PBQ ;take one's complement of system VIA port B -- MOS44 0829 E7C3 6A RORA -- MOS44 0830 E7C4 6A RORA -- MOS44 0831 E7C5 6A RORA -- MOS44 0832 E7C6 6A RORA -- MOS44 0833 E7C7 ] -- MOS44 0834 E7C7 29 03 ANDIM &03 ;A := fire buttons -- MOS44 0835 E7C9 AC BE 02 LDY ADCFLG ;return latest conversion number -- MOS44 0836 E7CC ; clear latest conversion number -- MOS44 0837 E7CC 8E BE 02 STX ADCFLG -- MOS44 0838 E7CF AA TAX ;return status of fire buttons in b0 and b1 -- MOS44 0839 E7D0 60 RTS -- MOS44 0840 E7D1 -- MOS44 0841 E7D1 -- MOS44 0842 E7D1 LNK MOS46 -- MOS46 0001 E7D1 ; > MOS46 -- MOS46 0002 E7D1 TTL MOS46 OSWORD routines -- MOS46 0003 E7D1 OPT MOS46 MOS46 MOS46 MOS46 MOS46 Acorn macro assembler Page 95 MOS46 MOS46 OSWORD routines MOS46 -- MOS46 0004 E7D1 ;(c) 1981 ACORN Computers Limited -- MOS46 0005 E7D1 ;BBC MOS -- MOS46 0006 E7D1 ;Change record: -- MOS46 0007 E7D1 ;203 01-May-82 PB Fix EXTSND bug -- MOS46 0008 E7D1 ;041 15-Aug-81 PB First edition -- MOS46 0009 E7D1 ;Author(s): -- MOS46 0010 E7D1 ;PB Paul Bond -- MOS46 0011 E7D1 -- MOS46 0012 E7D1 -- MOS46 0013 E7D1 BYTE ;OSBYTE call -- MOS46 0014 E7D1 ; -- MOS46 0015 E7D1 ; uses: -- MOS46 0016 E7D1 ; BYTEX, BYTEY (may be shared by sei-routines) -- MOS46 0017 E7D1 ; JMILO, JMIHI -- MOS46 0018 E7D1 ; -- MOS46 0019 E7D1 48 PHA -- MOS46 0020 E7D2 08 PHP -- MOS46 0021 E7D3 78 SEI ;**** DISABLE INTERRUPTS **** -- MOS46 0022 E7D4 ; -- MOS46 0023 E7D4 ; save A and X -- MOS46 0024 E7D4 ; -- MOS46 0025 E7D4 85 EF STA BYTEA -- MOS46 0026 E7D6 86 F0 STX BYTEX -- MOS46 0027 E7D8 84 F1 STY BYTEY -- MOS46 0028 E7DA ; -- MOS46 0029 E7DA A2 07 LDXIM SVBYTE ;illegal codes are referred to paged ROM -- MOS46 0030 E7DC ; -- MOS46 0031 E7DC ; check for legal code -- MOS46 0032 E7DC ; -- MOS46 0033 E7DC C9 75 CMPIM BYTEM -- MOS46 0034 E7DE 90 41 BCC BYTELO ;[interactive code] MOS46 0034 E7DE v3E MOS46 0035 E7E0 ; MOS46 0034 E7DE v3E MOS46 0036 E7E0 ; code >= BYTEM MOS46 0034 E7DE v3E MOS46 0037 E7E0 ; MOS46 0034 E7DE v3E MOS46 0038 E7E0 C9 A1 CMPIM BYTEH MOS46 0034 E7DE v3E MOS46 0039 E7E2 90 09 BCC BYTEHI ;[code < BYTEH] MOS46 0034 E7DE v3E MOS46 0040 E7E4 ; MOS46 0034 E7DE v3E MOS46 0041 E7E4 ; check for variable setting MOS46 0034 E7DE v3E MOS46 0042 E7E4 ; MOS46 0034 E7DE v3E MOS46 0043 E7E4 C9 A6 CMPIM VORG MOS46 0034 E7DE v3E MOS46 0044 E7E6 90 3F BCC BYTE0 ;[not a variable setting] MOS46 0034 E7DE v3E MOS46 0045 E7E8 ; MOS46 0034 E7DE v3E MOS46 0046 E7E8 ; set variable MOS46 0034 E7DE v3E MOS46 0047 E7E8 ; MOS46 0034 E7DE v3E MOS46 0048 E7E8 18 CLC ;force A=BYTEH MOS46 0034 E7DE v3E MOS46 0049 E7E9 ; MOS46 0034 E7DE v3E MOS46 0050 E7E9 WORDU ;user OSWORD call, C=1, force A=BYTEH+$01 MOS46 0034 E7DE v3E MOS46 0051 E7E9 ; MOS46 0034 E7DE v3E MOS46 0052 E7E9 A9 A1 LDAIM BYTEH MOS46 0216 E848 ^1F MOS46 0053 E7EB 69 00 ADCIM ZERO ;add in carry (C=0 => variable, C=1 => user OSWORD) MOS46 0216 E848 ^1F MOS46 0054 E7ED ; MOS46 0216 E848 ^1F MOS46 0055 E7ED BYTEHI MOS46 0216 E848 ^1F MOS46 0056 E7ED ; MOS46 0216 E848 ^1F MOS46 0057 E7ED 38 SEC MOS46 0216 E848 ^1F MOS46 0058 E7EE E9 5F SBCIM BYTEM-BYTEL MOS46 0216 E848 ^1F MOS46 0059 E7F0 ; MOS46 0216 E848 ^1F MOS46 0060 E7F0 BYTE1 ;construct address of specific OSBYTE routine MOS46 0216 E848 ^1F MOS46 0061 E7F0 ; MOS46 0216 E848 ^1F MOS46 0062 E7F0 0A ASLA ;prepare for Y := 2*code MOS46 0216 E848 ^1F MOS46 0063 E7F1 ; MOS46 0216 E848 ^1F MOS46 0064 E7F1 38 SEC ;indicate OSBYTE call MOS46 0216 E848 ^1F MOS46 0065 E7F2 ; MOS46 0216 E848 ^1F MOS46 0066 E7F2 BYTE2 ;C=0 => OSWORD call MOS46 0216 E848 ^1F MOS46 0067 E7F2 ; MOS46 0216 E848 ^1F MOS46 0068 E7F2 84 F1 STY BYTEY ;save Y MOS46 0216 E848 ^1F MOS46 0069 E7F4 ; MOS46 0216 E848 ^1F MOS46 0070 E7F4 A8 TAY ;Y := 2*code MOS46 0216 E848 ^1F MOS46 0071 E7F5 ; MOS46 0216 E848 ^1F MOS46 0072 E7F5 ; allow net to indirect OS call MOS46 0216 E848 ^1F MOS46 0073 E7F5 ; MOS46 0216 E848 ^1F MOS46 0074 E7F5 [ MOS125 = &FF MOS46 0216 E848 ^1F MOS46 0082 E7F5 | MOS46 0216 E848 ^1F MOS46 0083 E7F5 AD 5E 02 LDA NETIOC MOS46 0216 E848 ^1F MOS46 0084 E7F8 B8 CLV MOS46 0216 E848 ^1F MOS46 0085 E7F9 10 06 BPL NET1 ;[net not indirecting OS calls] MOS46 0216 E848 ^1F MOS46 0086 E7FB ; MOS46 0216 E848 ^1F MOS46 0087 E7FB ; indirect OS call thru net MOS46 0216 E848 ^1F MOS46 0088 E7FB ; MOS46 0216 E848 ^1F MOS46 0089 E7FB 8A TXA ;A := reason code MOS46 0216 E848 ^1F MOS46 0090 E7FC ] MOS46 0216 E848 ^1F MOS46 0091 E7FC 20 DF E5 JSR JMINET ;args in BYTEA, BYTEX, BYTEY (call type in A) MOS46 0216 E848 ^1F MOS46 0092 E7FF 70 1A BVS OSRET ;[net substituted result] MOS46 0216 E848 ^1F MOS46 0093 E801 ; MOS46 0216 E848 ^1F MOS46 0094 E801 ; construct specific OSBYTE routine address MOS46 0216 E848 ^1F MOS46 0095 E801 ; MOS46 0216 E848 ^1F MOS46 0096 E801 NET1 ;call internal routine MOS46 0216 E848 ^1F MOS46 0097 E801 B9 15 E6 LDAAY BYTET+&01 ;hi-byte MOS46 0216 E848 ^1F MOS46 0098 E804 85 FB STA JMIHI MOS46 0216 E848 ^1F MOS46 0099 E806 B9 14 E6 LDAAY BYTET+&00 ;lo-byte MOS46 0216 E848 ^1F MOS46 0100 E809 85 FA STA JMILO MOS46 0216 E848 ^1F MOS46 0101 E80B ; MOS46 0216 E848 ^1F MOS46 0102 E80B ; enter specific OSBYTE routine MOS46 0216 E848 ^1F MOS46 0103 E80B ; MOS46 0216 E848 ^1F MOS46 0104 E80B ; X = SVBYTE or SVWORD MOS46 0216 E848 ^1F MOS46 0105 E80B ; MOS46 0216 E848 ^1F MOS46 0106 E80B ; MOS46 0216 E848 ^1F MOS46 0107 E80B A5 EF LDA BYTEA ;in case OSBYTE call MOS46 0216 E848 ^1F MOS46 0108 E80D A4 F1 LDY BYTEY ;restore Y MOS46 0216 E848 ^1F MOS46 0109 E80F ; MOS46 0216 E848 ^1F MOS46 0110 E80F ; determine type of call MOS46 0216 E848 ^1F MOS46 0111 E80F ; MOS46 0216 E848 ^1F MOS46 0112 E80F B0 04 BCS OSB ;[OSBYTE call] MOS46 0216 E848 ^1F MOS46 0113 E811 ; MOS46 0216 E848 ^1F MOS46 0114 E811 ; OSWORD call MOS46 0216 E848 ^1F MOS46 0115 E811 ; MOS46 0216 E848 ^1F MOS46 0116 E811 A0 00 LDYIM ZERO MOS46 0216 E848 ^1F MOS46 0117 E813 B1 F0 LDAIY WORDX MOS46 0216 E848 ^1F MOS46 0118 E815 ; MOS46 0216 E848 ^1F MOS46 0119 E815 OSB MOS46 0216 E848 ^1F MOS46 0120 E815 ; MOS46 0216 E848 ^1F MOS46 0121 E815 ; ********** V=0 USED BY OSBYTE ROUTINES ********** MOS46 0216 E848 ^1F MOS46 0122 E815 38 SEC ;used by several routines MOS46 0216 E848 ^1F MOS46 0123 E816 A6 F0 LDX BYTEX ;restore X (N.B. N, Z status used by several routines) MOS46 0216 E848 ^1F MOS46 0124 E818 20 7E EA JSR JMI ;enter specific routine MOS46 0216 E848 ^1F MOS46 0125 E81B ; MOS46 0216 E848 ^1F MOS46 0126 E81B OSRET MOS46 0216 E848 ^1F MOS46 0127 E81B ; MOS46 0216 E848 ^1F MOS46 0128 E81B 6A RORA ;save C MOS46 0216 E848 ^1F MOS46 0129 E81C 28 PLP MOS46 0216 E848 ^1F MOS46 0130 E81D 2A ROLA ;restore C (needed by readline routine - BASIC expects it) MOS46 0216 E848 ^1F MOS46 0131 E81E 68 PLA ;restore A MOS46 MOS46 MOS46 MOS46 Acorn macro assembler Page 96 MOS46 MOS46 OSWORD routines MOS46 MOS46 0216 E848 ^1F MOS46 0132 E81F B8 CLV ;indicate call recognised MOS46 0216 E848 ^1F MOS46 0133 E820 60 RTS MOS46 0216 E848 ^1F MOS46 0134 E821 MOS46 0216 E848 ^1F MOS46 0135 E821 MOS46 0216 E848 ^1F MOS46 0136 E821 [ NOSP = &00 MOS46 0216 E848 ^1F MOS46 0141 E821 ] MOS46 0216 E848 ^1F MOS46 0142 E821 MOS46 0216 E848 ^1F MOS46 0143 E821 BYTELO ;code has top bit clear - use table lo component MOS46 0216 E848 ^1F MOS46 0144 E821 A0 00 LDYIM ZERO ;only one argument, set Y=0 for variable settings and ADC ops MOS46 0216 E848 ^1F MOS46 0145 E823 C9 16 CMPIM BYTEL MOS46 0216 E848 ^1F MOS46 0146 E825 90 C9 BCC BYTE1 ;[recognised code] MOS46 0216 E848 ^1F MOS46 0147 E827 ; MOS46 0216 E848 ^1F MOS46 0148 E827 ; unrecognised code MOS46 0216 E848 ^1F MOS46 0149 E827 ; MOS46 0216 E848 ^1F MOS46 0150 E827 BYTE0 ;unrecognised OSBYTE code MOS46 0216 E848 ^1F MOS46 0151 E827 WORD0 ;unrecognised OSWORD code (C=1) MOS46 0216 E848 ^1F MOS46 0152 E827 ; force 4 bytes on stack (making 4 before Preg, simulating a return link) MOS46 0216 E848 ^1F MOS46 0153 E827 08 PHP ;N.B. non-zero byte (SEI mode) MOS46 0216 E848 ^1F MOS46 0154 E828 08 PHP MOS46 0216 E848 ^1F MOS46 0155 E829 ; MOS46 0216 E848 ^1F MOS46 0156 E829 EXTSND ;entry point used by SOUND (return link still on stack) MOS46 0216 E848 ^1F MOS46 0157 E829 68 PLA MOS46 0216 E848 ^1F MOS46 0158 E82A 68 PLA MOS46 0216 E848 ^1F MOS46 0159 E82B ; MOS46 0216 E848 ^1F MOS46 0160 E82B 20 6C F1 JSR SVOP ;offer to paged ROMs (N.B. X=SVBYTE or X=SVWORD) MOS46 0216 E848 ^1F MOS46 0161 E82E D0 05 BNE BADOSC ;[unrecognised OS call] MOS46 0216 E848 ^1F MOS46 0162 E830 ; MOS46 0216 E848 ^1F MOS46 0163 E830 ; recognised OS call MOS46 0216 E848 ^1F MOS46 0164 E830 ; MOS46 0216 E848 ^1F MOS46 0165 E830 A6 F0 LDX BYTEX ;replace X (corrupted by SVOP) MOS46 0216 E848 ^1F MOS46 0166 E832 ; MOS46 0216 E848 ^1F MOS46 0167 E832 4C 1B E8 JMP OSRET MOS46 0216 E848 ^1F MOS46 0168 E835 MOS46 0216 E848 ^1F MOS46 0169 E835 MOS46 0216 E848 ^1F MOS46 0170 E835 BADOSC ;bad OS call MOS46 0216 E848 ^1F MOS46 0171 E835 28 PLP ;restore interrupt status MOS46 0216 E848 ^1F MOS46 0172 E836 68 PLA ;restore code to return with MOS46 0216 E848 ^1F MOS46 0173 E837 2C 49 D9 BIT FFBYT ;indicate call not recognised MOS46 0216 E848 ^1F MOS46 0174 E83A 60 RTS MOS46 0216 E848 ^1F MOS46 0175 E83B MOS46 0216 E848 ^1F MOS46 0176 E83B MOS46 0216 E848 ^1F MOS46 0177 E83B [ MOS125 = &FF MOS46 0216 E848 ^1F MOS46 0193 E83B ] MOS46 0216 E848 ^1F MOS46 0194 E83B MOS46 0216 E848 ^1F MOS46 0195 E83B MOS46 0216 E848 ^1F MOS46 0196 E83B WORD ;OSWORD call MOS46 0216 E848 ^1F MOS46 0197 E83B ; uses: MOS46 0216 E848 ^1F MOS46 0198 E83B ; WORDX, WORDY (may be shared by sei-routines) MOS46 0216 E848 ^1F MOS46 0199 E83B ; JMILO, JMIHI (may be shared by sei-routines) MOS46 0216 E848 ^1F MOS46 0200 E83B ; MOS46 0216 E848 ^1F MOS46 0201 E83B 48 PHA MOS46 0216 E848 ^1F MOS46 0202 E83C 08 PHP ;save interrupt state MOS46 0216 E848 ^1F MOS46 0203 E83D 78 SEI ;**** DISABLE INTERRUPTS **** MOS46 0216 E848 ^1F MOS46 0204 E83E ; MOS46 0216 E848 ^1F MOS46 0205 E83E ; save A, X and Y MOS46 0216 E848 ^1F MOS46 0206 E83E ; MOS46 0216 E848 ^1F MOS46 0207 E83E 85 EF STA WORDA MOS46 0216 E848 ^1F MOS46 0208 E840 86 F0 STX WORDX MOS46 0216 E848 ^1F MOS46 0209 E842 84 F1 STY WORDY MOS46 0216 E848 ^1F MOS46 0210 E844 ; MOS46 0216 E848 ^1F MOS46 0211 E844 A2 08 LDXIM SVWORD ;code used if indirection taken MOS46 0216 E848 ^1F MOS46 0212 E846 ; MOS46 0216 E848 ^1F MOS46 0213 E846 ; check for user OSWORD call MOS46 0216 E848 ^1F MOS46 0214 E846 ; MOS46 0216 E848 ^1F MOS46 0215 E846 C9 E0 CMPIM &E0 MOS46 0216 E848 ^1F MOS46 0216 E848 B0 9F BCS WORDU ;[user OSWORD call - route thru USRVEC, C=1] MOS46 0237 E851 ^1F MOS46 0217 E84A ; MOS46 0237 E851 ^1F MOS46 0218 E84A ; not a user OSWORD call MOS46 0237 E851 ^1F MOS46 0219 E84A ; MOS46 0237 E851 ^1F MOS46 0220 E84A ; check for legal code MOS46 0237 E851 ^1F MOS46 0221 E84A ; MOS46 0237 E851 ^1F MOS46 0222 E84A C9 0E CMPIM WORDN MOS46 0237 E851 ^1F MOS46 0223 E84C B0 D9 BCS WORD0 ;[unrecognised code] MOS46 0237 E851 ^1F MOS46 0224 E84E ; C=0 MOS46 0237 E851 ^1F MOS46 0225 E84E ; MOS46 0237 E851 ^1F MOS46 0226 E84E ; recognised OSWORD call MOS46 0237 E851 ^1F MOS46 0227 E84E ; construct address of specific OSWORD routine MOS46 0237 E851 ^1F MOS46 0228 E84E ; MOS46 0237 E851 ^1F MOS46 0229 E84E ; C=0 MOS46 0237 E851 ^1F MOS46 0230 E84E 69 44 ADCIM WORDT-BYTET:SHR: 1 MOS46 0237 E851 ^1F MOS46 0231 E850 ; C=0 MOS46 0237 E851 ^1F MOS46 0232 E850 ; MOS46 0237 E851 ^1F MOS46 0233 E850 ; enter specific OSWORD routine MOS46 0237 E851 ^1F MOS46 0234 E850 ; MOS46 0237 E851 ^1F MOS46 0235 E850 0A ASLA ;prepare for Y := 2*code MOS46 0237 E851 ^1F MOS46 0236 E851 ; C=0 MOS46 0237 E851 ^1F MOS46 0237 E851 90 9F BCC BYTE2 ;[ALWAYS jump, C=0 => OSWORD call] MOS46 0316 E85E ^49 MOS46 0238 E853 MOS46 0316 E85E ^49 MOS46 0239 E853 [ MOS125 = &FF MOS46 0316 E85E ^49 MOS46 0277 E853 ] MOS46 0316 E85E ^49 MOS46 0278 E853 MOS46 0316 E85E ^49 MOS46 0279 E853 NOTE ;add note to note buffer MOS46 0316 E85E ^49 MOS46 0280 E853 ; ********************* MOS46 0316 E85E ^49 MOS46 0281 E853 ; MAY ENABLE INTERRUPTS MOS46 0316 E85E ^49 MOS46 0282 E853 ; ********************* MOS46 0316 E85E ^49 MOS46 0283 E853 ; XY -> 8 bytes of info MOS46 0316 E85E ^49 MOS46 0284 E853 ; C=1 MOS46 0316 E85E ^49 MOS46 0285 E853 ; X=SVWORD MOS46 0316 E85E ^49 MOS46 0286 E853 ; Y=0 MOS46 0316 E85E ^49 MOS46 0287 E853 ; MOS46 0316 E85E ^49 MOS46 0288 E853 [ NOSP = &00 MOS46 0316 E85E ^49 MOS46 0300 E853 | MOS46 0316 E85E ^49 MOS46 0301 E853 [ $Tutu MOS46 0316 E85E ^49 MOS46 0306 E853 | MOS46 0316 E85E ^49 MOS46 0307 E853 C8 INY MOS46 0316 E85E ^49 MOS46 0308 E854 B1 F0 LDAIY WORDX ;A := command type indicator (hi-byte of 1st argument) MOS46 0316 E85E ^49 MOS46 0309 E856 C9 FF CMPIM &FF MOS46 0316 E85E ^49 MOS46 0310 E858 ] MOS46 0316 E85E ^49 MOS46 0311 E858 F0 59 BEQ SPEECH ;[speech command] MOS46 0311 E858 v26 MOS46 0312 E85A C9 20 CMPIM &20 MOS46 0311 E858 v26 MOS46 0313 E85C ] MOS46 0311 E858 v26 MOS46 0314 E85C MOS46 0311 E858 v26 MOS46 0315 E85C A2 08 LDXIM SVWORD ;in case EXTSND called MOS46 0311 E858 v26 MOS46 0316 E85E B0 C9 BCS EXTSND ;[route command to paged ROM] MOS46 0311 E858 v26 MOS46 0317 E860 ; MOS46 0311 E858 v26 MOS46 0318 E860 ; sound command MOS46 0311 E858 v26 MOS46 0319 E860 ; MOS46 0311 E858 v26 MOS46 0320 E860 88 DEY ;Y := 0 MOS46 0311 E858 v26 MOS46 0321 E861 20 EB E8 JSR NOTEX ;C => flush, A = channel, Y := 1 MOS46 0311 E858 v26 MOS46 0322 E864 09 04 ORAIM &04 ;********** N.B. assumes BSND1=4 MOS46 0311 E858 v26 MOS46 0323 E866 AA TAX ;X := (internal) sound bufferid MOS46 MOS46 MOS46 MOS46 Acorn macro assembler Page 97 MOS46 MOS46 OSWORD routines MOS46 MOS46 0311 E858 v26 MOS46 0324 E867 90 05 BCC NOTENF ;[do not flush channel] MOS46 0311 E858 v26 MOS46 0325 E869 ; C=1 MOS46 0311 E858 v26 MOS46 0326 E869 ; flush channel MOS46 0311 E858 v26 MOS46 0327 E869 ; MOS46 0311 E858 v26 MOS46 0328 E869 ; C=1 MOS46 0311 E858 v26 MOS46 0329 E869 20 AB E1 JSR PURGEX ;purge buffer MOS46 0311 E858 v26 MOS46 0330 E86C A0 01 LDYIM &01 ;restore Y MOS46 0311 E858 v26 MOS46 0331 E86E ; MOS46 0311 E858 v26 MOS46 0332 E86E NOTENF MOS46 0311 E858 v26 MOS46 0333 E86E 20 EB E8 JSR NOTEX ;C => release continue, A = chordcount-1 MOS46 0311 E858 v26 MOS46 0334 E871 85 FA STA NOTEWK MOS46 0311 E858 v26 MOS46 0335 E873 ; MOS46 0311 E858 v26 MOS46 0336 E873 08 PHP ;needed in order to share code with BELL MOS46 0311 E858 v26 MOS46 0337 E874 A0 06 LDYIM &06 ;A := duration-lo MOS46 0311 E858 v26 MOS46 0338 E876 B1 F0 LDAIY WORDX MOS46 0311 E858 v26 MOS46 0339 E878 48 PHA MOS46 0311 E858 v26 MOS46 0340 E879 ; MOS46 0311 E858 v26 MOS46 0341 E879 A0 04 LDYIM &04 ;A := note-lo MOS46 0311 E858 v26 MOS46 0342 E87B B1 F0 LDAIY WORDX MOS46 0311 E858 v26 MOS46 0343 E87D 48 PHA MOS46 0311 E858 v26 MOS46 0344 E87E ; MOS46 0311 E858 v26 MOS46 0345 E87E ; C => release continue MOS46 0311 E858 v26 MOS46 0346 E87E ; MOS46 0311 E858 v26 MOS46 0347 E87E A0 02 LDYIM &02 MOS46 0311 E858 v26 MOS46 0348 E880 B1 F0 LDAIY WORDX ;A = envelope-lo MOS46 0311 E858 v26 MOS46 0349 E882 2A ROLA ;rotate in release continue bit MOS46 0311 E858 v26 MOS46 0350 E883 38 SEC MOS46 0311 E858 v26 MOS46 0351 E884 E9 02 SBCIM &02 ;envelope numbers start at 1 MOS46 0311 E858 v26 MOS46 0352 E886 0A ASLA MOS46 0311 E858 v26 MOS46 0353 E887 0A ASLA ;rotate in 2 zero bits MOS46 0311 E858 v26 MOS46 0354 E888 05 FA ORA NOTEWK ;A := AEEE ERHH MOS46 0311 E858 v26 MOS46 0355 E88A ; MOS46 0311 E858 v26 MOS46 0356 E88A ; insert byte into buffer, waiting if necessary MOS46 0311 E858 v26 MOS46 0357 E88A ; MOS46 0311 E858 v26 MOS46 0358 E88A 20 67 E2 JSR WRITE MOS46 0311 E858 v26 MOS46 0359 E88D 90 1E BCC NOTE2 ;[byte inserted] MOS46 0311 E858 v26 MOS46 0360 E88F ; MOS46 0311 E858 v26 MOS46 0361 E88F SPESC ;ESCAPE detected MOS46 0311 E858 v26 MOS46 0362 E88F 68 PLA MOS46 0311 E858 v26 MOS46 0363 E890 68 PLA MOS46 0311 E858 v26 MOS46 0364 E891 28 PLP MOS46 0311 E858 v26 MOS46 0365 E892 ; MOS46 0311 E858 v26 MOS46 0366 E892 VDUST ;FX call to return VDU status MOS46 0311 E858 v26 MOS46 0367 E892 A6 D0 LDX STATS MOS46 0311 E858 v26 MOS46 0368 E894 ; MOS46 0311 E858 v26 MOS46 0369 E894 60 RTS MOS46 0311 E858 v26 MOS46 0370 E895 MOS46 0311 E858 v26 MOS46 0371 E895 MOS46 0311 E858 v26 MOS46 0372 E895 ; MOS46 0311 E858 v26 MOS46 0373 E895 ;; ===== MOS46 0311 E858 v26 MOS46 0374 E895 ; BELL MOS46 0311 E858 v26 MOS46 0375 E895 ; ===== MOS46 0311 E858 v26 MOS46 0376 E895 ; MOS46 0311 E858 v26 MOS46 0377 E895 ; Add BELL to sound queue MOS46 0311 E858 v26 MOS46 0378 E895 ; MOS46 0311 E858 v26 MOS46 0379 E895 ; ENTRY:- No conditions MOS46 0311 E858 v26 MOS46 0380 E895 ; MOS46 0311 E858 v26 MOS46 0381 E895 ; EXIT:- A,X,Y Corrupted MOS46 0311 E858 v26 MOS46 0382 E895 ; Flags preserved MOS46 0311 E858 v26 MOS46 0383 E895 ; MOS46 0311 E858 v26 MOS46 0384 E895 BELL MOS46 0311 E858 v26 MOS46 0385 E895 08 PHP MOS46 0311 E858 v26 MOS46 0386 E896 78 SEI MOS46 0311 E858 v26 MOS46 0387 E897 ; MOS46 0311 E858 v26 MOS46 0388 E897 ; try to add bell to sound channel queue MOS46 0311 E858 v26 MOS46 0389 E897 ; MOS46 0311 E858 v26 MOS46 0390 E897 AD 63 02 LDA BELLC MOS46 0311 E858 v26 MOS46 0391 E89A 29 07 ANDIM &07 MOS46 0311 E858 v26 MOS46 0392 E89C 09 04 ORAIM &04 MOS46 0311 E858 v26 MOS46 0393 E89E AA TAX ;force valid sound channel MOS46 0311 E858 v26 MOS46 0394 E89F ; MOS46 0311 E858 v26 MOS46 0395 E89F ; insert envelope/chord info MOS46 0311 E858 v26 MOS46 0396 E89F ; MOS46 0311 E858 v26 MOS46 0397 E89F AD 64 02 LDA BELLI MOS46 0311 E858 v26 MOS46 0398 E8A2 20 12 E5 JSR INSRT MOS46 0311 E858 v26 MOS46 0399 E8A5 ; MOS46 0311 E858 v26 MOS46 0400 E8A5 ; N.B. ignore return code MOS46 0311 E858 v26 MOS46 0401 E8A5 ; C=0 => inserted, C=1 => not inserted MOS46 0311 E858 v26 MOS46 0402 E8A5 ; if first INSRT failed then so will the following INSRTs MOS46 0311 E858 v26 MOS46 0403 E8A5 ; set to insert duration MOS46 0311 E858 v26 MOS46 0404 E8A5 ; MOS46 0311 E858 v26 MOS46 0405 E8A5 AD 66 02 LDA BELLD MOS46 0311 E858 v26 MOS46 0406 E8A8 48 PHA MOS46 0311 E858 v26 MOS46 0407 E8A9 ; MOS46 0311 E858 v26 MOS46 0408 E8A9 ; set to insert note MOS46 0311 E858 v26 MOS46 0409 E8A9 ; MOS46 0311 E858 v26 MOS46 0410 E8A9 AD 65 02 LDA BELLN MOS46 0311 E858 v26 MOS46 0411 E8AC 48 PHA MOS46 0311 E858 v26 MOS46 0412 E8AD ; MOS46 0311 E858 v26 MOS46 0413 E8AD NOTE2 ;buffer slot available MOS46 0311 E858 v26 MOS46 0414 E8AD ; C=0 => inserted, C=1 => not inserted MOS46 0311 E858 v26 MOS46 0415 E8AD ; MOS46 0311 E858 v26 MOS46 0416 E8AD 38 SEC MOS46 0311 E858 v26 MOS46 0417 E8AE 7E 00 08 RORAX MACTIV-BSND1 MOS46 0311 E858 v26 MOS46 0418 E8B1 [ NOSP = &00 MOS46 0311 E858 v26 MOS46 0420 E8B1 | MOS46 0311 E858 v26 MOS46 0421 E8B1 30 17 BMI NOTE3 ;[ALWAYS JUMP] MOS46 0311 E858 v26 MOS46 0422 E8B3 ; MOS46 0311 E858 v26 MOS46 0423 E8B3 SPEECH ;SOUND -1,x,y,z command MOS46 0311 E858 v26 MOS46 0424 E8B3 ; Y=1 MOS46 0311 E858 v26 MOS46 0425 E8B3 08 PHP ;needed to share code with BELL MOS46 0438 E8C5 ^48 MOS46 0426 E8B4 C8 INY ;Y := $02 MOS46 0438 E8C5 ^48 MOS46 0427 E8B5 B1 F0 LDAIY WORDX MOS46 0438 E8C5 ^48 MOS46 0428 E8B7 48 PHA MOS46 0438 E8C5 ^48 MOS46 0429 E8B8 ; MOS46 0438 E8C5 ^48 MOS46 0430 E8B8 C8 INY ;Y := $03 MOS46 0438 E8C5 ^48 MOS46 0431 E8B9 B1 F0 LDAIY WORDX MOS46 0438 E8C5 ^48 MOS46 0432 E8BB 48 PHA MOS46 0438 E8C5 ^48 MOS46 0433 E8BC ; MOS46 0438 E8C5 ^48 MOS46 0434 E8BC A0 00 LDYIM ZERO MOS46 0438 E8C5 ^48 MOS46 0435 E8BE B1 F0 LDAIY WORDX MOS46 0438 E8C5 ^48 MOS46 0436 E8C0 A2 08 LDXIM BSPCH MOS46 0438 E8C5 ^48 MOS46 0437 E8C2 20 67 E2 JSR WRITE ;insert first byte into buffer MOS46 0438 E8C5 ^48 MOS46 0438 E8C5 B0 C8 BCS SPESC ;[escape detected] MOS46 0421 E8B1 v68 MOS46 0439 E8C7 ; MOS46 0421 E8B1 v68 MOS46 0440 E8C7 ; C=0 MOS46 0421 E8B1 v68 MOS46 0441 E8C7 ; MOS46 0421 E8B1 v68 MOS46 0442 E8C7 6E D7 02 ROR SPSTAT ;indicate speech buffer non-empty MOS46 0421 E8B1 v68 MOS46 0443 E8CA ] MOS46 0421 E8B1 v68 MOS46 0444 E8CA ; MOS46 0421 E8B1 v68 MOS46 0445 E8CA NOTE3 ;add note and duration (ignored if first byte not inserted) MOS46 MOS46 MOS46 MOS46 Acorn macro assembler Page 98 MOS46 MOS46 OSWORD routines MOS46 MOS46 0421 E8B1 v68 MOS46 0446 E8CA 68 PLA -- MOS46 0447 E8CB 20 12 E5 JSR INSRT ;add note data to queue -- MOS46 0448 E8CE 68 PLA -- MOS46 0449 E8CF 20 12 E5 JSR INSRT ;add duration info to queue -- MOS46 0450 E8D2 28 PLP -- MOS46 0451 E8D3 60 RTS -- MOS46 0452 E8D4 -- MOS46 0453 E8D4 -- MOS46 0454 E8D4 NVLP ;define envelope shape -- MOS46 0455 E8D4 ; A := envelope number -- MOS46 0456 E8D4 ; C=1 -- MOS46 0457 E8D4 ; -- MOS46 0458 E8D4 [ MOS125 = &FF -- MOS46 0470 E8D4 | -- MOS46 0471 E8D4 ; -- MOS46 0472 E8D4 ; envelope number forced into range 0 to 15 (1->0, 2->1 ... 16->15) -- MOS46 0473 E8D4 ; (0 forced to 255, which will have the same effect as 15) -- MOS46 0474 E8D4 ; -- MOS46 0475 E8D4 0A ASLA -- MOS46 0476 E8D5 0A ASLA -- MOS46 0477 E8D6 0A ASLA -- MOS46 0478 E8D7 0A ASLA ;envelope number := envelope number * 16 -- MOS46 0479 E8D8 AA TAX ;N.B. ENVSIZ must be 16! -- MOS46 0480 E8D9 ] -- MOS46 0481 E8D9 ; -- MOS46 0482 E8D9 ; copy envelope definition to envelope slot -- MOS46 0483 E8D9 ; padding to 16 bytes with zeroes -- MOS46 0484 E8D9 ; -- MOS46 0485 E8D9 A9 00 LDAIM ZERO ;padding value -- MOS46 0486 E8DB A0 10 LDYIM ENVSIZ -- MOS46 0487 E8DD ; -- MOS46 0488 E8DD NVLP1 -- MOS46 0489 E8DD C0 0E CPYIM ENVSIZ-&02 MOS46 0502 E8E8 ^73 MOS46 0490 E8DF B0 02 BCS NVLP2 ;[still padding] MOS46 0502 E8E8 ^73 MOS46 0491 E8E1 ; MOS46 0502 E8E8 ^73 MOS46 0492 E8E1 B1 F0 LDAIY WORDX MOS46 0502 E8E8 ^73 MOS46 0493 E8E3 NVLP2 MOS46 0502 E8E8 ^73 MOS46 0494 E8E3 [ MOS125 = &FF MOS46 0502 E8E8 ^73 MOS46 0497 E8E3 | MOS46 0502 E8E8 ^73 MOS46 0498 E8E3 CA DEX MOS46 0502 E8E8 ^73 MOS46 0499 E8E4 9D C0 08 STAAX ENVEL MOS46 0502 E8E8 ^73 MOS46 0500 E8E7 ] MOS46 0502 E8E8 ^73 MOS46 0501 E8E7 88 DEY MOS46 0502 E8E8 ^73 MOS46 0502 E8E8 D0 F3 BNE NVLP1 -- MOS46 0503 E8EA ; -- MOS46 0504 E8EA 60 RTS -- MOS46 0505 E8EB -- MOS46 0506 E8EB NOTEX ;extract byte info from offset Y of vector -- MOS46 0507 E8EB B1 F0 LDAIY WORDX -- MOS46 0508 E8ED C9 10 CMPIM &10 ;C => flag (flush or release continue) -- MOS46 0509 E8EF 29 03 ANDIM &03 -- MOS46 0510 E8F1 C8 INY ;step Y to next slot -- MOS46 0511 E8F2 60 RTS -- MOS46 0512 E8F3 -- MOS46 0513 E8F3 RITM ;read interval time -- MOS46 0514 E8F3 A2 0F LDXIM STPW+&5-TIME -- MOS46 0515 E8F5 D0 03 BNE RTM ;[ALWAYS jump] MOS46 0515 E8F5 v7C MOS46 0516 E8F7 ; NEVER fall thru MOS46 0515 E8F5 v7C MOS46 0517 E8F7 RATM ;read absolute time MOS46 0515 E8F5 v7C MOS46 0518 E8F7 AE 83 02 LDX TIMESW MOS46 0515 E8F5 v7C MOS46 0519 E8FA RTM MOS46 0515 E8F5 v7C MOS46 0520 E8FA A0 04 LDYIM &04 -- MOS46 0521 E8FC RTM1 -- MOS46 0522 E8FC BD 8D 02 LDAAX TIME -&05 MOS46 0526 E903 ^77 MOS46 0523 E8FF 91 F0 STAIY WORDX MOS46 0526 E903 ^77 MOS46 0524 E901 E8 INX MOS46 0526 E903 ^77 MOS46 0525 E902 88 DEY MOS46 0526 E903 ^77 MOS46 0526 E903 10 F7 BPL RTM1 -- MOS46 0527 E905 WTM0 -- MOS46 0528 E905 60 RTS MOS46 0558 E91B ^68 MOS46 0529 E906 MOS46 0558 E91B ^68 MOS46 0530 E906 [ MOS125 = &FF MOS46 0558 E91B ^68 MOS46 0539 E906 | MOS46 0558 E91B ^68 MOS46 0540 E906 WATM ;write absolute time MOS46 0558 E91B ^68 MOS46 0541 E906 AC 83 02 LDY TIMESW MOS46 0558 E91B ^68 MOS46 0542 E909 18 CLC ;indicate WATM entry MOS46 0558 E91B ^68 MOS46 0543 E90A WITM ;write interval time, C=1, Y=0 MOS46 0558 E91B ^68 MOS46 0544 E90A 98 TYA MOS46 0558 E91B ^68 MOS46 0545 E90B 49 0F EORIM &0F ;assumes STPW-TIME = &A MOS46 0558 E91B ^68 MOS46 0546 E90D ] MOS46 0558 E91B ^68 MOS46 0547 E90D WTM MOS46 0558 E91B ^68 MOS46 0548 E90D 48 PHA ;save TIMESW for WATM entry MOS46 0558 E91B ^68 MOS46 0549 E90E AA TAX MOS46 0558 E91B ^68 MOS46 0550 E90F A0 04 LDYIM &04 MOS46 0558 E91B ^68 MOS46 0551 E911 WTM1 MOS46 0558 E91B ^68 MOS46 0552 E911 B1 F0 LDAIY WORDX MOS46 0558 E91B ^68 MOS46 0553 E913 9D 8D 02 STAAX TIME -&05 MOS46 0558 E91B ^68 MOS46 0554 E916 E8 INX MOS46 0558 E91B ^68 MOS46 0555 E917 88 DEY MOS46 0558 E91B ^68 MOS46 0556 E918 10 F7 BPL WTM1 MOS46 0558 E91B ^68 MOS46 0557 E91A 68 PLA MOS46 0558 E91B ^68 MOS46 0558 E91B B0 E8 BCS WTM0 ;[not WATM entry, do not reset TIMESW] -- MOS46 0559 E91D ; WATM entry, reset TIMESW -- MOS46 0560 E91D 8D 83 02 STA TIMESW -- MOS46 0561 E920 60 RTS -- MOS46 0562 E921 -- MOS46 0563 E921 RDLN ;read input buffer -- MOS46 0564 E921 ; ****************** -- MOS46 0565 E921 ; ENABLES INTERRUPTS -- MOS46 0566 E921 ; ****************** -- MOS46 0567 E921 ;**************** -- MOS46 0568 E921 ;variables: -- MOS46 0569 E921 ;zero page: RDLNX, RDLNY (contiguous) -- MOS46 0570 E921 ;other page: RDLNN, RDLNLC, RDLNHC (contiguous) -- MOS46 0571 E921 ;**************** -- MOS46 0572 E921 ;Called with Y and X the high and low addresses of the information -- MOS46 0573 E921 ;describing what is to be done. The bytes in order are: -- MOS46 0574 E921 ;lsb address of buffer -- MOS46 0575 E921 ;msb address of buffer -- MOS46 0576 E921 ;maximum length allowed -- MOS46 0577 E921 ;minimum character value to be stored in buffer -- MOS46 0578 E921 ;maximum character value to be stored in buffer -- MOS46 0579 E921 ;Return when escape is pressed or seen with CARRY SET -- MOS46 0580 E921 ;Return after CR (which is always stored) with CARRY CLEAR -- MOS46 0581 E921 ;Always returns with Y the number of characters in the buffer -- MOS46 0582 E921 ;DEL,ESC and NAK are always processed -- MOS46 0583 E921 ;**** NOTE **** -- MOS46 0584 E921 ; if the 'other page' variables are put into page zero -- MOS46 0585 E921 ; this routine can be made ~10 bytes shorter. -- MOS46 0586 E921 ; however, an extra pointer variable in page zero would -- MOS46 0587 E921 ; then be required. MOS46 MOS46 MOS46 MOS46 Acorn macro assembler Page 99 MOS46 MOS46 OSWORD routines MOS46 -- MOS46 0588 E921 ; this routine enables interrupts -- MOS46 0589 E921 ; ********** -- MOS46 0590 E921 ; copy 'other page' values -- MOS46 0591 E921 -- MOS46 0592 E921 A0 04 LDYIM &04 -- MOS46 0593 E923 BUFFPR -- MOS46 0594 E923 B1 F0 LDAIY WORDX MOS46 0598 E92B ^76 MOS46 0595 E925 99 B1 02 STAAY RDLNN -&02 ;N.B. offset of -02 MOS46 0598 E92B ^76 MOS46 0596 E928 88 DEY MOS46 0598 E92B ^76 MOS46 0597 E929 C0 02 CPYIM &02 MOS46 0598 E92B ^76 MOS46 0598 E92B B0 F6 BCS BUFFPR ;[more arguments to copy] -- MOS46 0599 E92D ; -- MOS46 0600 E92D ; C=0, Y=1 -- MOS46 0601 E92D ; copy buffer pointer -- MOS46 0602 E92D ; -- MOS46 0603 E92D B1 F0 LDAIY WORDX ;hi-byte -- MOS46 0604 E92F 85 E9 STA RDLNBF +&01 -- MOS46 0605 E931 88 DEY ;Y := 0 -- MOS46 0606 E932 8C 69 02 STY LINES ;reset page mode page origin -- MOS46 0607 E935 B1 F0 LDAIY WORDX ;lo-byte -- MOS46 0608 E937 85 E8 STA RDLNBF +&00 -- MOS46 0609 E939 ; -- MOS46 0610 E939 ; C=0, Y=0 -- MOS46 0611 E939 ; -- MOS46 0612 E939 58 CLI ;**** ENABLE INTERRUPTS **** -- MOS46 0613 E93A 90 1F BCC BUFFIN ;[ALWAYS JUMP] MOS46 0613 E93A v60 MOS46 0614 E93C ; MOS46 0613 E93A v60 MOS46 0615 E93C ; NEVER fall thru MOS46 0613 E93A v60 MOS46 0616 E93C MOS46 0613 E93A v60 MOS46 0617 E93C MOS46 0613 E93A v60 MOS46 0618 E93C [ MOS125 = &FF MOS46 0613 E93A v60 MOS46 0622 E93C | MOS46 0613 E93A v60 MOS46 0623 E93C A9 07 BUFEXH LDAIM BEL ;reflect bell to indicate error MOS46 0613 E93A v60 MOS46 0624 E93E D0 18 BNE BUFIGN ;ALWAYS jump MOS46 0613 E93A v60 MOS46 0625 E940 MOS46 0613 E93A v60 MOS46 0626 E940 BUFNXB ;check for ESC explicitly in case machine in non ESC mode MOS46 0613 E93A v60 MOS46 0627 E940 ;CMPIM ESC MOS46 0613 E93A v60 MOS46 0628 E940 ;BEQ BUFESC ;[ESC, N.B. C = 1] MOS46 0613 E93A v60 MOS46 0629 E940 ; not DEL, NAK or ESC MOS46 0613 E93A v60 MOS46 0630 E940 91 E8 STAIY RDLNBF ;store character in buffer MOS46 0702 E974 ^4A MOS46 0631 E942 C9 0D CMPIM MCR MOS46 0702 E974 ^4A MOS46 0632 E944 F0 3F BEQ BUFEND ;[CR detected, exit indicating CR received] MOS46 0632 E944 v40 MOS46 0633 E946 CC B3 02 CPY RDLNN MOS46 0632 E944 v40 MOS46 0634 E949 B0 F1 BCS BUFEXH ;[buffer exhausted, do not echo character] MOS46 0632 E944 v40 MOS46 0635 E94B ; MOS46 0632 E944 v40 MOS46 0636 E94B ; buffer not exhausted MOS46 0632 E944 v40 MOS46 0637 E94B ; MOS46 0632 E944 v40 MOS46 0638 E94B CD B4 02 CMP RDLNLC MOS46 0632 E944 v40 MOS46 0639 E94E 90 08 BCC BUFIGN ;[character < lo-character] MOS46 0632 E944 v40 MOS46 0640 E950 CD B5 02 CMP RDLNHC MOS46 0632 E944 v40 MOS46 0641 E953 90 02 BCC BUFECH ;[character < hi-character, so accept] MOS46 0632 E944 v40 MOS46 0642 E955 D0 01 BNE BUFIGN ;[character > hi-character, so ignore] MOS46 0632 E944 v40 MOS46 0643 E957 C8 BUFECH INY ;increment count of characters in buffer MOS46 0632 E944 v40 MOS46 0644 E958 BUFIGN MOS46 0632 E944 v40 MOS46 0645 E958 ] MOS46 0632 E944 v40 MOS46 0646 E958 ; echo character MOS46 0632 E944 v40 MOS46 0647 E958 BFWRCH MOS46 0632 E944 v40 MOS46 0648 E958 20 EE FF JSR OSWRCH MOS46 0632 E944 v40 MOS46 0649 E95B ; MOS46 0632 E944 v40 MOS46 0650 E95B BUFFIN ;main loop MOS46 0632 E944 v40 MOS46 0651 E95B 20 E0 FF JSR OSRDCH ;read a character MOS46 0632 E944 v40 MOS46 0652 E95E B0 2B BCS BUFESC ;[escape detected] MOS46 0632 E944 v40 MOS46 0653 E960 AA TAX MOS46 0632 E944 v40 MOS46 0654 E961 AD 7C 02 LDA WRCHSW MOS46 0632 E944 v40 MOS46 0655 E964 6A RORA MOS46 0632 E944 v40 MOS46 0656 E965 6A RORA MOS46 0632 E944 v40 MOS46 0657 E966 8A TXA MOS46 0632 E944 v40 MOS46 0658 E967 B0 05 BCS BUFNQ ;[output does not include VDU] MOS46 0632 E944 v40 MOS46 0659 E969 ; MOS46 0632 E944 v40 MOS46 0660 E969 ; output includes VDU MOS46 0632 E944 v40 MOS46 0661 E969 ; MOS46 0632 E944 v40 MOS46 0662 E969 ; MOS46 0632 E944 v40 MOS46 0663 E969 AE 6A 02 LDX QPOSN MOS46 0632 E944 v40 MOS46 0664 E96C D0 EA BNE BFWRCH ;[VDU queueing, reflect character] MOS46 0632 E944 v40 MOS46 0665 E96E ; MOS46 0632 E944 v40 MOS46 0666 E96E ; output does not include VDU MOS46 0632 E944 v40 MOS46 0667 E96E ; MOS46 0632 E944 v40 MOS46 0668 E96E BUFNQ ;VDU not queueing MOS46 0632 E944 v40 MOS46 0669 E96E [ MOS125 = &FF MOS46 0632 E944 v40 MOS46 0698 E96E | MOS46 0632 E944 v40 MOS46 0699 E96E C9 7F CMPIM MDEL MOS46 0632 E944 v40 MOS46 0700 E970 F0 05 BEQ BUFCNL ;[DEL received] MOS46 0632 E944 v40 MOS46 0701 E972 C9 15 CMPIM MNAK MOS46 0632 E944 v40 MOS46 0702 E974 D0 CA BNE BUFNXB ;[not DEL or NAK] MOS46 0632 E944 v40 MOS46 0703 E976 18 CLC MOS46 0632 E944 v40 MOS46 0704 E977 BUFCNL ;output DEL once (CC) or for each character in the buffer MOS46 0632 E944 v40 MOS46 0705 E977 98 TYA MOS46 0632 E944 v40 MOS46 0706 E978 F0 E1 BEQ BUFFIN ;[reached start of line] MOS46 0632 E944 v40 MOS46 0707 E97A 88 DEY MOS46 0632 E944 v40 MOS46 0708 E97B A9 7F LDAIM MDEL MOS46 0632 E944 v40 MOS46 0709 E97D B0 D9 BCS BFWRCH ;[if DEL, reflect DEL and get next char] MOS46 0632 E944 v40 MOS46 0710 E97F 20 EE FF JSR OSWRCH MOS46 0632 E944 v40 MOS46 0711 E982 18 CLC MOS46 0632 E944 v40 MOS46 0712 E983 90 F2 BCC BUFCNL ;[ALWAYS jump, more characters to delete] MOS46 0632 E944 v40 MOS46 0713 E985 ] MOS46 0632 E944 v40 MOS46 0714 E985 ; NEVER fall thru MOS46 0632 E944 v40 MOS46 0715 E985 ; MOS46 0632 E944 v40 MOS46 0716 E985 [ MOS125 = &FF MOS46 0632 E944 v40 MOS46 0736 E985 ] MOS46 0632 E944 v40 MOS46 0737 E985 MOS46 0632 E944 v40 MOS46 0738 E985 BUFEND ;read line successful MOS46 0632 E944 v40 MOS46 0739 E985 ; echo LF CR MOS46 0632 E944 v40 MOS46 0740 E985 20 E7 FF JSR OSNEWL MOS46 0652 E95E v54 MOS46 0741 E988 20 DF E5 JSR JMINET ;N.B. assumes NTCR has value $0D MOS46 0652 E95E v54 MOS46 0742 E98B ; MOS46 0652 E95E v54 MOS46 0743 E98B BUFESC ;escape exit (C=1) MOS46 0652 E95E v54 MOS46 0744 E98B A5 FF LDA ESCFLG -- MOS46 0745 E98D 2A ROLA ;C=0 => no escape, C=1 => escape -- MOS46 0746 E98E 60 RTS -- MOS46 0747 E98F -- MOS46 0748 E98F -- MOS46 0749 E98F [ MOS125 = &7F -- MOS46 0750 E98F ;flash keyboard LEDs while waiting for printer buffer to purge -- MOS46 0751 E98F ;C=1 -- MOS46 0752 E98F SPFL -- MOS46 0753 E98F [ STARGO = &00 -- MOS46 0754 E98F 48 PHA ;save FX call number MOS46 0775 E9A2 ^6B MOS46 0755 E990 8A TXA MOS46 0775 E9A2 ^6B MOS46 0756 E991 48 PHA ;save printer selection MOS46 0775 E9A2 ^6B MOS46 0757 E992 20 FC E9 JSR MOSTST ;flash LEDs MOS46 0775 E9A2 ^6B MOS46 0758 E995 68 PLA MOS46 MOS46 MOS46 MOS46 Acorn macro assembler Page 100 MOS46 MOS46 OSWORD routines MOS46 MOS46 0775 E9A2 ^6B MOS46 0759 E996 AA TAX ;restore printer selection MOS46 0775 E9A2 ^6B MOS46 0760 E997 68 PLA ;restore FX call number MOS46 0775 E9A2 ^6B MOS46 0761 E998 38 SEC ;restore C=1 MOS46 0775 E9A2 ^6B MOS46 0762 E999 ] MOS46 0775 E9A2 ^6B MOS46 0763 E999 ] MOS46 0775 E9A2 ^6B MOS46 0764 E999 MOS46 0775 E9A2 ^6B MOS46 0765 E999 SPRINT ;change printer selection (*FX 5) MOS46 0775 E9A2 ^6B MOS46 0766 E999 ; allow interrupts during wait, this means that: MOS46 0775 E9A2 ^6B MOS46 0767 E999 ; (a) the printer can purge AND/OR MOS46 0775 E9A2 ^6B MOS46 0768 E999 ; (b) escape can be detected MOS46 0775 E9A2 ^6B MOS46 0769 E999 58 CLI MOS46 0775 E9A2 ^6B MOS46 0770 E99A 78 SEI MOS46 0775 E9A2 ^6B MOS46 0771 E99B 24 FF BIT ESCFLG MOS46 0775 E9A2 ^6B MOS46 0772 E99D 30 30 BMI SPR0 ;[escape detected] MOS46 0772 E99D v4F MOS46 0773 E99F 2C D2 02 BIT PFLAG MOS46 0772 E99D v4F MOS46 0774 E9A2 [ MOS125 = &7F MOS46 0772 E99D v4F MOS46 0775 E9A2 10 EB BPL SPFL ;printer busy, flash LEDs while purging MOS46 0772 E99D v4F MOS46 0776 E9A4 | MOS46 0772 E99D v4F MOS46 0778 E9A4 ] MOS46 0772 E99D v4F MOS46 0779 E9A4 ; mention change of printer to print routines MOS46 0772 E99D v4F MOS46 0780 E9A4 20 37 E2 JSR UPTX ;N.B. Y corrupted MOS46 0772 E99D v4F MOS46 0781 E9A7 ; interrupts may have corrupted BYTEX and BYTEY, so restore them MOS46 0772 E99D v4F MOS46 0782 E9A7 A0 00 LDYIM ZERO ;Y altered by call to UPTX MOS46 0772 E99D v4F MOS46 0783 E9A9 84 F1 STY BYTEY MOS46 0772 E99D v4F MOS46 0784 E9AB ; N.B. X reset at SETVX MOS46 0772 E99D v4F MOS46 0785 E9AB ; N.B. A not altered since SPRINT MOS46 0772 E99D v4F MOS46 0786 E9AB ; MOS46 0772 E99D v4F MOS46 0787 E9AB V2B156 ;convert FX 1,5,6 to FX 241,245,246 MOS46 0772 E99D v4F MOS46 0788 E9AB 09 F0 ORAIM &F0 MOS46 0772 E99D v4F MOS46 0789 E9AD D0 0E BNE SETVX ;[ALWAYS jump] MOS46 0772 E99D v4F MOS46 0790 E9AF ; MOS46 0772 E99D v4F MOS46 0791 E9AF ARRPT ;A = $0C, set auto-repeat repeat count MOS46 0772 E99D v4F MOS46 0792 E9AF ; N.B. previous instruction was LDX MOS46 0772 E99D v4F MOS46 0793 E9AF ; C=1 MOS46 0772 E99D v4F MOS46 0794 E9AF D0 07 BNE ARRPT1 ;[X<>0 => do not set defaults] MOS46 0772 E99D v4F MOS46 0795 E9B1 ; set defaults MOS46 0772 E99D v4F MOS46 0796 E9B1 A2 32 LDXIM DAUTOD MOS46 0772 E99D v4F MOS46 0797 E9B3 8E 54 02 STX FARSET MOS46 0772 E99D v4F MOS46 0798 E9B6 A2 08 LDXIM DAUTOP MOS46 0772 E99D v4F MOS46 0799 E9B8 ARRPT1 ;A = $0C, C=1 MOS46 0772 E99D v4F MOS46 0800 E9B8 ARDLY ;A = $0B, C=1, set auto-repeat delay count (0 => disable) MOS46 0772 E99D v4F MOS46 0801 E9B8 69 CF ADCIM FARSET-VBASE-&01-&0B- 233 ;$01 for carry, $0B for FX base MOS46 0772 E99D v4F MOS46 0802 E9BA ; MOS46 0772 E99D v4F MOS46 0803 E9BA V2B34 ;C=1 MOS46 0772 E99D v4F MOS46 0804 E9BA 18 CLC MOS46 0772 E99D v4F MOS46 0805 E9BB 69 E9 ADCIM 233 ;convert FX 3&4 to FX 236,237 MOS46 0772 E99D v4F MOS46 0806 E9BD ; MOS46 0772 E99D v4F MOS46 0807 E9BD SETVX MOS46 0772 E99D v4F MOS46 0808 E9BD 86 F0 STX BYTEX MOS46 0772 E99D v4F MOS46 0809 E9BF ; MOS46 0772 E99D v4F MOS46 0810 E9BF SETV ;set variable MOS46 0772 E99D v4F MOS46 0811 E9BF ; A = FX code MOS46 0772 E99D v4F MOS46 0812 E9BF ; X = value MOS46 0772 E99D v4F MOS46 0813 E9BF ; Y = mask MOS46 0772 E99D v4F MOS46 0814 E9BF A8 TAY ;Y := FX code MOS46 0772 E99D v4F MOS46 0815 E9C0 B9 90 01 LDAAY VBASE ;A := old value MOS46 0772 E99D v4F MOS46 0816 E9C3 AA TAX ;X := old value MOS46 0772 E99D v4F MOS46 0817 E9C4 25 F1 AND BYTEY ;apply mask MOS46 0772 E99D v4F MOS46 0818 E9C6 45 F0 EOR BYTEX ;apply value MOS46 0772 E99D v4F MOS46 0819 E9C8 99 90 01 STAAY VBASE ;store new value MOS46 0772 E99D v4F MOS46 0820 E9CB B9 91 01 LDAAY VBASE+&01 MOS46 0772 E99D v4F MOS46 0821 E9CE A8 TAY ;return following byte MOS46 0772 E99D v4F MOS46 0822 E9CF SPR0 MOS46 0772 E99D v4F MOS46 0823 E9CF 60 RTS -- MOS46 0824 E9D0 -- MOS46 0825 E9D0 -- MOS46 0826 E9D0 BAUDS ;baud rate table (N.B. RS423 bit set cos of B9600 definition) -- MOS46 0827 E9D0 BUFTYP ;**** WARNING - SUBTLE WAY TO DETECT SOUND BUFFERS **** -- MOS46 0828 E9D0 ; (*) = sound buffer -- MOS46 0829 E9D0 0080 SOUNDB * &80 -- MOS46 0830 E9D0 64 = B9600 ;default baud rate / buffer 0 -- MOS46 0831 E9D1 7F = &7F ;75 111 111 / buffer 1 -- MOS46 0832 E9D2 5B = &5B ;150 011 011 / buffer 2 -- MOS46 0833 E9D3 6D = &6D ;300 101 101 / buffer 3 -- MOS46 0834 E9D4 C9 = &49+SOUNDB ;1200 001 001 / buffer 4 (*) -- MOS46 0835 E9D5 F6 = &76+SOUNDB ;2400 110 110 / buffer 5 (*) -- MOS46 0836 E9D6 D2 = &52+SOUNDB ;4800 010 010 / buffer 6 (*) -- MOS46 0837 E9D7 E4 = B9600+SOUNDB ;9600 100 100 / buffer 7 (*) -- MOS46 0838 E9D8 40 = &40 ;19200 000 000 / buffer 8 -- MOS46 0839 E9D9 -- MOS46 0840 E9D9 -- MOS46 0841 E9D9 WFVS ;wait for vertical sync -- MOS46 0842 E9D9 AD 40 02 LDA CYCLE -- MOS46 0843 E9DC WFVS1 ;wait for CYCLE to alter -- MOS46 0844 E9DC 58 CLI ;must enable interrupts to allow CYCLE to operate MOS46 0849 E9E1 ^79 MOS46 0845 E9DD ; this should give the user control immediately after VSYNC MOS46 0849 E9E1 ^79 MOS46 0846 E9DD ; interrupt occurred MOS46 0849 E9E1 ^79 MOS46 0847 E9DD 78 SEI MOS46 0849 E9E1 ^79 MOS46 0848 E9DE CD 40 02 CMP CYCLE MOS46 0849 E9E1 ^79 MOS46 0849 E9E1 F0 F9 BEQ WFVS1 ;[CYCLE not altered] -- MOS46 0850 E9E3 ; -- MOS46 0851 E9E3 ; share exit with read VDU variable -- MOS46 0852 E9E3 ; -- MOS46 0853 E9E3 VDUVAR ;read VDU variables -- MOS46 0854 E9E3 BC 01 03 LDYAX VARBLE+&01 -- MOS46 0855 E9E6 BD 00 03 LDAAX VARBLE+&00 -- MOS46 0856 E9E9 AA TAX -- MOS46 0857 E9EA 60 RTS -- MOS46 0858 E9EB -- MOS46 0859 E9EB -- MOS46 0860 E9EB RSOFT ;reset soft keys -- MOS46 0861 E9EB ; initialise soft key pointers -- MOS46 0862 E9EB ; exits with X=0 (used by RESET) -- MOS46 0863 E9EB ; ********** MUST NOT CORRUPT Y (SEE RESET) ********** -- MOS46 0864 E9EB A9 10 LDAIM NSOFTK -- MOS46 0865 E9ED 8D 84 02 STA USKFLG ;signal soft keys inconsistent -- MOS46 0866 E9F0 A2 00 LDXIM ZERO -- MOS46 0867 E9F2 STTA ;set soft key buffer pointers, including the two end pointers -- MOS46 0868 E9F2 9D 00 0B STAAX SKPTR MOS46 0870 E9F6 ^7A MOS46 0869 E9F5 E8 INX MOS46 0870 E9F6 ^7A MOS46 0870 E9F6 D0 FA BNE STTA -- MOS46 0871 E9F8 ; X=0 -- MOS46 0872 E9F8 8E 84 02 STX USKFLG ;USKFLG set to zero when soft keys consistent -- MOS46 0873 E9FB ; X=0 -- MOS46 0874 E9FB 60 RTS -- MOS46 0875 E9FC -- MOS46 0876 E9FC -- MOS46 0877 E9FC LNK MOS48 -- MOS48 0001 E9FC -- MOS48 0002 E9FC ; MOS48 -- MOS48 0003 E9FC TTL MOS48 Miscellaneous routines MOS48 MOS48 MOS48 MOS48 Acorn macro assembler Page 101 MOS48 MOS48 Miscellaneous routines MOS48 -- MOS48 0004 E9FC OPT MOS48 MOS48 MOS48 MOS48 MOS48 Acorn macro assembler Page 102 MOS48 MOS48 Miscellaneous routines MOS48 -- MOS48 0005 E9FC ;(c) 1981 ACORN Computers Limited -- MOS48 0006 E9FC ;BBC Microcomputer Machine Operating System (MOS) -- MOS48 0007 E9FC -- MOS48 0008 E9FC ;Change record: -- MOS48 0009 E9FC ;01/03/82 PB GSINTC CR indication -- MOS48 0010 E9FC ;05/01/82 PB Change from printer claim to RS423 -- MOS48 0011 E9FC -- MOS48 0012 E9FC ;Author(s): -- MOS48 0013 E9FC ;PB Paul Bond -- MOS48 0014 E9FC -- MOS48 0015 E9FC -- MOS48 0016 E9FC TTL MOS48 External interface routines -- MOS48 0017 E9FC OPT OPNEWP MOS48 MOS48 MOS48 MOS48 Acorn macro assembler Page 103 MOS48 MOS48 External interface routines MOS48 -- MOS48 0018 E9FC -- MOS48 0019 E9FC -- MOS48 0020 E9FC ; external interfaces -- MOS48 0021 E9FC -- MOS48 0022 E9FC -- MOS48 0023 E9FC MOSTST -- MOS48 0024 E9FC ; C=0 => do not set LEDs, C=1 => set LEDs -- MOS48 0025 E9FC ; N.B. must not corrupt X (see WRCH print section) -- MOS48 0026 E9FC 08 PHP ;push interrupt state -- MOS48 0027 E9FD 78 SEI -- MOS48 0028 E9FE ; test for ESCAPE -- MOS48 0029 E9FE A9 40 LDAIM &40 -- MOS48 0030 EA00 20 0D EA JSR LEDSON ;conditionally set LEDs and test escape condition -- MOS48 0031 EA03 30 05 BMI SHIFTX ;[escape pending, simulate SHIFT without CTRL] MOS48 0031 EA03 v7A MOS48 0032 EA05 ; MOS48 0031 EA03 v7A MOS48 0033 EA05 18 CLC ;indicate test ctrl/shift entry point MOS48 0031 EA03 v7A MOS48 0034 EA06 B8 CLV MOS48 0031 EA03 v7A MOS48 0035 EA07 20 95 F0 JSR JMIKEY MOS48 0031 EA03 v7A MOS48 0036 EA0A ; MOS48 0031 EA03 v7A MOS48 0037 EA0A SHIFTX ;b7(A) => CTRL, b6(A) => SHIFT MOS48 0031 EA03 v7A MOS48 0038 EA0A 28 PLP -- MOS48 0039 EA0B 2A ROLA ;C => CTRL, MI => SHIFT -- MOS48 0040 EA0C 60 RTS -- MOS48 0041 EA0D -- MOS48 0042 EA0D -- MOS48 0043 EA0D LEDSON ;turn LEDs on -- MOS48 0044 EA0D ; **************************************** -- MOS48 0045 EA0D ; MUST BE ENTERED WITH INTERRUPTS DISABLED -- MOS48 0046 EA0D ; **************************************** -- MOS48 0047 EA0D ; C=0 => do not turn LEDs on, C=1 => turn LEDs on -- MOS48 0048 EA0D ; returns status of BIT ESCFLG -- MOS48 0049 EA0D 90 09 BCC LEDS0 ;[do not turn LEDs on] MOS48 0049 EA0D v76 MOS48 0050 EA0F ; set both LEDs (indicating a wait state) MOS48 0049 EA0D v76 MOS48 0051 EA0F A0 07 LDYIM &07 MOS48 0049 EA0D v76 MOS48 0052 EA11 8C 40 FE STY PBQ ;PBQ:=$07 MOS48 0049 EA0D v76 MOS48 0053 EA14 88 DEY MOS48 0049 EA0D v76 MOS48 0054 EA15 8C 40 FE STY PBQ ;PBQ:=$06 MOS48 0049 EA0D v76 MOS48 0055 EA18 LEDS0 ;set escape status MOS48 0049 EA0D v76 MOS48 0056 EA18 24 FF BIT ESCFLG -- MOS48 0057 EA1A 60 RTS -- MOS48 0058 EA1B -- MOS48 0059 EA1B CREG ;called by VDU module -- MOS48 0060 EA1B ; interrupts are disabled in order that a spurious -- MOS48 0061 EA1B ; ADC interrupt does not occur -- MOS48 0062 EA1B 08 PHP ;save interrupt state -- MOS48 0063 EA1C 78 SEI -- MOS48 0064 EA1D 8D 40 FE STA PBQ ;set addressable latch value -- MOS48 0065 EA20 28 PLP ;restore interrupt state -- MOS48 0066 EA21 60 RTS -- MOS48 0067 EA22 -- MOS48 0068 EA22 -- MOS48 0069 EA22 VP0 ;program vidproc register 0 (FX entry) -- MOS48 0070 EA22 8A TXA -- MOS48 0071 EA23 MVPRC0 ;set video processor register 0 -- MOS48 0072 EA23 08 PHP -- MOS48 0073 EA24 78 SEI ;**** DISABLE INTERRUPTS **** -- MOS48 0074 EA25 8D 48 02 STA VPREGA ;update RAM image -- MOS48 0075 EA28 8D 20 FE STA VPROC0 ;update ULA -- MOS48 0076 EA2B AD 53 02 LDA FLMRK -- MOS48 0077 EA2E 8D 51 02 STA FLCNT ;reset flash count to mark value -- MOS48 0078 EA31 28 PLP -- MOS48 0079 EA32 60 RTS -- MOS48 0080 EA33 -- MOS48 0081 EA33 VP1 ;program vidproc register 1 (FX entry) -- MOS48 0082 EA33 8A TXA -- MOS48 0083 EA34 MVPRC1 ;set video processor register 1 -- MOS48 0084 EA34 49 07 EORIM &07 ;adjust value accounting for ULA bug -- MOS48 0085 EA36 08 PHP -- MOS48 0086 EA37 78 SEI ;**** DISABLE INTERRUPTS **** -- MOS48 0087 EA38 8D 49 02 STA VPREGB ;update RAM image -- MOS48 0088 EA3B 8D 21 FE STA VPROC1 ;update ULA -- MOS48 0089 EA3E 28 PLP -- MOS48 0090 EA3F 60 RTS -- MOS48 0091 EA40 -- MOS48 0092 EA40 [ MOS125 = &FF -- MOS48 0093 EA40 | -- MOS48 0094 EA40 ; fetch/store byte from MMIO without dummy read cycle -- MOS48 0095 EA40 ; on entry A=OSBYTE call no. X=addr lo Y=byte C=1 -- MOS48 0096 EA40 69 65 CHEQUE ADCIM &65 ;C=1; A=&FC..FE -- MOS48 0097 EA42 38 SEC -- MOS48 0098 EA43 6A RORA ;C=0 read memory C=1 write -- MOS48 0099 EA44 ; fetch/store byte from I/O mem without dummy read -- MOS48 0100 EA44 ; on entry A=addr hi X=addr lo Y=byte C=0 read C=1 write -- MOS48 0101 EA44 BOUNCE -- MOS48 0102 EA44 85 FB STA PEEKHI ;MSB address -- MOS48 0103 EA46 86 FA STX PEEKLO ;LSB address -- MOS48 0104 EA48 A2 00 LDXIM &00 -- MOS48 0105 EA4A 90 04 BCC BREAD MOS48 0105 EA4A v7B MOS48 0106 EA4C 98 TYA MOS48 0105 EA4A v7B MOS48 0107 EA4D 81 FA STAIX PEEKLO MOS48 0105 EA4A v7B MOS48 0108 EA4F 60 RTS MOS48 0105 EA4A v7B MOS48 0109 EA50 BREAD MOS48 0105 EA4A v7B MOS48 0110 EA50 A1 FA LDAIX PEEKLO -- MOS48 0111 EA52 A8 TAY -- MOS48 0112 EA53 38 SEC ;return C=1 from OSBYTE/OSWORD -- MOS48 0113 EA54 60 RTS -- MOS48 0114 EA55 -- MOS48 0115 EA55 MSGON ;used by CFS -- MOS48 0116 EA55 ;Return EQ if messages off and not doing catalogue -- MOS48 0117 EA55 ;or during EXEC/SPOOL (during which messages cannot occur -- MOS48 0118 EA55 ;since this implies writing chars while within RDCH or WRCH) -- MOS48 0119 EA55 -- MOS48 0120 EA55 A5 EB LDA ESSEMA -- MOS48 0121 EA57 30 22 BMI MSGONY ;Inside RDCH/WRCH -> msgs OFF MOS48 0121 EA57 v5D MOS48 0122 EA59 MOS48 0121 EA57 v5D MOS48 0123 EA59 A9 08 LDAIM CATBIT MOS48 0121 EA57 v5D MOS48 0124 EA5B 25 E2 AND CFSTAT MOS48 0121 EA57 v5D MOS48 0125 EA5D D0 04 BNE MSGONX ;Out with msgs set. MOS48 0121 EA57 v5D MOS48 0126 EA5F MOS48 0121 EA57 v5D MOS48 0127 EA5F A9 88 LDAIM MONBIT MOS48 0121 EA57 v5D MOS48 0128 EA61 25 BB AND USFLGS MOS48 0121 EA57 v5D MOS48 0129 EA63 60 MSGONX RTS MOS48 0121 EA57 v5D MOS48 0130 EA64 MOS48 0121 EA57 v5D MOS48 0131 EA64 PEEK ;read byte from I/O processor MOS48 0121 EA57 v5D MOS48 0132 EA64 18 CLC MOS48 0121 EA57 v5D MOS48 0133 EA65 POKE ;write byte to I/O processor MOS48 0121 EA57 v5D MOS48 0134 EA65 AA TAX ;hold address lo-byte MOS48 0121 EA57 v5D MOS48 0135 EA66 C8 INY ;Y=1 MOS48 0121 EA57 v5D MOS48 0136 EA67 B1 F0 LDAIY WORDX ;get address hi-byte MOS48 0121 EA57 v5D MOS48 0137 EA69 48 PHA ;address in X and 1,S MOS48 0121 EA57 v5D MOS48 0138 EA6A A0 04 LDYIM &04 ;point to byte to write MOS48 MOS48 MOS48 MOS48 Acorn macro assembler Page 104 MOS48 MOS48 External interface routines MOS48 MOS48 0121 EA57 v5D MOS48 0139 EA6C B1 F0 LDAIY WORDX MOS48 0121 EA57 v5D MOS48 0140 EA6E A8 TAY ;hold byte to write MOS48 0121 EA57 v5D MOS48 0141 EA6F 68 PLA ;restore MSB of address MOS48 0121 EA57 v5D MOS48 0142 EA70 20 44 EA JSR BOUNCE ;write byte in Y/read byte into A MOS48 0121 EA57 v5D MOS48 0143 EA73 A0 04 LDYIM &04 MOS48 0121 EA57 v5D MOS48 0144 EA75 91 F0 STAIY WORDX ;store byte read in OSWORD block MOS48 0121 EA57 v5D MOS48 0145 EA77 VER MOS48 0121 EA57 v5D MOS48 0146 EA77 F0 07 BEQ PVER MOS48 0121 EA57 v5D MOS48 0147 EA79 A2 01 LDXIM MCVER ;X=1 for OSBYTE 0,1 MOS version 1 MOS48 0121 EA57 v5D MOS48 0148 EA7B MSGONY ;used by MSGON below MOS48 0121 EA57 v5D MOS48 0149 EA7B A9 00 LDAIM ZERO MOS48 0146 EA77 v78 MOS48 0150 EA7D 60 RTS MOS48 0146 EA77 v78 MOS48 0151 EA7E MOS48 0146 EA77 v78 MOS48 0152 EA7E 6C FA 00 JMI JMI JMILO ;jump to specific OSBYTE routine, C=1 -- MOS48 0153 EA81 EA80 PVER * JMI + &02 ;JMILO in zp, use high byte as BRK -- MOS48 0154 EA81 F7 = FX0MSG -- MOS48 0155 EA82 4F 53 20 = "OS " -- MOS48 0156 EA85 31 = VERA -- MOS48 0157 EA86 2E = "." -- MOS48 0158 EA87 32 = VERB -- MOS48 0159 EA88 36 = VERC ;BRK forms terminator -- MOS48 0160 EA89 -- MOS48 0161 EA89 BADSTR -- MOS48 0162 EA89 00 BRK ;report error 'Bad string' MOS48 0252 EAF0 ^17 MOS48 0163 EA8A FD = BADST MOS48 0252 EAF0 ^17 MOS48 0164 EA8B 42 61 64 = "Bad string" MOS48 0252 EAF0 ^17 MOS48 0165 EA95 00 = ZERO ;end of message MOS48 0252 EAF0 ^17 MOS48 0166 EA96 ] MOS48 0252 EAF0 ^17 MOS48 0167 EA96 MOS48 0252 EAF0 ^17 MOS48 0168 EA96 GSINTC ;intialise for string access (read item) MOS48 0252 EAF0 ^17 MOS48 0169 EA96 MOS48 0252 EAF0 ^17 MOS48 0170 EA96 18 CLC MOS48 0252 EAF0 ^17 MOS48 0171 EA97 GSINTS ;initialise for string access (read item/rest of line) MOS48 0252 EAF0 ^17 MOS48 0172 EA97 66 E4 ROR KQUOTE MOS48 0252 EAF0 ^17 MOS48 0173 EA99 20 9D E0 JSR SKIPSP ;A := LDAIY WORK MOS48 0252 EAF0 ^17 MOS48 0174 EA9C C8 INY ;skip possible opening quote MOS48 0252 EAF0 ^17 MOS48 0175 EA9D C9 22 CMPIM DQUOTE MOS48 0252 EAF0 ^17 MOS48 0176 EA9F F0 02 BEQ CLIOQ ;[opening quote, C=1] MOS48 0252 EAF0 ^17 MOS48 0177 EAA1 ; no opening quote MOS48 0252 EAF0 ^17 MOS48 0178 EAA1 88 DEY ;adjust for erroneous skip MOS48 0252 EAF0 ^17 MOS48 0179 EAA2 18 CLC MOS48 0252 EAF0 ^17 MOS48 0180 EAA3 CLIOQ MOS48 0252 EAF0 ^17 MOS48 0181 EAA3 66 E4 ROR KQUOTE ;PL => not a quoted string, MI => a quoted string MOS48 0252 EAF0 ^17 MOS48 0182 EAA5 C9 0D CMPIM MCR ;return EQ => end-of-string, NEQ => not end-of-string MOS48 0252 EAF0 ^17 MOS48 0183 EAA7 60 RTS MOS48 0252 EAF0 ^17 MOS48 0184 EAA8 ; MOS48 0252 EAF0 ^17 MOS48 0185 EAA8 GSREAD ;read character from string MOS48 0252 EAF0 ^17 MOS48 0186 EAA8 MOS48 0252 EAF0 ^17 MOS48 0187 EAA8 ; reset key mask (used in top bit option) MOS48 0252 EAF0 ^17 MOS48 0188 EAA8 A9 00 LDAIM ZERO MOS48 0252 EAF0 ^17 MOS48 0189 EAAA GSRA ;used by |! option, entered with A=$80 MOS48 0252 EAF0 ^17 MOS48 0190 EAAA 85 E5 STA KMASK ;KMASK := 0000 0000 (or KMASK := 1000 0000) MOS48 0252 EAF0 ^17 MOS48 0191 EAAC B1 F2 LDAIY WORK ;A := next character MOS48 0252 EAF0 ^17 MOS48 0192 EAAE C9 0D CMPIM MCR MOS48 0252 EAF0 ^17 MOS48 0193 EAB0 D0 06 BNE KEYNCR ;[not CR] MOS48 0252 EAF0 ^17 MOS48 0194 EAB2 ; CR found, C=1 MOS48 0252 EAF0 ^17 MOS48 0195 EAB2 ; check that string did not open with double quote MOS48 0252 EAF0 ^17 MOS48 0196 EAB2 24 E4 BIT KQUOTE MOS48 0252 EAF0 ^17 MOS48 0197 EAB4 30 D3 BMI BADSTR ;[opening double quote without closing double quote] MOS48 0252 EAF0 ^17 MOS48 0198 EAB6 10 19 BPL GSR1 ;[ALWAYS jump, return C=1 and EQ=>CR] MOS48 0252 EAF0 ^17 MOS48 0199 EAB8 KEYNCR ;character not CR MOS48 0252 EAF0 ^17 MOS48 0200 EAB8 C9 20 CMPIM SPACE MOS48 0252 EAF0 ^17 MOS48 0201 EABA 90 CD BCC BADSTR ;[control character in string] MOS48 0252 EAF0 ^17 MOS48 0202 EABC D0 06 BNE KEYNSP ;[not space] MOS48 0252 EAF0 ^17 MOS48 0203 EABE ; space character MOS48 0252 EAF0 ^17 MOS48 0204 EABE 24 E4 BIT KQUOTE MOS48 0252 EAF0 ^17 MOS48 0205 EAC0 30 3E BMI GSR0 ;[in quoted string] MOS48 0252 EAF0 ^17 MOS48 0206 EAC2 50 0D BVC GSR1 ;[not in quoted string and not read line, so space is terminator] MOS48 0252 EAF0 ^17 MOS48 0207 EAC4 ; fall thru, space will be returned as a valid character MOS48 0252 EAF0 ^17 MOS48 0208 EAC4 KEYNSP MOS48 0252 EAF0 ^17 MOS48 0209 EAC4 C9 22 CMPIM DQUOTE MOS48 0252 EAF0 ^17 MOS48 0210 EAC6 D0 0E BNE KEYNDQ ;[not double quote] MOS48 0252 EAF0 ^17 MOS48 0211 EAC8 ; double quote found MOS48 0252 EAF0 ^17 MOS48 0212 EAC8 24 E4 BIT KQUOTE MOS48 0252 EAF0 ^17 MOS48 0213 EACA 10 34 BPL GSR0 ;[not in quoted string] MOS48 0252 EAF0 ^17 MOS48 0214 EACC ; in quoted string MOS48 0252 EAF0 ^17 MOS48 0215 EACC C8 INY MOS48 0252 EAF0 ^17 MOS48 0216 EACD [ MOS125 = &FF MOS48 0252 EAF0 ^17 MOS48 0219 EACD | MOS48 0252 EAF0 ^17 MOS48 0220 EACD D1 F2 CMPIY WORK ;A = DQUOTE, compare with next character MOS48 0252 EAF0 ^17 MOS48 0221 EACF ] MOS48 0252 EAF0 ^17 MOS48 0222 EACF F0 2F BEQ GSR0 ;["" found in quoted string] MOS48 0252 EAF0 ^17 MOS48 0223 EAD1 GSR1 ;closing quote of quoted string MOS48 0252 EAF0 ^17 MOS48 0224 EAD1 20 9D E0 JSR SKIPSP ;skip spaces MOS48 0252 EAF0 ^17 MOS48 0225 EAD4 38 SEC MOS48 0252 EAF0 ^17 MOS48 0226 EAD5 60 RTS MOS48 0252 EAF0 ^17 MOS48 0227 EAD6 MOS48 0252 EAF0 ^17 MOS48 0228 EAD6 KEYNDQ ;character not CR or " MOS48 0252 EAF0 ^17 MOS48 0229 EAD6 C9 7C CMPIM "|" ;check for pseudo-escape MOS48 0252 EAF0 ^17 MOS48 0230 EAD8 D0 26 BNE GSR0 ;[valid string character] MOS48 0252 EAF0 ^17 MOS48 0231 EADA ; MOS48 0252 EAF0 ^17 MOS48 0232 EADA C8 INY MOS48 0252 EAF0 ^17 MOS48 0233 EADB B1 F2 LDAIY WORK MOS48 0252 EAF0 ^17 MOS48 0234 EADD C9 7C CMPIM "|" MOS48 0252 EAF0 ^17 MOS48 0235 EADF F0 1F BEQ GSR0 ;[|| found] MOS48 0252 EAF0 ^17 MOS48 0236 EAE1 ; MOS48 0252 EAF0 ^17 MOS48 0237 EAE1 C9 22 CMPIM DQUOTE MOS48 0252 EAF0 ^17 MOS48 0238 EAE3 F0 1B BEQ GSR0 ;[|" found] MOS48 0252 EAF0 ^17 MOS48 0239 EAE5 ; MOS48 0252 EAF0 ^17 MOS48 0240 EAE5 C9 21 CMPIM "!" MOS48 0252 EAF0 ^17 MOS48 0241 EAE7 D0 05 BNE KEYNPL ;[not |!] MOS48 0252 EAF0 ^17 MOS48 0242 EAE9 ; C=1 MOS48 0252 EAF0 ^17 MOS48 0243 EAE9 ; |! found - top bit option MOS48 0252 EAF0 ^17 MOS48 0244 EAE9 C8 INY ;step to next character MOS48 0252 EAF0 ^17 MOS48 0245 EAEA ; C=1 MOS48 0252 EAF0 ^17 MOS48 0246 EAEA A9 80 LDAIM &80 ;KMASK := 1000 0000 MOS48 0252 EAF0 ^17 MOS48 0247 EAEC D0 BC BNE GSRA ;[ALWAYS jump, get next character reseting key mask] MOS48 0252 EAF0 ^17 MOS48 0248 EAEE ; NEVER fall thru MOS48 0252 EAF0 ^17 MOS48 0249 EAEE MOS48 0252 EAF0 ^17 MOS48 0250 EAEE KEYNPL ;check for control character MOS48 0252 EAF0 ^17 MOS48 0251 EAEE C9 20 CMPIM SPACE MOS48 0252 EAF0 ^17 MOS48 0252 EAF0 90 97 BCC BADSTR ;[string contains a control character] MOS48 0205 EAC0 v41 MOS48 0253 EAF2 ; convert to CTRL character MOS48 0205 EAC0 v41 MOS48 0254 EAF2 C9 3F CMPIM "?" MOS48 0205 EAC0 v41 MOS48 0255 EAF4 F0 08 BEQ KEYDEL MOS48 0205 EAC0 v41 MOS48 0256 EAF6 20 29 EB JSR CTRLCH MOS48 0205 EAC0 v41 MOS48 0257 EAF9 ; fall thru with adjusted character MOS48 0205 EAC0 v41 MOS48 0258 EAF9 2C 49 D9 BIT FFBYT ;indicate character was escaped MOS48 0205 EAC0 v41 MOS48 0259 EAFC 70 03 BVS GSRX ;[ALWAYS jump] MOS48 0205 EAC0 v41 MOS48 0260 EAFE ; MOS48 0205 EAC0 v41 MOS48 0261 EAFE KEYDEL ;|? MOS48 MOS48 MOS48 MOS48 Acorn macro assembler Page 105 MOS48 MOS48 External interface routines MOS48 MOS48 0205 EAC0 v41 MOS48 0262 EAFE A9 7F LDAIM MDEL MOS48 0205 EAC0 v41 MOS48 0263 EB00 ; MOS48 0205 EAC0 v41 MOS48 0264 EB00 GSR0 ;valid character MOS48 0205 EAC0 v41 MOS48 0265 EB00 B8 CLV MOS48 0259 EAFC v7C MOS48 0266 EB01 ; MOS48 0259 EAFC v7C MOS48 0267 EB01 GSRX ;exit with valid character MOS48 0259 EAFC v7C MOS48 0268 EB01 ; rotate in selected top bit MOS48 0259 EAFC v7C MOS48 0269 EB01 C8 INY ;skip to next character -- MOS48 0270 EB02 05 E5 ORA KMASK ;test character for filing system applications -- MOS48 0271 EB04 18 CLC -- MOS48 0272 EB05 ; C=0, V=0 => not escaped, V=1 => escaped -- MOS48 0273 EB05 60 RTS -- MOS48 0274 EB06 -- MOS48 0275 EB06 -- MOS48 0276 EB06 [ MOS125 = &FF -- MOS48 0282 EB06 ] -- MOS48 0283 EB06 -- MOS48 0284 EB06 SHIFT ;perform shift inversion -- MOS48 0285 EB06 ; -- MOS48 0286 EB06 ; check for '0' character explicitly -- MOS48 0287 EB06 ; -- MOS48 0288 EB06 C9 30 CMPIM "0" -- MOS48 0289 EB08 F0 1E BEQ SHIFT0 ;[character is '0', shift '0' is '0', no action] MOS48 0289 EB08 v61 MOS48 0290 EB0A MOS48 0289 EB08 v61 MOS48 0291 EB0A ; convert characters in range ['A',DEL) MOS48 0289 EB08 v61 MOS48 0292 EB0A ; MOS48 0289 EB08 v61 MOS48 0293 EB0A C9 40 CMPIM AT MOS48 0289 EB08 v61 MOS48 0294 EB0C F0 1A BEQ SHIFT0 ;[AT, no action] MOS48 0289 EB08 v61 MOS48 0295 EB0E 90 12 BCC SHIFT1 ;[ch= 'A' MOS48 0289 EB08 v61 MOS48 0298 EB10 ; MOS48 0289 EB08 v61 MOS48 0299 EB10 C9 7F CMPIM MDEL MOS48 0289 EB08 v61 MOS48 0300 EB12 F0 14 BEQ SHIFT0 ;[ch=DEL, no action] MOS48 0289 EB08 v61 MOS48 0301 EB14 B0 10 BCS SHFLIP ;[ch>DEL, is softkey code] MOS48 0289 EB08 v61 MOS48 0302 EB16 ; MOS48 0289 EB08 v61 MOS48 0303 EB16 ; 'A' <= character < DEL MOS48 0289 EB08 v61 MOS48 0304 EB16 ; MOS48 0289 EB08 v61 MOS48 0305 EB16 CTRLSK ;used by CTRLCH for CTRL/softkey MOS48 0289 EB08 v61 MOS48 0306 EB16 49 30 EORIM &30 ;flip bit to effect shift (N.B. EORIM $10 later) MOS48 0289 EB08 v61 MOS48 0307 EB18 ; MOS48 0289 EB08 v61 MOS48 0308 EB18 ; N.B. this has mapped '_' to $6F and POUND to $50 MOS48 0289 EB08 v61 MOS48 0309 EB18 ; swop underline and pound characters MOS48 0289 EB08 v61 MOS48 0310 EB18 ; MOS48 0289 EB08 v61 MOS48 0311 EB18 C9 6F CMPIM &6F ;i.e. mapped '_' MOS48 0289 EB08 v61 MOS48 0312 EB1A F0 04 BEQ SHIFT2 ;[underline character] MOS48 0289 EB08 v61 MOS48 0313 EB1C C9 50 CMPIM &50 ;i.e. mapped POUND (not altered by EORIM $20 anyway) MOS48 0289 EB08 v61 MOS48 0314 EB1E D0 02 BNE SHIFT1 ;[neither underline nor pound character] MOS48 0289 EB08 v61 MOS48 0315 EB20 ; MOS48 0289 EB08 v61 MOS48 0316 EB20 SHIFT2 ;swop underline and pound characters MOS48 0289 EB08 v61 MOS48 0317 EB20 49 1F EORIM &1F MOS48 0289 EB08 v61 MOS48 0318 EB22 ; MOS48 0289 EB08 v61 MOS48 0319 EB22 SHIFT1 MOS48 0289 EB08 v61 MOS48 0320 EB22 MOS48 0289 EB08 v61 MOS48 0321 EB22 ; convert characters above '!' MOS48 0289 EB08 v61 MOS48 0322 EB22 ; MOS48 0289 EB08 v61 MOS48 0323 EB22 C9 21 CMPIM "!" MOS48 0289 EB08 v61 MOS48 0324 EB24 90 02 BCC SHIFT0 ;[ch<'!', no action] MOS48 0289 EB08 v61 MOS48 0325 EB26 ; MOS48 0289 EB08 v61 MOS48 0326 EB26 ; '!' <= ch < AT MOS48 0289 EB08 v61 MOS48 0327 EB26 ; MOS48 0289 EB08 v61 MOS48 0328 EB26 SHFLIP MOS48 0289 EB08 v61 MOS48 0329 EB26 49 10 EORIM &10 ;$80..$8F -> $90..$9F and vice-versa MOS48 0289 EB08 v61 MOS48 0330 EB28 MOS48 0289 EB08 v61 MOS48 0331 EB28 SHIFT0 MOS48 0289 EB08 v61 MOS48 0332 EB28 60 RTS MOS48 0338 EB2D ^67 MOS48 0333 EB29 MOS48 0338 EB2D ^67 MOS48 0334 EB29 MOS48 0338 EB2D ^67 MOS48 0335 EB29 CTRLCH ;compute CTRL version of character MOS48 0338 EB2D ^67 MOS48 0336 EB29 C9 7F CMPIM MDEL MOS48 0338 EB2D ^67 MOS48 0337 EB2B F0 0E BEQ CTRL0 ;[CTRL/DEL = DEL] MOS48 0338 EB2D ^67 MOS48 0338 EB2D B0 E7 BCS CTRLSK ;[top bit set, therefore softkey needing EORIM $20] MOS48 0337 EB2B v71 MOS48 0339 EB2F MOS48 0337 EB2B v71 MOS48 0340 EB2F ; pound & underline MOS48 0337 EB2B v71 MOS48 0341 EB2F ; MOS48 0337 EB2B v71 MOS48 0342 EB2F C9 60 CMPIM POUND ;make CTRL/pound = CTRL/underline MOS48 0337 EB2B v71 MOS48 0343 EB31 D0 02 BNE CTRL1 ;[not pound character] MOS48 0337 EB2B v71 MOS48 0344 EB33 A9 5F LDAIM "_" ;substitute underline for pound MOS48 0337 EB2B v71 MOS48 0345 EB35 CTRL1 MOS48 0337 EB2B v71 MOS48 0346 EB35 MOS48 0337 EB2B v71 MOS48 0347 EB35 [ FALSE=0 MOS48 0337 EB2B v71 MOS48 0353 EB35 ] MOS48 0337 EB2B v71 MOS48 0354 EB35 MOS48 0337 EB2B v71 MOS48 0355 EB35 [ FALSE=0 MOS48 0337 EB2B v71 MOS48 0361 EB35 ] MOS48 0337 EB2B v71 MOS48 0362 EB35 MOS48 0337 EB2B v71 MOS48 0363 EB35 C9 40 CMPIM AT MOS48 0337 EB2B v71 MOS48 0364 EB37 90 02 BCC CTRL4 ;[character < AT so do not convert] MOS48 0337 EB2B v71 MOS48 0365 EB39 ; AT <= character < DEL, so convert MOS48 0337 EB2B v71 MOS48 0366 EB39 29 1F ANDIM &1F ;convert to ctrl value MOS48 0337 EB2B v71 MOS48 0367 EB3B CTRL4 MOS48 0337 EB2B v71 MOS48 0368 EB3B MOS48 0337 EB2B v71 MOS48 0369 EB3B CTRL0 MOS48 0337 EB2B v71 MOS48 0370 EB3B 60 RTS -- MOS48 0371 EB3C -- MOS48 0372 EB3C [ FALSE=0 -- MOS48 0375 EB3C ] -- MOS48 0376 EB3C -- MOS48 0377 EB3C SLBOOT ;'/!BOOT' auto-boot string -- MOS48 0378 EB3C 2F 21 42 = "/!BOOT" -- MOS48 0379 EB42 0D = MCR -- MOS48 0380 EB43 -- MOS48 0381 EB43 -- MOS48 0382 EB43 BREAK ;conditionally intercept BREAK -- MOS48 0383 EB43 ; type of interception is in C -- MOS48 0384 EB43 AD 87 02 LDA BREAKI -- MOS48 0385 EB46 49 4C EORIM &4C -- MOS48 0386 EB48 D0 13 BNE BREAK0 ;[not a JMP instruction] MOS48 0386 EB48 v6C MOS48 0387 EB4A 4C 87 02 JMP BREAKI MOS48 0386 EB48 v6C MOS48 0388 EB4D MOS48 0386 EB48 v6C MOS48 0389 EB4D MOS48 0386 EB48 v6C MOS48 0390 EB4D TV ;alter TV characteristics MOS48 0386 EB48 v6C MOS48 0391 EB4D AD 90 02 LDA VERTIC MOS48 0386 EB48 v6C MOS48 0392 EB50 8E 90 02 STX VERTIC ;vertical height adjust MOS48 0386 EB48 v6C MOS48 0393 EB53 AA TAX ;X := old state MOS48 0386 EB48 v6C MOS48 0394 EB54 98 TYA MOS48 0386 EB48 v6C MOS48 0395 EB55 29 01 ANDIM &01 MOS48 0386 EB48 v6C MOS48 0396 EB57 AC 91 02 LDY INTERL ;Y := old state MOS48 0386 EB48 v6C MOS48 0397 EB5A 8D 91 02 STA INTERL ;interlace invert MOS48 0386 EB48 v6C MOS48 0398 EB5D BREAK0 MOS48 0386 EB48 v6C MOS48 0399 EB5D 60 RTS MOS48 MOS48 MOS48 MOS48 Acorn macro assembler Page 106 MOS48 MOS48 External interface routines MOS48 -- MOS48 0400 EB5E -- MOS48 0401 EB5E [ MOS125 = &FF -- MOS48 0416 EB5E ] -- MOS48 0417 EB5E -- MOS48 0418 EB5E LNK MOS52 -- MOS52 0001 EB5E -- MOS52 0002 EB5E ; MOS52 -- MOS52 0003 EB5E TTL MOS52 Sound generator -- MOS52 0004 EB5E OPT MOS52 MOS52 MOS52 MOS52 MOS52 Acorn macro assembler Page 107 MOS52 MOS52 Sound generator MOS52 -- MOS52 0005 EB5E ;(c) 1981 ACORN Computers Limited -- MOS52 0006 EB5E ;BBC Microcomputer Machine Operating System (MOS) -- MOS52 0007 EB5E ;Change record: -- MOS52 0008 EB5E ;Prototype version 14/1/82 -- MOS52 0009 EB5E ;Author(s): -- MOS52 0010 EB5E ;PBM Peter Miller -- MOS52 0011 EB5E ;Internal variable allocation $0800 to $08C0 -- MOS52 0012 EB5E 08C0 ENV * ENVEL ;envelope table 16 bytes per envelope -- MOS52 0013 EB5E 0804 ATTN * SNDWRK+&04 ;current attenuation -- MOS52 0014 EB5E 0808 EPERD * ATTN +&04 ;current envelope period -- MOS52 0015 EB5E 080C SNOTE * EPERD +&04 ;base note -- MOS52 0016 EB5E 0810 NPERD * SNOTE +&04 ;the current frequency envelope period 0-3 -- MOS52 0017 EB5E 0814 NCONT * NPERD +&04 ;number of ticks left in current frequency period -- MOS52 0018 EB5E 0818 DUR * NCONT +&04 ;remaining number of ticks in the current note -- MOS52 0019 EB5E 081C DRDIV * DUR +&04 ;division of 1/100 sewc to 1/20 sec -- MOS52 0020 EB5E 0820 ENVLP * DRDIV +&04 ;current envelope ( TIMES 16) -- MOS52 0021 EB5E 0824 SCONT * ENVLP +&04 ;number of 1/100th secs before next envelope tick -- MOS52 0022 EB5E 0828 WAIT * SCONT +&04 ;channel waiting for sWATGO flag -- MOS52 0023 EB5E 082C OLDNTE * WAIT +&04 ;current note in chip -- MOS52 0024 EB5E 0830 NTADD * OLDNTE +&04 ;current offset from base note -- MOS52 0025 EB5E -- MOS52 0026 EB5E -- MOS52 0027 EB5E 0838 NOWAT * NTADD +&08 ;number of other channels required for chord -- MOS52 0028 EB5E 0839 ATINC * NOWAT +&01 ;current rate of attn change -- MOS52 0029 EB5E 083A PEAK * ATINC +&01 ;peak of amplitude envelope -- MOS52 0030 EB5E 083B WATGO * PEAK +&01 ;flag <>0 => play chord -- MOS52 0031 EB5E 083C FRACT * WATGO +&01 ;fractional part of current note -- MOS52 0032 EB5E 083D PRDL * FRACT +&01 ;low period during convert -- MOS52 0033 EB5E 083E PRDH * PRDL +&01 ;hign period during convert -- MOS52 0034 EB5E 083F NOTDIF * PRDH +&01 ;Note difference used in interpolation -- MOS52 0035 EB5E -- MOS52 0036 EB5E 02CF FLUSH * SFLUSH -&04 -- MOS52 0037 EB5E 0800 ACTIV * MACTIV -&04 -- MOS52 0038 EB5E -- MOS52 0039 EB5E -- MOS52 0040 EB5E ;Externally referenced data -- MOS52 0041 EB5E ;ACTIV -- MOS52 0042 EB5E ;FLUSH -- MOS52 0043 EB5E ;ENVEL -- MOS52 0044 EB5E ;SNDWRK -- MOS52 0045 EB5E ;Externally referenced routines -- MOS52 0046 EB5E ;EXAM -- MOS52 0047 EB5E ;REMOV -- MOS52 0048 EB5E ;Entry points -- MOS52 0049 EB5E ;SNDRST Initialise sound system, shut sound chip up -- MOS52 0050 EB5E ; Acc,X,Y ,P destroyed -- MOS52 0051 EB5E ;SNDIRQ Service entry point 1/100th second -- MOS52 0052 EB5E ; only use after initialisation -- MOS52 0053 EB5E ; Acc,X ,Y and P destroyed -- MOS52 0054 EB5E ;; A,X,P preserved, Y set to zero on exit -- MOS52 0055 EB5E -- MOS52 0056 EB5E -- MOS52 0057 EB5E MINATN ;set minimum attenuation -- MOS52 0058 EB5E A9 04 LDAIM &04 -- MOS52 0059 EB60 9D 08 08 STAAX EPERD -- MOS52 0060 EB63 A9 C0 LDAIM &C0 -- MOS52 0061 EB65 -- MOS52 0062 EB65 -- MOS52 0063 EB65 UPATN ;update attenuation -- MOS52 0064 EB65 9D 04 08 STAAX ATTN -- MOS52 0065 EB68 ; -- MOS52 0066 EB68 ; shut up mode ? -- MOS52 0067 EB68 ; -- MOS52 0068 EB68 AC 62 02 LDY SHUTUP -- MOS52 0069 EB6B F0 02 BEQ NOISY ;[sound allowed] MOS52 0069 EB6B v7D MOS52 0070 EB6D ; sound suppressed MOS52 0069 EB6B v7D MOS52 0071 EB6D A9 C0 LDAIM &C0 ;force minimum attenuation MOS52 0069 EB6B v7D MOS52 0072 EB6F NOISY MOS52 0069 EB6B v7D MOS52 0073 EB6F ; MOS52 0069 EB6B v7D MOS52 0074 EB6F [ MOS125 = &FF MOS52 0069 EB6B v7D MOS52 0083 EB6F | MOS52 0069 EB6B v7D MOS52 0084 EB6F ; in: x ~b3 b2 b1 b0 x x x MOS52 0069 EB6B v7D MOS52 0085 EB6F ;out: c2 c1 c0 1 ~b3 ~b2 ~b1 ~b0 MOS52 0069 EB6B v7D MOS52 0086 EB6F 4A LSRA -- MOS52 0087 EB70 4A LSRA -- MOS52 0088 EB71 4A LSRA -- MOS52 0089 EB72 1D 94 EB ORAAX CHAN -- MOS52 0090 EB75 29 EF ANDIM &EF -- MOS52 0091 EB77 49 17 EORIM &17 -- MOS52 0092 EB79 ] -- MOS52 0093 EB79 ;fall into the send routine -- MOS52 0094 EB79 SNDOUT -- MOS52 0095 EB79 SEND -- MOS52 0096 EB79 08 PHP -- MOS52 0097 EB7A SENDX ;entered by code which has already done a PHP -- MOS52 0098 EB7A 78 SEI -- MOS52 0099 EB7B A0 FF LDYIM &FF -- MOS52 0100 EB7D 8C 43 FE STY &FE43 -- MOS52 0101 EB80 8D 4F FE STA &FE4F -- MOS52 0102 EB83 C8 INY -- MOS52 0103 EB84 8C 40 FE STY &FE40 -- MOS52 0104 EB87 A0 02 LDYIM &02 -- MOS52 0105 EB89 SWAIT -- MOS52 0106 EB89 88 DEY MOS52 0107 EB8A ^7D MOS52 0107 EB8A D0 FD BNE SWAIT -- MOS52 0108 EB8C A0 08 LDYIM &08 -- MOS52 0109 EB8E 8C 40 FE STY &FE40 -- MOS52 0110 EB91 A0 04 LDYIM &04 -- MOS52 0111 EB93 SWAT2 -- MOS52 0112 EB93 88 DEY MOS52 0113 EB94 ^7D MOS52 0113 EB94 D0 FD BNE SWAT2 -- MOS52 0114 EB96 28 PLP -- MOS52 0115 EB97 60 RTS -- MOS52 0116 EB98 RCHAN -- MOS52 0117 EB98 EB94 CHAN * RCHAN -&04 -- MOS52 0118 EB98 E0 = &E0 -- MOS52 0119 EB99 C0 = &C0 -- MOS52 0120 EB9A A0 = &A0 -- MOS52 0121 EB9B 80 = &80 -- MOS52 0122 EB9C -- MOS52 0123 EB9C -- MOS52 0124 EB9C HENDS -- MOS52 0125 EB9C 4C 9D EC JMP ENDSW ;finished all envelope processing MOS52 0172 EBED ^2D MOS52 0126 EB9F MOS52 0172 EBED ^2D MOS52 0127 EB9F SNDIRQ MOS52 0172 EBED ^2D MOS52 0128 EB9F A9 00 LDAIM ZERO MOS52 0172 EBED ^2D MOS52 0129 EBA1 8D 3B 08 STA WATGO MOS52 0172 EBED ^2D MOS52 0130 EBA4 AD 38 08 LDA NOWAT MOS52 0172 EBED ^2D MOS52 0131 EBA7 D0 06 BNE MAN2 MOS52 0172 EBED ^2D MOS52 0132 EBA9 EE 3B 08 INC WATGO MOS52 0172 EBED ^2D MOS52 0133 EBAC CE 38 08 DEC NOWAT MOS52 MOS52 MOS52 MOS52 Acorn macro assembler Page 108 MOS52 MOS52 Sound generator MOS52 MOS52 0172 EBED ^2D MOS52 0134 EBAF MAN2 MOS52 0172 EBED ^2D MOS52 0135 EBAF A2 08 LDXIM &08 ;X always contains current channel MOS52 0172 EBED ^2D MOS52 0136 EBB1 MNLOP MOS52 0172 EBED ^2D MOS52 0137 EBB1 CA DEX ;first real channel is 3 MOS52 0172 EBED ^2D MOS52 0138 EBB2 BD 00 08 LDAAX ACTIV ;check if channel X is doing anything MOS52 0172 EBED ^2D MOS52 0139 EBB5 F0 E5 BEQ HENDS ;[channel not active so take quick route] MOS52 0172 EBED ^2D MOS52 0140 EBB7 BD CF 02 LDAAX FLUSH MOS52 0172 EBED ^2D MOS52 0141 EBBA 30 05 BMI MAN8 ;[must abort current note] MOS52 0172 EBED ^2D MOS52 0142 EBBC BD 18 08 LDAAX DUR MOS52 0172 EBED ^2D MOS52 0143 EBBF D0 03 BNE MAN10 ;[note finished] MOS52 0172 EBED ^2D MOS52 0144 EBC1 MAN8 MOS52 0172 EBED ^2D MOS52 0145 EBC1 20 AF EC JSR NXTNT ;[get new note from queue if it exists] MOS52 0172 EBED ^2D MOS52 0146 EBC4 MAN10 MOS52 0172 EBED ^2D MOS52 0147 EBC4 BD 18 08 LDAAX DUR MOS52 0172 EBED ^2D MOS52 0148 EBC7 F0 13 BEQ MAN13 ;next note now MOS52 0172 EBED ^2D MOS52 0149 EBC9 C9 FF CMPIM &FF MOS52 0172 EBED ^2D MOS52 0150 EBCB F0 12 BEQ MAN12 MOS52 0172 EBED ^2D MOS52 0151 EBCD DE 1C 08 DECAX DRDIV MOS52 0172 EBED ^2D MOS52 0152 EBD0 D0 0D BNE MAN12 ;[not 1/20th sec tick] MOS52 0172 EBED ^2D MOS52 0153 EBD2 A9 05 LDAIM &05 MOS52 0172 EBED ^2D MOS52 0154 EBD4 9D 1C 08 STAAX DRDIV ; set counter to wait for further 1/20th sec MOS52 0172 EBED ^2D MOS52 0155 EBD7 DE 18 08 DECAX DUR MOS52 0172 EBED ^2D MOS52 0156 EBDA D0 03 BNE MAN12 MOS52 0172 EBED ^2D MOS52 0157 EBDC MAN13 MOS52 0172 EBED ^2D MOS52 0158 EBDC 20 AF EC JSR NXTNT ;try to get a new note MOS52 0172 EBED ^2D MOS52 0159 EBDF MAN12 MOS52 0172 EBED ^2D MOS52 0160 EBDF BD 24 08 LDAAX SCONT MOS52 0172 EBED ^2D MOS52 0161 EBE2 F0 05 BEQ MAN11 MOS52 0172 EBED ^2D MOS52 0162 EBE4 DE 24 08 DECAX SCONT ;dec envelope scaling counter MOS52 0172 EBED ^2D MOS52 0163 EBE7 D0 B3 BNE HENDS ;[not time for new envelope tick] MOS52 0172 EBED ^2D MOS52 0164 EBE9 MAN11 MOS52 0172 EBED ^2D MOS52 0165 EBE9 BC 20 08 LDYAX ENVLP ;get envelope offset into Y MOS52 0172 EBED ^2D MOS52 0166 EBEC [ MOS125 = &FF MOS52 0172 EBED ^2D MOS52 0170 EBEC | MOS52 0172 EBED ^2D MOS52 0171 EBEC C8 INY MOS52 0172 EBED ^2D MOS52 0172 EBED F0 AD BEQ HENDS -- MOS52 0173 EBEF B9 BF 08 LDAAY ENV-&01 ;get first envelope parameter -- MOS52 0174 EBF2 ] -- MOS52 0175 EBF2 29 7F ANDIM &7F ;mask off sweep repeat bit -- MOS52 0176 EBF4 9D 24 08 STAAX SCONT ;set up scaling counter again -- MOS52 0177 EBF7 BD 08 08 LDAAX EPERD ;envelope period -- MOS52 0178 EBFA C9 04 CMPIM &04 ;check for 'finished' period -- MOS52 0179 EBFC F0 52 BEQ ENDEV ;[no longer in middle of envelope] MOS52 0179 EBFC v2D MOS52 0180 EBFE ; MOS52 0179 EBFC v2D MOS52 0181 EBFE [ MOS125 = &FF MOS52 0179 EBFC v2D MOS52 0183 EBFE ] MOS52 0179 EBFC v2D MOS52 0184 EBFE 18 CLC MOS52 0179 EBFC v2D MOS52 0185 EBFF 7D 20 08 ADCAX ENVLP ;get offset to current amplitude envelope parameters MOS52 0179 EBFC v2D MOS52 0186 EC02 A8 TAY ;ENV+7,Y now point to attninc rate and sENV+11 to attnlevel MOS52 0179 EBFC v2D MOS52 0187 EC03 B9 CB 08 LDAAY ENV+&0B ;atenuation level MOS52 0179 EBFC v2D MOS52 0188 EC06 38 SEC MOS52 0179 EBFC v2D MOS52 0189 EC07 E9 3F SBCIM &3F MOS52 0179 EBFC v2D MOS52 0190 EC09 8D 3A 08 STA PEAK ;temp data for following calculations MOS52 0179 EBFC v2D MOS52 0191 EC0C B9 C7 08 LDAAY ENV+&7 ;amount by which attenuation is changed each tick MOS52 0179 EBFC v2D MOS52 0192 EC0F 8D 39 08 STA ATINC ;temp data for calculations MOS52 0179 EBFC v2D MOS52 0193 EC12 BD 04 08 LDAAX ATTN MOS52 0179 EBFC v2D MOS52 0194 EC15 48 PHA MOS52 0179 EBFC v2D MOS52 0195 EC16 18 CLC MOS52 0179 EBFC v2D MOS52 0196 EC17 6D 39 08 ADC ATINC ;add incremnet to attenuation MOS52 0179 EBFC v2D MOS52 0197 EC1A 50 04 BVC OK8 ;first check for 8 bit overflow MOS52 0179 EBFC v2D MOS52 0198 EC1C [ MOS125 = &FF MOS52 0179 EBFC v2D MOS52 0216 EC1C | MOS52 0179 EBFC v2D MOS52 0217 EC1C ;else overflow. carry=~b7. generate &C0 if b7=0 or &3F if b7=1 MOS52 0179 EBFC v2D MOS52 0218 EC1C 09 7F ORAIM &7F ;n111 1111 C=~n MOS52 0179 EBFC v2D MOS52 0219 EC1E 69 40 ADCIM &40 ;~~nn nnnn C=n MOS52 0179 EBFC v2D MOS52 0220 EC20 OK8 MOS52 0179 EBFC v2D MOS52 0221 EC20 C9 C0 CMPIM &C0 ;compare b7 and b6 (thanks again Woz) MOS52 0179 EBFC v2D MOS52 0222 EC22 10 06 BPL ATOK ;if b7=b6 then value in range MOS52 0179 EBFC v2D MOS52 0223 EC24 ;else overflow. generate &3F if b7=0 or &C0 if b7=1 MOS52 0179 EBFC v2D MOS52 0224 EC24 09 7F ORAIM &7F ;n111 1111 C=0 MOS52 0179 EBFC v2D MOS52 0225 EC26 69 40 ADCIM &40 ;~011 1111 C=n MOS52 0179 EBFC v2D MOS52 0226 EC28 69 80 ADCIM &80 ;nn~~ ~~~~ C=~n MOS52 0179 EBFC v2D MOS52 0227 EC2A ATOK MOS52 0179 EBFC v2D MOS52 0228 EC2A 9D 04 08 STAAX ATTN ;store as new attenuation MOS52 0179 EBFC v2D MOS52 0229 EC2D CE 39 08 DEC ATINC MOS52 0179 EBFC v2D MOS52 0230 EC30 ;the following code checks that (ATTN-PEAK)*SIGN(increment)>=0 MOS52 0179 EBFC v2D MOS52 0231 EC30 ] MOS52 0179 EBFC v2D MOS52 0232 EC30 38 SEC MOS52 0179 EBFC v2D MOS52 0233 EC31 ED 3A 08 SBC PEAK MOS52 0179 EBFC v2D MOS52 0234 EC34 4D 39 08 EOR ATINC MOS52 0179 EBFC v2D MOS52 0235 EC37 30 09 BMI SMPER ;[attenuation has not reached limit yet] MOS52 0179 EBFC v2D MOS52 0236 EC39 AD 3A 08 LDA PEAK ;attn was too large therefore set to peak MOS52 0179 EBFC v2D MOS52 0237 EC3C 9D 04 08 STAAX ATTN MOS52 0179 EBFC v2D MOS52 0238 EC3F FE 08 08 INCAX EPERD ;next envelope period MOS52 0179 EBFC v2D MOS52 0239 EC42 SMPER ;same envelope period MOS52 0179 EBFC v2D MOS52 0240 EC42 68 PLA MOS52 0179 EBFC v2D MOS52 0241 EC43 5D 04 08 EORAX ATTN MOS52 0179 EBFC v2D MOS52 0242 EC46 29 F8 ANDIM &F8 MOS52 0179 EBFC v2D MOS52 0243 EC48 F0 06 BEQ NNEWA ;no new chip attenuation output (hasn't changed)] MOS52 0179 EBFC v2D MOS52 0244 EC4A BD 04 08 LDAAX ATTN MOS52 0179 EBFC v2D MOS52 0245 EC4D 20 65 EB JSR UPATN ;update chip attenuation MOS52 0179 EBFC v2D MOS52 0246 EC50 NNEWA MOS52 0179 EBFC v2D MOS52 0247 EC50 ENDEV MOS52 0179 EBFC v2D MOS52 0248 EC50 ;frequency sweeping part of envelope MOS52 0179 EBFC v2D MOS52 0249 EC50 BD 10 08 LDAAX NPERD -- MOS52 0250 EC53 C9 03 CMPIM &03 -- MOS52 0251 EC55 F0 46 BEQ ENDSW MOS52 0251 EC55 v39 MOS52 0252 EC57 [ MOS125 = &FF MOS52 0251 EC55 v39 MOS52 0258 EC57 | MOS52 0251 EC55 v39 MOS52 0259 EC57 BC 14 08 LDYAX NCONT ;number of ticks left in this frequency period MOS52 0251 EC55 v39 MOS52 0260 EC5A D0 25 BNE GTPRD MOS52 0251 EC55 v39 MOS52 0261 EC5C FE 10 08 INCAX NPERD ;next period MOS52 0251 EC55 v39 MOS52 0262 EC5F C9 02 CMPIM &03-&01 ;check for period=3 =>end of all periods MOS52 0251 EC55 v39 MOS52 0263 EC61 38 SEC ;A=next period - 1, increment it before forming pointer MOS52 0251 EC55 v39 MOS52 0264 EC62 ] MOS52 0251 EC55 v39 MOS52 0265 EC62 D0 11 BNE NTLF ;[not last period] MOS52 0251 EC55 v39 MOS52 0266 EC64 BC 20 08 LDYAX ENVLP ;the following checks for bit 8 set in the first envelope byte=> no sweep repeat MOS52 0251 EC55 v39 MOS52 0267 EC67 B9 C0 08 LDAAY ENV MOS52 0251 EC55 v39 MOS52 0268 EC6A 30 31 BMI ENDSW ;[not a repeating sweep therefore jump to end] MOS52 0251 EC55 v39 MOS52 0269 EC6C A9 00 LDAIM ZERO MOS52 0251 EC55 v39 MOS52 0270 EC6E 9D 30 08 STAAX NTADD ;reset amount added to note to zero for next sweep MOS52 0251 EC55 v39 MOS52 0271 EC71 9D 10 08 STAAX NPERD ;first sweep period MOS52 0251 EC55 v39 MOS52 0272 EC74 [ MOS125 = &FF MOS52 0251 EC55 v39 MOS52 0276 EC74 | MOS52 0251 EC55 v39 MOS52 0277 EC74 18 CLC ;A=next period, do not adjust MOS52 0251 EC55 v39 MOS52 0278 EC75 NTLF MOS52 0251 EC55 v39 MOS52 0279 EC75 ;the following points Y to the sweep parameters of the current envelope/period MOS52 0251 EC55 v39 MOS52 0280 EC75 ] MOS52 0251 EC55 v39 MOS52 0281 EC75 7D 20 08 ADCAX ENVLP MOS52 0251 EC55 v39 MOS52 0282 EC78 A8 TAY MOS52 0251 EC55 v39 MOS52 0283 EC79 B9 C4 08 LDAAY ENV+&04 MOS52 MOS52 MOS52 MOS52 Acorn macro assembler Page 109 MOS52 MOS52 Sound generator MOS52 MOS52 0251 EC55 v39 MOS52 0284 EC7C 9D 14 08 STAAX NCONT ;number of cycles for this frequency period MOS52 0251 EC55 v39 MOS52 0285 EC7F F0 1C BEQ ENDSW ;zero frequency period MOS52 0251 EC55 v39 MOS52 0286 EC81 GTPRD MOS52 0251 EC55 v39 MOS52 0287 EC81 DE 14 08 DECAX NCONT MOS52 0251 EC55 v39 MOS52 0288 EC84 BD 20 08 LDAAX ENVLP MOS52 0251 EC55 v39 MOS52 0289 EC87 18 CLC MOS52 0251 EC55 v39 MOS52 0290 EC88 7D 10 08 ADCAX NPERD MOS52 0251 EC55 v39 MOS52 0291 EC8B A8 TAY MOS52 0251 EC55 v39 MOS52 0292 EC8C B9 C1 08 LDAAY ENV+&01 ;note increment for this frequency period MOS52 0251 EC55 v39 MOS52 0293 EC8F 18 CLC MOS52 0251 EC55 v39 MOS52 0294 EC90 7D 30 08 ADCAX NTADD MOS52 0251 EC55 v39 MOS52 0295 EC93 9D 30 08 STAAX NTADD ;add increment to the note offset MOS52 0251 EC55 v39 MOS52 0296 EC96 18 CLC MOS52 0251 EC55 v39 MOS52 0297 EC97 7D 0C 08 ADCAX SNOTE MOS52 0251 EC55 v39 MOS52 0298 EC9A 20 41 ED JSR CNVRT ;convert note to period and output MOS52 0251 EC55 v39 MOS52 0299 EC9D ENDSW MOS52 0251 EC55 v39 MOS52 0300 EC9D E0 04 CPXIM &04 ;'test channel number for zero' -- MOS52 0301 EC9F F0 0D BEQ EDUP ;[channel was zero therefore leave loop] MOS52 0301 EC9F v72 MOS52 0302 ECA1 4C B1 EB JMP MNLOP MOS52 0301 EC9F v72 MOS52 0303 ECA4 MOS52 0301 EC9F v72 MOS52 0304 ECA4 MOS52 0301 EC9F v72 MOS52 0305 ECA4 SNDRST MOS52 0301 EC9F v72 MOS52 0306 ECA4 A2 08 LDXIM &08 MOS52 0301 EC9F v72 MOS52 0307 ECA6 ; MOS52 0301 EC9F v72 MOS52 0308 ECA6 RLOP MOS52 0301 EC9F v72 MOS52 0309 ECA6 CA DEX MOS52 0301 EC9F v72 MOS52 0310 ECA7 20 E3 EC JSR SCRST ;reset sound channel X MOS52 0301 EC9F v72 MOS52 0311 ECAA E0 04 CPXIM &04 MOS52 0301 EC9F v72 MOS52 0312 ECAC D0 F8 BNE RLOP MOS52 0301 EC9F v72 MOS52 0313 ECAE ; MOS52 0301 EC9F v72 MOS52 0314 ECAE EDUP ;end of 1/100th sec processing MOS52 0301 EC9F v72 MOS52 0315 ECAE 60 RTS -- MOS52 0316 ECAF -- MOS52 0317 ECAF -- MOS52 0318 ECAF NXTNT -- MOS52 0319 ECAF BD 08 08 LDAAX EPERD ;get current amplitude period -- MOS52 0320 ECB2 C9 04 CMPIM &04 ;period 4 => note has fully released -- MOS52 0321 ECB4 F0 05 BEQ ELDDN MOS52 0321 ECB4 v7A MOS52 0322 ECB6 A9 03 LDAIM &03 MOS52 0321 ECB4 v7A MOS52 0323 ECB8 9D 08 08 STAAX EPERD ;put note in the release phase of the envelope MOS52 0321 ECB4 v7A MOS52 0324 ECBB ELDDN MOS52 0321 ECB4 v7A MOS52 0325 ECBB BD CF 02 LDAAX FLUSH -- MOS52 0326 ECBE F0 13 BEQ NOFL ;[no flush has been flagged] MOS52 0326 ECBE v6C MOS52 0327 ECC0 A9 00 LDAIM ZERO MOS52 0326 ECBE v6C MOS52 0328 ECC2 9D CF 02 STAAX FLUSH ;clear the flush flag MOS52 0326 ECBE v6C MOS52 0329 ECC5 [ MOS125 = &FF MOS52 0326 ECBE v6C MOS52 0344 ECC5 | MOS52 0326 ECBE v6C MOS52 0345 ECC5 A0 03 LDYIM &03 ;the following clears all wait variables MOS52 0326 ECBE v6C MOS52 0346 ECC7 SWTLOP MOS52 0326 ECBE v6C MOS52 0347 ECC7 99 2C 08 STAAY WAIT +&04 MOS52 0326 ECBE v6C MOS52 0348 ECCA 88 DEY MOS52 0326 ECBE v6C MOS52 0349 ECCB 10 FA BPL SWTLOP MOS52 0326 ECBE v6C MOS52 0350 ECCD 9D 18 08 STAAX DUR ;set duration to zero => note finished MOS52 0326 ECBE v6C MOS52 0351 ECD0 8C 38 08 STY NOWAT ;reset chord building status MOS52 0326 ECBE v6C MOS52 0352 ECD3 NOFL ;A=0 MOS52 0326 ECBE v6C MOS52 0353 ECD3 DD 28 08 CMPAX WAIT ;check it channel waiting for chord -- MOS52 0354 ECD6 F0 43 BEQ NOTWT MOS52 0354 ECD6 v3C MOS52 0355 ECD8 CD 3B 08 CMP WATGO ;check if chord now ready to play MOS52 0354 ECD6 v3C MOS52 0356 ECDB F0 34 BEQ NOTGO ;[chord not ready yet] else C=0 MOS52 0354 ECD6 v3C MOS52 0357 ECDD ] MOS52 0354 ECD6 v3C MOS52 0358 ECDD 9D 28 08 STAAX WAIT ;clear waiting for chord status MOS52 0354 ECD6 v3C MOS52 0359 ECE0 NNWAT MOS52 0354 ECD6 v3C MOS52 0360 ECE0 4C D4 ED JMP STRNT ;start playing note MOS52 0354 ECD6 v3C MOS52 0361 ECE3 SCRST ;reset sound channel X MOS52 0354 ECD6 v3C MOS52 0362 ECE3 20 5E EB JSR MINATN MOS52 0354 ECD6 v3C MOS52 0363 ECE6 98 TYA MOS52 0354 ECD6 v3C MOS52 0364 ECE7 9D 18 08 STAAX DUR MOS52 0354 ECD6 v3C MOS52 0365 ECEA 9D CF 02 STAAX FLUSH MOS52 0354 ECD6 v3C MOS52 0366 ECED 9D 00 08 STAAX ACTIV MOS52 0354 ECD6 v3C MOS52 0367 ECF0 ; MOS52 0354 ECD6 v3C MOS52 0368 ECF0 ;clear wait periods to zero MOS52 0354 ECD6 v3C MOS52 0369 ECF0 ; MOS52 0354 ECD6 v3C MOS52 0370 ECF0 A0 03 LDYIM &03 MOS52 0354 ECD6 v3C MOS52 0371 ECF2 CWP MOS52 0354 ECD6 v3C MOS52 0372 ECF2 99 2C 08 STAAY WAIT+&04 MOS52 0354 ECD6 v3C MOS52 0373 ECF5 88 DEY MOS52 0354 ECD6 v3C MOS52 0374 ECF6 10 FA BPL CWP ;[more wait periods to clear] MOS52 0354 ECD6 v3C MOS52 0375 ECF8 ; Y=$FF MOS52 0354 ECD6 v3C MOS52 0376 ECF8 ; MI true MOS52 0354 ECD6 v3C MOS52 0377 ECF8 ; MOS52 0354 ECD6 v3C MOS52 0378 ECF8 ; indicate no channels waiting MOS52 0354 ECD6 v3C MOS52 0379 ECF8 ; MOS52 0354 ECD6 v3C MOS52 0380 ECF8 8C 38 08 STY NOWAT MOS52 0354 ECD6 v3C MOS52 0381 ECFB ; MOS52 0354 ECD6 v3C MOS52 0382 ECFB 30 49 BMI FCNVRT ;[ALWAYS JUMP, set period of chip to zero] MOS52 0382 ECFB v36 MOS52 0383 ECFD MOS52 0382 ECFB v36 MOS52 0384 ECFD MOS52 0382 ECFB v36 MOS52 0385 ECFD NGONG MOS52 0382 ECFB v36 MOS52 0386 ECFD 08 PHP MOS52 0382 ECFB v36 MOS52 0387 ECFE 78 SEI MOS52 0382 ECFB v36 MOS52 0388 ECFF BD 08 08 LDAAX EPERD ;while irq disabled check if active can be cleared MOS52 0382 ECFB v36 MOS52 0389 ED02 C9 04 CMPIM &04 ;if envelope period=4 then note finished MOS52 0382 ECFB v36 MOS52 0390 ED04 D0 0A BNE NOGO2 ;[note not yet released] MOS52 0382 ECFB v36 MOS52 0391 ED06 20 BD E4 JSR EXAM ;check for recent arrival of note MOS52 0382 ECFB v36 MOS52 0392 ED09 90 05 BCC NOGO2 ;queue no longer empty MOS52 0382 ECFB v36 MOS52 0393 ED0B A9 00 LDAIM ZERO MOS52 0382 ECFB v36 MOS52 0394 ED0D 9D 00 08 STAAX ACTIV ;set channel as inactive MOS52 0382 ECFB v36 MOS52 0395 ED10 NOGO2 MOS52 0382 ECFB v36 MOS52 0396 ED10 28 PLP MOS52 0382 ECFB v36 MOS52 0397 ED11 NOTGO MOS52 0382 ECFB v36 MOS52 0398 ED11 BC 20 08 LDYAX ENVLP MOS52 0382 ECFB v36 MOS52 0399 ED14 [ MOS125 = &FF MOS52 0382 ECFB v36 MOS52 0401 ED14 | MOS52 0382 ECFB v36 MOS52 0402 ED14 C8 INY MOS52 0382 ECFB v36 MOS52 0403 ED15 ] MOS52 0382 ECFB v36 MOS52 0404 ED15 D0 03 BNE PROG MOS52 0382 ECFB v36 MOS52 0405 ED17 20 5E EB JSR MINATN ;update attenuation of box envelopes MOS52 0382 ECFB v36 MOS52 0406 ED1A PROG MOS52 0382 ECFB v36 MOS52 0407 ED1A PRTS ;rts pointer MOS52 0382 ECFB v36 MOS52 0408 ED1A 60 RTS MOS52 0382 ECFB v36 MOS52 0409 ED1B MOS52 0382 ECFB v36 MOS52 0410 ED1B MOS52 0382 ECFB v36 MOS52 0411 ED1B NOTWT MOS52 0382 ECFB v36 MOS52 0412 ED1B 20 BD E4 JSR EXAM ;examine byte at head of queue MOS52 0382 ECFB v36 MOS52 0413 ED1E B0 DD BCS NGONG ;[queue empty] MOS52 0382 ECFB v36 MOS52 0414 ED20 29 03 ANDIM &03 MOS52 0382 ECFB v36 MOS52 0415 ED22 F0 BC BEQ NNWAT ;[no chord commands for next note] MOS52 0382 ECFB v36 MOS52 0416 ED24 AD 38 08 LDA NOWAT MOS52 0382 ECFB v36 MOS52 0417 ED27 F0 15 BEQ SRTS ;[full chord already accepted,ignore this channel for now] MOS52 0382 ECFB v36 MOS52 0418 ED29 FE 28 08 INCAX WAIT ;set waiting flag MOS52 0382 ECFB v36 MOS52 0419 ED2C 2C 38 08 BIT NOWAT ;check for chord being built MOS52 MOS52 MOS52 MOS52 Acorn macro assembler Page 110 MOS52 MOS52 Sound generator MOS52 MOS52 0382 ECFB v36 MOS52 0420 ED2F 10 0A BPL SMCRD ;chord already being built MOS52 0382 ECFB v36 MOS52 0421 ED31 20 BD E4 JSR EXAM ;getheader byte again MOS52 0382 ECFB v36 MOS52 0422 ED34 29 03 ANDIM &03 ;select chord bits MOS52 0382 ECFB v36 MOS52 0423 ED36 8D 38 08 STA NOWAT ;new chord so set number of other channels required MOS52 0382 ECFB v36 MOS52 0424 ED39 10 03 BPL LNOTGO MOS52 0382 ECFB v36 MOS52 0425 ED3B SMCRD MOS52 0382 ECFB v36 MOS52 0426 ED3B CE 38 08 DEC NOWAT ;decrement the number of channels still required for chord MOS52 0382 ECFB v36 MOS52 0427 ED3E SRTS ;must point to RTS command MOS52 0382 ECFB v36 MOS52 0428 ED3E LNOTGO MOS52 0382 ECFB v36 MOS52 0429 ED3E 4C 11 ED JMP NOTGO MOS52 0382 ECFB v36 MOS52 0430 ED41 MOS52 0382 ECFB v36 MOS52 0431 ED41 MOS52 0382 ECFB v36 MOS52 0432 ED41 ;routine to convert note to period MOS52 0382 ECFB v36 MOS52 0433 ED41 ;and output to the chip MOS52 0382 ECFB v36 MOS52 0434 ED41 CNVRT MOS52 0382 ECFB v36 MOS52 0435 ED41 DD 2C 08 CMPAX OLDNTE MOS52 0382 ECFB v36 MOS52 0436 ED44 F0 D4 BEQ PRTS ;no need to update chip MOS52 0382 ECFB v36 MOS52 0437 ED46 FCNVRT ;force note output MOS52 0382 ECFB v36 MOS52 0438 ED46 9D 2C 08 STAAX OLDNTE -- MOS52 0439 ED49 E0 04 CPXIM &04 ;check if noise channel -- MOS52 0440 ED4B D0 08 BNE TONE MOS52 0440 ED4B v77 MOS52 0441 ED4D 29 0F ANDIM &0F ;noise input is only 4 bits MOS52 0440 ED4B v77 MOS52 0442 ED4F 1D 94 EB ORAAX CHAN ;add channel information MOS52 0440 ED4B v77 MOS52 0443 ED52 08 PHP ;push P (will immediately be pulled) MOS52 0440 ED4B v77 MOS52 0444 ED53 [ MOS125 = &FF MOS52 0440 ED4B v77 MOS52 0446 ED53 | MOS52 0440 ED4B v77 MOS52 0447 ED53 B0 7C BCS CDONE ;output and return MOS52 0447 ED53 v03 MOS52 0448 ED55 ] MOS52 0447 ED53 v03 MOS52 0449 ED55 TONE ;tone channel MOS52 0447 ED53 v03 MOS52 0450 ED55 48 PHA MOS52 0447 ED53 v03 MOS52 0451 ED56 29 03 ANDIM &03 MOS52 0447 ED53 v03 MOS52 0452 ED58 8D 3C 08 STA FRACT ;low 2 bits give fraction of semitone MOS52 0447 ED53 v03 MOS52 0453 ED5B [ MOS125 = &FF MOS52 0447 ED53 v03 MOS52 0465 ED5B | MOS52 0447 ED53 v03 MOS52 0466 ED5B 68 PLA MOS52 0447 ED53 v03 MOS52 0467 ED5C 4A LSRA MOS52 0447 ED53 v03 MOS52 0468 ED5D 4A LSRA MOS52 0447 ED53 v03 MOS52 0469 ED5E 8D 3D 08 STA PRDL MOS52 0447 ED53 v03 MOS52 0470 ED61 OCTL MOS52 0447 ED53 v03 MOS52 0471 ED61 C9 0C CMPIM &0C ;check if note > one octave MOS52 0447 ED53 v03 MOS52 0472 ED63 90 07 BCC ENDOL MOS52 0447 ED53 v03 MOS52 0473 ED65 E9 0C SBCIM &0C MOS52 0447 ED53 v03 MOS52 0474 ED67 6E 3D 08 ROR PRDL ;use PRDL as octave counter for division MOS52 0447 ED53 v03 MOS52 0475 ED6A 30 F5 BMI OCTL ;branch always taken MOS52 0447 ED53 v03 MOS52 0476 ED6C ] MOS52 0447 ED53 v03 MOS52 0477 ED6C ENDOL MOS52 0447 ED53 v03 MOS52 0478 ED6C A8 TAY MOS52 0447 ED53 v03 MOS52 0479 ED6D AD 3D 08 LDA PRDL ;number octaves up MOS52 0447 ED53 v03 MOS52 0480 ED70 48 PHA MOS52 0447 ED53 v03 MOS52 0481 ED71 B9 32 EE LDAAY NTABL ;low period from table MOS52 0447 ED53 v03 MOS52 0482 ED74 8D 3D 08 STA PRDL MOS52 0447 ED53 v03 MOS52 0483 ED77 B9 3E EE LDAAY NTABH ;high period for lowest octave MOS52 0447 ED53 v03 MOS52 0484 ED7A 48 PHA MOS52 0447 ED53 v03 MOS52 0485 ED7B 29 03 ANDIM &03 MOS52 0447 ED53 v03 MOS52 0486 ED7D 8D 3E 08 STA PRDH MOS52 0447 ED53 v03 MOS52 0487 ED80 68 PLA ;get semitone difference from top bits of NTABH MOS52 0447 ED53 v03 MOS52 0488 ED81 4A LSRA MOS52 0447 ED53 v03 MOS52 0489 ED82 4A LSRA MOS52 0447 ED53 v03 MOS52 0490 ED83 4A LSRA MOS52 0447 ED53 v03 MOS52 0491 ED84 4A LSRA MOS52 0447 ED53 v03 MOS52 0492 ED85 8D 3F 08 STA NOTDIF MOS52 0447 ED53 v03 MOS52 0493 ED88 AD 3D 08 LDA PRDL MOS52 0447 ED53 v03 MOS52 0494 ED8B AC 3C 08 LDY FRACT ;number of times NOTDIF has to be added MOS52 0447 ED53 v03 MOS52 0495 ED8E F0 0C BEQ INTRPE ;[true semitone] MOS52 0447 ED53 v03 MOS52 0496 ED90 INTRPL MOS52 0447 ED53 v03 MOS52 0497 ED90 ;following subtracts NOTDIF from period MOS52 0447 ED53 v03 MOS52 0498 ED90 38 SEC MOS52 0447 ED53 v03 MOS52 0499 ED91 ED 3F 08 SBC NOTDIF MOS52 0447 ED53 v03 MOS52 0500 ED94 B0 03 BCS INTRPO MOS52 0447 ED53 v03 MOS52 0501 ED96 CE 3E 08 DEC PRDH MOS52 0447 ED53 v03 MOS52 0502 ED99 INTRPO MOS52 0447 ED53 v03 MOS52 0503 ED99 88 DEY MOS52 0447 ED53 v03 MOS52 0504 ED9A D0 F4 BNE INTRPL ;[add another fraction] MOS52 0447 ED53 v03 MOS52 0505 ED9C INTRPE MOS52 0447 ED53 v03 MOS52 0506 ED9C 8D 3D 08 STA PRDL MOS52 0447 ED53 v03 MOS52 0507 ED9F 68 PLA MOS52 0447 ED53 v03 MOS52 0508 EDA0 [ MOS125 = &FF MOS52 0447 ED53 v03 MOS52 0516 EDA0 | MOS52 0447 ED53 v03 MOS52 0517 EDA0 10 09 BPL ODONE ;if lowest octave then no shifts MOS52 0447 ED53 v03 MOS52 0518 EDA2 SSHIFT MOS52 0447 ED53 v03 MOS52 0519 EDA2 4E 3E 08 LSR PRDH ;divide period by 2 MOS52 0447 ED53 v03 MOS52 0520 EDA5 6E 3D 08 ROR PRDL MOS52 0447 ED53 v03 MOS52 0521 EDA8 0A ASLA MOS52 0447 ED53 v03 MOS52 0522 EDA9 30 F7 BMI SSHIFT ;[up another octave] MOS52 0447 ED53 v03 MOS52 0523 EDAB ] MOS52 0447 ED53 v03 MOS52 0524 EDAB ODONE MOS52 0447 ED53 v03 MOS52 0525 EDAB AD 3D 08 LDA PRDL ;extract low four bits of period MOS52 0447 ED53 v03 MOS52 0526 EDAE 18 CLC MOS52 0447 ED53 v03 MOS52 0527 EDAF 7D 3D C4 ADCAX SCHOFF MOS52 0447 ED53 v03 MOS52 0528 EDB2 8D 3D 08 STA PRDL MOS52 0447 ED53 v03 MOS52 0529 EDB5 90 03 BCC NOFOV MOS52 0447 ED53 v03 MOS52 0530 EDB7 EE 3E 08 INC PRDH MOS52 0447 ED53 v03 MOS52 0531 EDBA NOFOV MOS52 0447 ED53 v03 MOS52 0532 EDBA 29 0F ANDIM &0F MOS52 0447 ED53 v03 MOS52 0533 EDBC 1D 94 EB ORAAX CHAN ;add channel address MOS52 0447 ED53 v03 MOS52 0534 EDBF 08 PHP MOS52 0447 ED53 v03 MOS52 0535 EDC0 78 SEI ;make sure another request does not mess up sequence MOS52 0447 ED53 v03 MOS52 0536 EDC1 20 79 EB JSR SEND ;output to chip MOS52 0447 ED53 v03 MOS52 0537 EDC4 AD 3D 08 LDA PRDL ;get next 6 bits of period MOS52 0447 ED53 v03 MOS52 0538 EDC7 4E 3E 08 LSR PRDH MOS52 0447 ED53 v03 MOS52 0539 EDCA 6A RORA MOS52 0447 ED53 v03 MOS52 0540 EDCB 4E 3E 08 LSR PRDH MOS52 0447 ED53 v03 MOS52 0541 EDCE 6A RORA MOS52 0447 ED53 v03 MOS52 0542 EDCF 4A LSRA ;transfer to low 6 bits of Acc MOS52 0447 ED53 v03 MOS52 0543 EDD0 4A LSRA MOS52 0447 ED53 v03 MOS52 0544 EDD1 CDONE MOS52 0447 ED53 v03 MOS52 0545 EDD1 4C 7A EB JMP SENDX ;output period to chip -- MOS52 0546 EDD4 ;routine to start note at head of queue -- MOS52 0547 EDD4 STRNT -- MOS52 0548 EDD4 08 PHP ;start indivisible section to stop new -- MOS52 0549 EDD5 78 SEI ;note being added to queue half way through extraction -- MOS52 0550 EDD6 20 C2 E4 JSR REMOV ;get byte at head queue -- MOS52 0551 EDD9 [ MOS125 = &FF -- MOS52 0558 EDD9 | -- MOS52 0559 EDD9 A8 TAY ;save byte at head queue -- MOS52 0560 EDDA 29 04 ANDIM &04 ;extract 'continue' bit -- MOS52 0561 EDDC F0 12 BEQ NOCONT ;[not continue] MOS52 0561 EDDC v6D MOS52 0562 EDDE BC 20 08 LDYAX ENVLP ;must check for continue to auto envelope MOS52 0561 EDDC v6D MOS52 0563 EDE1 C8 INY MOS52 0561 EDDC v6D MOS52 0564 EDE2 ] MOS52 0561 EDDC v6D MOS52 0565 EDE2 D0 03 BNE SCON1 MOS52 MOS52 MOS52 MOS52 Acorn macro assembler Page 111 MOS52 MOS52 Sound generator MOS52 MOS52 0561 EDDC v6D MOS52 0566 EDE4 20 5E EB JSR MINATN ;update attenuation MOS52 0561 EDDC v6D MOS52 0567 EDE7 SCON1 MOS52 0561 EDDC v6D MOS52 0568 EDE7 20 C2 E4 JSR REMOV ;throw away note MOS52 0561 EDDC v6D MOS52 0569 EDEA 20 C2 E4 JSR REMOV ;get duration MOS52 0561 EDDC v6D MOS52 0570 EDED 28 PLP ;end of indivisible section MOS52 0561 EDDC v6D MOS52 0571 EDEE [ MOS125 = &FF MOS52 0561 EDDC v6D MOS52 0575 EDEE | MOS52 0561 EDDC v6D MOS52 0576 EDEE 90 3E BCC DODUR ;C=0 from NNWAT->STRNT; always branch to update duration MOS52 0576 EDEE v41 MOS52 0577 EDF0 NOCONT MOS52 0576 EDEE v41 MOS52 0578 EDF0 98 TYA ;restore header byte MOS52 0576 EDEE v41 MOS52 0579 EDF1 ] MOS52 0576 EDEE v41 MOS52 0580 EDF1 29 F8 ANDIM &F8 ;extract 5 envelope bits MOS52 0576 EDEE v41 MOS52 0581 EDF3 0A ASLA ;programmable envelope select bit >carry MOS52 0576 EDEE v41 MOS52 0582 EDF4 90 0A BCC PENV ;[programmed envelope] MOS52 0576 EDEE v41 MOS52 0583 EDF6 [ MOS125 = &FF MOS52 0576 EDEE v41 MOS52 0588 EDF6 | MOS52 0576 EDEE v41 MOS52 0589 EDF6 ; in: ~b3 ~b2 ~b1 ~b0 0 0 0 x MOS52 0576 EDEE v41 MOS52 0590 EDF6 ;out: ~b3 ~b3 b2 b1 b0 1 1 1 MOS52 0576 EDEE v41 MOS52 0591 EDF6 C9 80 CMPIM &80 ;convert box envelope to signed amplitude MOS52 0576 EDEE v41 MOS52 0592 EDF8 6A RORA MOS52 0576 EDEE v41 MOS52 0593 EDF9 49 3F EORIM &3F MOS52 0576 EDEE v41 MOS52 0594 EDFB ] MOS52 0576 EDEE v41 MOS52 0595 EDFB 20 65 EB JSR UPATN MOS52 0576 EDEE v41 MOS52 0596 EDFE A9 FF LDAIM &FF ;flag box envelope by setting top bit of ENVLP MOS52 0576 EDEE v41 MOS52 0597 EE00 PENV MOS52 0576 EDEE v41 MOS52 0598 EE00 9D 20 08 STAAX ENVLP ;envelope pointer,envelope*16 MOS52 0576 EDEE v41 MOS52 0599 EE03 A9 05 LDAIM &05 ;start timing first 1/20th second from now MOS52 0576 EDEE v41 MOS52 0600 EE05 9D 1C 08 STAAX DRDIV MOS52 0576 EDEE v41 MOS52 0601 EE08 A9 01 LDAIM &01 MOS52 0576 EDEE v41 MOS52 0602 EE0A 9D 24 08 STAAX SCONT ;first envelope update next tick MOS52 0576 EDEE v41 MOS52 0603 EE0D [ MOS125 = &FF MOS52 0576 EDEE v41 MOS52 0605 EE0D | MOS52 0576 EDEE v41 MOS52 0606 EE0D 4A LSRA MOS52 0576 EDEE v41 MOS52 0607 EE0E ] MOS52 0576 EDEE v41 MOS52 0608 EE0E 9D 14 08 STAAX NCONT MOS52 0576 EDEE v41 MOS52 0609 EE11 9D 08 08 STAAX EPERD ;first amplittude envelope MOS52 0576 EDEE v41 MOS52 0610 EE14 9D 30 08 STAAX NTADD ;note add envelope starts at 0 MOS52 0576 EDEE v41 MOS52 0611 EE17 A9 FF LDAIM &FF MOS52 0576 EDEE v41 MOS52 0612 EE19 9D 10 08 STAAX NPERD ;set frequency envelope to -1,incremented on first tick MOS52 0576 EDEE v41 MOS52 0613 EE1C 20 C2 E4 JSR REMOV ;extract note byte from queue MOS52 0576 EDEE v41 MOS52 0614 EE1F 9D 0C 08 STAAX SNOTE ;store note MOS52 0576 EDEE v41 MOS52 0615 EE22 20 C2 E4 JSR REMOV ;Remove duration MOS52 0576 EDEE v41 MOS52 0616 EE25 28 PLP ;end of indivisible section MOS52 0576 EDEE v41 MOS52 0617 EE26 48 PHA ;remember duration MOS52 0576 EDEE v41 MOS52 0618 EE27 BD 0C 08 LDAAX SNOTE MOS52 0576 EDEE v41 MOS52 0619 EE2A 20 41 ED JSR CNVRT ;convert to period and output MOS52 0576 EDEE v41 MOS52 0620 EE2D 68 PLA ;get duration back MOS52 0576 EDEE v41 MOS52 0621 EE2E DODUR MOS52 0576 EDEE v41 MOS52 0622 EE2E 9D 18 08 STAAX DUR ;set up duration -- MOS52 0623 EE31 60 RTS -- MOS52 0624 EE32 [ MOS125 = &FF -- MOS52 0625 EE32 | -- MOS52 0626 EE32 ;NB swapping JSR CNVRT and STAAX DUR (to save PHA/PLA) -- MOS52 0627 EE32 ;would cause an interrupt occurring during CNVRT to decrement -- MOS52 0628 EE32 ;the new count instead of the old. Preserving current order. -- MOS52 0629 EE32 ] -- MOS52 0630 EE32 -- MOS52 0631 EE32 -- MOS52 0632 EE32 NTABL ;lookup table for low 8 bit of period -- MOS52 0633 EE32 F0 = &F0 -- MOS52 0634 EE33 B7 = &B7 -- MOS52 0635 EE34 82 = &82 -- MOS52 0636 EE35 4F = &4F -- MOS52 0637 EE36 20 = &20 -- MOS52 0638 EE37 F3 = &F3 -- MOS52 0639 EE38 C8 = &C8 -- MOS52 0640 EE39 A0 = &A0 -- MOS52 0641 EE3A 7B = &7B -- MOS52 0642 EE3B 57 = &57 -- MOS52 0643 EE3C 35 = &35 -- MOS52 0644 EE3D 16 = &16 -- MOS52 0645 EE3E NTABH ;lookup table for high 2 bits of period -- MOS52 0646 EE3E E7 = &E7 ;and 6 bits of note difference being the difference -- MOS52 0647 EE3F D7 = &D7 ;between this and the next note -- MOS52 0648 EE40 CB = &CB -- MOS52 0649 EE41 C3 = &C3 -- MOS52 0650 EE42 B7 = &B7 -- MOS52 0651 EE43 AA = &AA -- MOS52 0652 EE44 A2 = &A2 -- MOS52 0653 EE45 9A = &9A -- MOS52 0654 EE46 92 = &92 -- MOS52 0655 EE47 8A = &8A -- MOS52 0656 EE48 82 = &82 -- MOS52 0657 EE49 7A = &7A -- MOS52 0658 EE4A -- MOS52 0659 EE4A -- MOS52 0660 EE4A LNK MOS54 -- MOS54 0001 EE4A ; MOS54 -- MOS54 0002 EE4A TTL MOS54 SPEECH DRIVING -- MOS54 0003 EE4A OPT MOS54 MOS54 MOS54 MOS54 MOS54 Acorn macro assembler Page 112 MOS54 MOS54 SPEECH DRIVING MOS54 -- MOS54 0004 EE4A ;(c) 1981 ACORN Computers Limited -- MOS54 0005 EE4A ;BBC Microcomputer Machine Operating System (MOS) -- MOS54 0006 EE4A ;Change record: -- MOS54 0007 EE4A ;004 07-Nov-81 PBM Prototype version -- MOS54 0008 EE4A ;Author(s): -- MOS54 0009 EE4A ;Paul Bond -- MOS54 0010 EE4A -- MOS54 0011 EE4A -- MOS54 0012 EE4A SRINIT ;initialise SEROM environment for CFS -- MOS54 0013 EE4A [ NOSP = &00 -- MOS54 0016 EE4A | -- MOS54 0017 EE4A A9 EF LDAIM &F0-&01 ;$01 adjusts for future INC SEROM -- MOS54 0018 EE4C ] -- MOS54 0019 EE4C ; SEROM will cycle $F0 ... $FF ... $00 ... $10 (max) -- MOS54 0020 EE4C 85 F5 STA SEROM -- MOS54 0021 EE4E [ MOS125 = &FF -- MOS54 0023 EE4E ] -- MOS54 0024 EE4E -- MOS54 0025 EE4E -- MOS54 0026 EE4E SRNEXT ;move on to next SEROM -- MOS54 0027 EE4E ; -- MOS54 0028 EE4E ; scans phrase ROM first, then paged ROM -- MOS54 0029 EE4E ; -- MOS54 0030 EE4E SPCPYF ;entry point from failed copyright message test -- MOS54 0031 EE4E A2 0D LDXIM SVISFS MOS54 0071 EE6D ^5F MOS54 0032 EE50 E6 F5 INC SEROM MOS54 0071 EE6D ^5F MOS54 0033 EE52 A4 F5 LDY SEROM MOS54 0071 EE6D ^5F MOS54 0034 EE54 [ NOSP = &00 MOS54 0071 EE6D ^5F MOS54 0039 EE54 | MOS54 0071 EE6D ^5F MOS54 0040 EE54 [ MOS125 = &7F MOS54 0071 EE6D ^5F MOS54 0041 EE54 30 05 BMI SPPH ;[process PHROM, V not altered] MOS54 0071 EE6D ^5F MOS54 0042 EE56 C0 10 CPYIM NROM ;if we get here with SEROM >= NROM, MOS54 0071 EE6D ^5F MOS54 0043 EE58 90 39 BCC SPSV ;then no paged ROM is to respond MOS54 0043 EE58 v46 MOS54 0044 EE5A 60 RTS ;so exit C=1, call unclaimed MOS54 0043 EE58 v46 MOS54 0045 EE5B SPPH MOS54 0043 EE58 v46 MOS54 0046 EE5B | MOS54 0043 EE58 v46 MOS54 0048 EE5B ] MOS54 0043 EE58 v46 MOS54 0049 EE5B ; MOS54 0043 EE58 v46 MOS54 0050 EE5B ; process PHROM, V not altered MOS54 0043 EE58 v46 MOS54 0051 EE5B ; MOS54 0043 EE58 v46 MOS54 0052 EE5B ; no need to check for speech chip present MOS54 0043 EE58 v46 MOS54 0053 EE5B ; reads from chip will not indicate copyright message MOS54 0043 EE58 v46 MOS54 0054 EE5B ; MOS54 0043 EE58 v46 MOS54 0055 EE5B ; check for existence of speech SEROM MOS54 0043 EE58 v46 MOS54 0056 EE5B ; MOS54 0043 EE58 v46 MOS54 0057 EE5B ; set pointer to 1 MOS54 0043 EE58 v46 MOS54 0058 EE5B ; MOS54 0043 EE58 v46 MOS54 0059 EE5B A2 00 LDXIM ZERO MOS54 0043 EE58 v46 MOS54 0060 EE5D 86 F7 STX ROMPTR+&01 MOS54 0043 EE58 v46 MOS54 0061 EE5F E8 INX ;X := 1 MOS54 0043 EE58 v46 MOS54 0062 EE60 86 F6 STX ROMPTR+&00 MOS54 0043 EE58 v46 MOS54 0063 EE62 20 F5 EE JSR SPLOAD ;set address MOS54 0043 EE58 v46 MOS54 0064 EE65 ; MOS54 0043 EE58 v46 MOS54 0065 EE65 ; check for copyright (C) MOS54 0043 EE58 v46 MOS54 0066 EE65 ; MOS54 0043 EE58 v46 MOS54 0067 EE65 A2 03 LDXIM &03 MOS54 0043 EE58 v46 MOS54 0068 EE67 SPCPY ;V not altered MOS54 0043 EE58 v46 MOS54 0069 EE67 20 9C EE JSR RDBYTE ;does not alter X MOS54 0043 EE58 v46 MOS54 0070 EE6A DD 1E F5 CMPAX COPYR MOS54 0043 EE58 v46 MOS54 0071 EE6D D0 DF BNE SPCPYF ;[failed test for copyright message] MOS54 0043 EE58 v46 MOS54 0072 EE6F ; C=1 MOS54 0043 EE58 v46 MOS54 0073 EE6F CA DEX MOS54 0043 EE58 v46 MOS54 0074 EE70 10 F5 BPL SPCPY MOS54 0043 EE58 v46 MOS54 0075 EE72 ; MOS54 0043 EE58 v46 MOS54 0076 EE72 ; C=1 MOS54 0043 EE58 v46 MOS54 0077 EE72 ; MOS54 0043 EE58 v46 MOS54 0078 EE72 ; copyright message is present MOS54 0043 EE58 v46 MOS54 0079 EE72 ; MOS54 0043 EE58 v46 MOS54 0080 EE72 ; we have read 5 bytes so far MOS54 0043 EE58 v46 MOS54 0081 EE72 ; skip more bytes allowing for copyright/title strings MOS54 0043 EE58 v46 MOS54 0082 EE72 ; MOS54 0043 EE58 v46 MOS54 0083 EE72 ; position serial ROM to cassette image data MOS54 0043 EE58 v46 MOS54 0084 EE72 ; (indirect pointer held at offset $3E) MOS54 0043 EE58 v46 MOS54 0085 EE72 ; MOS54 0043 EE58 v46 MOS54 0086 EE72 A9 3E LDAIM &3E MOS54 0043 EE58 v46 MOS54 0087 EE74 85 F6 STA ROMPTR+&00 MOS54 0043 EE58 v46 MOS54 0088 EE76 ; MOS54 0043 EE58 v46 MOS54 0089 EE76 ; C=1 MOS54 0043 EE58 v46 MOS54 0090 EE76 ; MOS54 0043 EE58 v46 MOS54 0091 EE76 SPLIND ;load address indirect, V not altered, returns C=0 MOS54 0043 EE58 v46 MOS54 0092 EE76 20 F5 EE JSR SPLOAD MOS54 0043 EE58 v46 MOS54 0093 EE79 [ TRUE=0 MOS54 0043 EE58 v46 MOS54 0094 EE79 ; perform soft version of read-and-branch MOS54 0043 EE58 v46 MOS54 0095 EE79 ; MOS54 0043 EE58 v46 MOS54 0096 EE79 A2 FF LDXIM &FF MOS54 0043 EE58 v46 MOS54 0097 EE7B RABLP MOS54 0043 EE58 v46 MOS54 0098 EE7B ; read lo byte when X=0, hi byte when X=1 MOS54 0043 EE58 v46 MOS54 0099 EE7B 20 9C EE JSR RDBYTE ;does not corrupt X MOS54 0043 EE58 v46 MOS54 0100 EE7E ; MOS54 0043 EE58 v46 MOS54 0101 EE7E [ MOS125 = &FF MOS54 0043 EE58 v46 MOS54 0108 EE7E | MOS54 0043 EE58 v46 MOS54 0109 EE7E 38 SEC ;C undefined if entered at SPLIND MOS54 0043 EE58 v46 MOS54 0110 EE7F 2A ROLA MOS54 0043 EE58 v46 MOS54 0111 EE80 RABLO ;reverse bits in A into ROMPTR+(0/1) MOS54 0043 EE58 v46 MOS54 0112 EE80 76 F7 RORAX ROMPTR+&01 MOS54 0043 EE58 v46 MOS54 0113 EE82 0A ASLA MOS54 0043 EE58 v46 MOS54 0114 EE83 D0 FB BNE RABLO ;[process 8 bits] MOS54 0043 EE58 v46 MOS54 0115 EE85 ; C=1, Y clobbered in SPLOAD->SPL->SPL1 MOS54 0043 EE58 v46 MOS54 0116 EE85 ] MOS54 0043 EE58 v46 MOS54 0117 EE85 ; MOS54 0043 EE58 v46 MOS54 0118 EE85 E8 INX MOS54 0043 EE58 v46 MOS54 0119 EE86 F0 F3 BEQ RABLP ;repeat loop once more with X=0 MOS54 0043 EE58 v46 MOS54 0120 EE88 ; MOS54 0043 EE58 v46 MOS54 0121 EE88 18 CLC ;indicate next successful MOS54 0043 EE58 v46 MOS54 0122 EE89 90 6A BCC SPLOAD ;[ALWAYS jump, set indirected address AND return] MOS54 0122 EE89 v15 MOS54 0123 EE8B | MOS54 0122 EE89 v15 MOS54 0136 EE8B ] MOS54 0122 EE89 v15 MOS54 0137 EE8B ] MOS54 0122 EE89 v15 MOS54 0138 EE8B MOS54 0122 EE89 v15 MOS54 0139 EE8B MOS54 0122 EE89 v15 MOS54 0140 EE8B RDSPCH ;read byte from SEROM MOS54 0122 EE89 v15 MOS54 0141 EE8B A2 0E LDXIM SVRSFS MOS54 0122 EE89 v15 MOS54 0142 EE8D [ NOSP = &00 MOS54 0122 EE89 v15 MOS54 0144 EE8D | MOS54 0122 EE89 v15 MOS54 0145 EE8D A4 F5 LDY SEROM MOS54 0122 EE89 v15 MOS54 0146 EE8F 30 0B BMI RDBYTE ;[reading from PHROM, V not altered] MOS54 0122 EE89 v15 MOS54 0147 EE91 ] MOS54 0122 EE89 v15 MOS54 0148 EE91 ; MOS54 0122 EE89 v15 MOS54 0149 EE91 ; reading from paged ROM MOS54 0122 EE89 v15 MOS54 0150 EE91 ; MOS54 0122 EE89 v15 MOS54 0151 EE91 A0 FF LDYIM 0-MCVER ;enter paged ROM with M/C indicator in Y MOS54 MOS54 MOS54 MOS54 Acorn macro assembler Page 113 MOS54 MOS54 SPEECH DRIVING MOS54 MOS54 0122 EE89 v15 MOS54 0152 EE93 ; MOS54 0122 EE89 v15 MOS54 0153 EE93 SPSV ;used by read byte routine, V not altered MOS54 0122 EE89 v15 MOS54 0154 EE93 08 PHP MOS54 0122 EE89 v15 MOS54 0155 EE94 20 6C F1 JSR SVOP ;search for paged SEROM (N.B. SVOPSP) MOS54 0122 EE89 v15 MOS54 0156 EE97 ; MOS54 0122 EE89 v15 MOS54 0157 EE97 28 PLP ;restore V-flag MOS54 0122 EE89 v15 MOS54 0158 EE98 C9 01 CMPIM &01 ;claimed => C=0, not claimed => C=1 MOS54 0122 EE89 v15 MOS54 0159 EE9A 98 TYA ;A := read character (useful for read byte routine only) MOS54 0122 EE89 v15 MOS54 0160 EE9B 60 RTS MOS54 0122 EE89 v15 MOS54 0161 EE9C MOS54 0122 EE89 v15 MOS54 0162 EE9C MOS54 0122 EE89 v15 MOS54 0163 EE9C [ NOSP = &00 MOS54 0122 EE89 v15 MOS54 0166 EE9C | MOS54 0122 EE89 v15 MOS54 0167 EE9C RDBYTE ;read byte from speech ROM, V not altered MOS54 0122 EE89 v15 MOS54 0168 EE9C 08 PHP MOS54 0122 EE89 v15 MOS54 0169 EE9D 78 SEI MOS54 0122 EE89 v15 MOS54 0170 EE9E A0 10 LDYIM SPOPRB ;set to read byte MOS54 0122 EE89 v15 MOS54 0171 EEA0 20 B9 EE JSR WSPECH MOS54 0122 EE89 v15 MOS54 0172 EEA3 ; read byte (following code shorter than JSR RSPECH; PLP; RTS) MOS54 0122 EE89 v15 MOS54 0173 EEA3 A0 00 LDYIM ZERO MOS54 0122 EE89 v15 MOS54 0174 EEA5 F0 17 BEQ SENDSX ;[ALWAYS JUMP, N.B. does PLP & RTS, SEI already active] MOS54 0122 EE89 v15 MOS54 0175 EEA7 MOS54 0122 EE89 v15 MOS54 0176 EEA7 MOS54 0122 EE89 v15 MOS54 0177 EEA7 RSPECH ;read from speech processor, must not corrupt X MOS54 0122 EE89 v15 MOS54 0178 EEA7 A0 00 LDYIM ZERO MOS54 0122 EE89 v15 MOS54 0179 EEA9 F0 11 BEQ SENDSP ;[ALWAYS jump] MOS54 0122 EE89 v15 MOS54 0180 EEAB ; MOS54 0122 EE89 v15 MOS54 0181 EEAB ; MOS54 0122 EE89 v15 MOS54 0182 EEAB SPL ;send load address nibbles MOS54 0122 EE89 v15 MOS54 0183 EEAB ; A = hl MOS54 0122 EE89 v15 MOS54 0184 EEAB ; h is hi-nibble MOS54 0122 EE89 v15 MOS54 0185 EEAB ; l is lo-nibble MOS54 0122 EE89 v15 MOS54 0186 EEAB 48 PHA MOS54 0122 EE89 v15 MOS54 0187 EEAC 20 B4 EE JSR SPL1 ;send lo-nibble MOS54 0122 EE89 v15 MOS54 0188 EEAF 68 PLA MOS54 0122 EE89 v15 MOS54 0189 EEB0 6A RORA MOS54 0122 EE89 v15 MOS54 0190 EEB1 6A RORA MOS54 0122 EE89 v15 MOS54 0191 EEB2 6A RORA MOS54 0122 EE89 v15 MOS54 0192 EEB3 6A RORA MOS54 0122 EE89 v15 MOS54 0193 EEB4 ; MOS54 0122 EE89 v15 MOS54 0194 EEB4 ; send hi-nibble MOS54 0122 EE89 v15 MOS54 0195 EEB4 ; MOS54 0122 EE89 v15 MOS54 0196 EEB4 SPL1 MOS54 0122 EE89 v15 MOS54 0197 EEB4 29 0F ANDIM &0F ;isolate lo-nibble MOS54 0122 EE89 v15 MOS54 0198 EEB6 09 40 ORAIM SPOPLA MOS54 0122 EE89 v15 MOS54 0199 EEB8 ; MOS54 0122 EE89 v15 MOS54 0200 EEB8 A8 TAY ;Y := command MOS54 0122 EE89 v15 MOS54 0201 EEB9 ; MOS54 0122 EE89 v15 MOS54 0202 EEB9 WSPECH ;write to speech processor, must not corrupt X MOS54 0122 EE89 v15 MOS54 0203 EEB9 98 TYA ;A := command MOS54 0122 EE89 v15 MOS54 0204 EEBA A0 01 LDYIM &01 MOS54 0122 EE89 v15 MOS54 0205 EEBC ; MOS54 0122 EE89 v15 MOS54 0206 EEBC SENDSP ;read/write from/to speech processor MOS54 0122 EE89 v15 MOS54 0207 EEBC ; Y=0 => read MOS54 0122 EE89 v15 MOS54 0208 EEBC ; Y=1 => write MOS54 0122 EE89 v15 MOS54 0209 EEBC 08 PHP MOS54 0122 EE89 v15 MOS54 0210 EEBD 78 SEI MOS54 0122 EE89 v15 MOS54 0211 EEBE SENDSX ;entry used by routines which have done a PHP & SEI MOS54 0122 EE89 v15 MOS54 0212 EEBE 2C 7B 02 BIT SPFLAG MOS54 0122 EE89 v15 MOS54 0213 EEC1 10 21 BPL SNDSX0 ;[speech chip not present] MOS54 0122 EE89 v15 MOS54 0214 EEC3 ; MOS54 0122 EE89 v15 MOS54 0215 EEC3 48 PHA ;save command MOS54 0122 EE89 v15 MOS54 0216 EEC4 ; MOS54 0122 EE89 v15 MOS54 0217 EEC4 ; select PA7-0 as inputs/outputs MOS54 0122 EE89 v15 MOS54 0218 EEC4 ; MOS54 0122 EE89 v15 MOS54 0219 EEC4 B9 A2 F0 LDAAY SENDD MOS54 0122 EE89 v15 MOS54 0220 EEC7 8D 43 FE STA DDRAQ MOS54 0122 EE89 v15 MOS54 0221 EECA ; MOS54 0122 EE89 v15 MOS54 0222 EECA ; place command onto data bus MOS54 0122 EE89 v15 MOS54 0223 EECA ; MOS54 0122 EE89 v15 MOS54 0224 EECA 68 PLA ;restore command MOS54 0122 EE89 v15 MOS54 0225 EECB 8D 4F FE STA PAPQ MOS54 0122 EE89 v15 MOS54 0226 EECE ; MOS54 0122 EE89 v15 MOS54 0227 EECE ; speech enable MOS54 0122 EE89 v15 MOS54 0228 EECE ; MOS54 0122 EE89 v15 MOS54 0229 EECE B9 A4 F0 LDAAY SENDS MOS54 0122 EE89 v15 MOS54 0230 EED1 8D 40 FE STA PBQ MOS54 0122 EE89 v15 MOS54 0231 EED4 ; MOS54 0122 EE89 v15 MOS54 0232 EED4 ; wait for speech ready MOS54 0122 EE89 v15 MOS54 0233 EED4 ; MOS54 0122 EE89 v15 MOS54 0234 EED4 SPWAIT MOS54 0122 EE89 v15 MOS54 0235 EED4 2C 40 FE BIT PBQ MOS54 0122 EE89 v15 MOS54 0236 EED7 30 FB BMI SPWAIT ;[not ready] MOS54 0122 EE89 v15 MOS54 0237 EED9 ; MOS54 0122 EE89 v15 MOS54 0238 EED9 ; read possible speech data MOS54 0122 EE89 v15 MOS54 0239 EED9 ; MOS54 0122 EE89 v15 MOS54 0240 EED9 AD 4F FE LDA PAPQ MOS54 0122 EE89 v15 MOS54 0241 EEDC 48 PHA MOS54 0122 EE89 v15 MOS54 0242 EEDD ; MOS54 0122 EE89 v15 MOS54 0243 EEDD ; speech disable MOS54 0122 EE89 v15 MOS54 0244 EEDD ; MOS54 0122 EE89 v15 MOS54 0245 EEDD B9 A6 F0 LDAAY SENDF MOS54 0122 EE89 v15 MOS54 0246 EEE0 8D 40 FE STA PBQ MOS54 0122 EE89 v15 MOS54 0247 EEE3 ; MOS54 0122 EE89 v15 MOS54 0248 EEE3 ; return MOS54 0122 EE89 v15 MOS54 0249 EEE3 ; MOS54 0122 EE89 v15 MOS54 0250 EEE3 68 PLA ;restore speech data (not relevant if write) MOS54 0122 EE89 v15 MOS54 0251 EEE4 ; MOS54 0122 EE89 v15 MOS54 0252 EEE4 SNDSX0 MOS54 0122 EE89 v15 MOS54 0253 EEE4 28 PLP MOS54 0122 EE89 v15 MOS54 0254 EEE5 A8 TAY ;set processor status flags (useful for RSPECH) and Y (for FX calls) MOS54 0122 EE89 v15 MOS54 0255 EEE6 60 RTS MOS54 0122 EE89 v15 MOS54 0256 EEE7 ] MOS54 0122 EE89 v15 MOS54 0257 EEE7 MOS54 0122 EE89 v15 MOS54 0258 EEE7 MOS54 0122 EE89 v15 MOS54 0259 EEE7 SRSKIP ;skip to SEROM pointer indicated by SRPTR MOS54 0122 EE89 v15 MOS54 0260 EEE7 AD CB 03 LDA SRPTR+&00 MOS54 0122 EE89 v15 MOS54 0261 EEEA 85 F6 STA ROMPTR+&00 MOS54 0122 EE89 v15 MOS54 0262 EEEC AD CC 03 LDA SRPTR+&01 MOS54 0122 EE89 v15 MOS54 0263 EEEF 85 F7 STA ROMPTR+&01 MOS54 0122 EE89 v15 MOS54 0264 EEF1 [ NOSP = &00 MOS54 0122 EE89 v15 MOS54 0265 EEF1 | MOS54 0122 EE89 v15 MOS54 0266 EEF1 A5 F5 LDA SEROM MOS54 0122 EE89 v15 MOS54 0267 EEF3 10 1B BPL SRSK0 ;[skipping within paged ROM] MOS54 0122 EE89 v15 MOS54 0268 EEF5 ; MOS54 0122 EE89 v15 MOS54 0269 EEF5 ; skipping within speech SEROM MOS54 0122 EE89 v15 MOS54 0270 EEF5 ; load address from SEROM/ROMPTR MOS54 0122 EE89 v15 MOS54 0271 EEF5 ; MOS54 0122 EE89 v15 MOS54 0272 EEF5 SPLOAD ;load address, must not corrupt V MOS54 0122 EE89 v15 MOS54 0273 EEF5 ; address given in SEROM/ROMPTR MOS54 0122 EE89 v15 MOS54 0274 EEF5 08 PHP MOS54 MOS54 MOS54 MOS54 Acorn macro assembler Page 114 MOS54 MOS54 SPEECH DRIVING MOS54 MOS54 0267 EEF3 v64 MOS54 0275 EEF6 78 SEI ;N.B. uses SPWK1 MOS54 0267 EEF3 v64 MOS54 0276 EEF7 A5 F6 LDA ROMPTR+&00 MOS54 0267 EEF3 v64 MOS54 0277 EEF9 20 AB EE JSR SPL ;send address lo-byte MOS54 0267 EEF3 v64 MOS54 0278 EEFC [ MOS125 = &FF MOS54 0267 EEF3 v64 MOS54 0291 EEFC | MOS54 0267 EEF3 v64 MOS54 0292 EEFC A5 F5 LDA SEROM MOS54 0267 EEF3 v64 MOS54 0293 EEFE 4A LSRA MOS54 0267 EEF3 v64 MOS54 0294 EEFF 6A RORA MOS54 0267 EEF3 v64 MOS54 0295 EF00 48 PHA MOS54 0267 EEF3 v64 MOS54 0296 EF01 6A RORA MOS54 0267 EEF3 v64 MOS54 0297 EF02 45 F7 EOR ROMPTR+&01 MOS54 0267 EEF3 v64 MOS54 0298 EF04 29 C0 ANDIM &C0 MOS54 0267 EEF3 v64 MOS54 0299 EF06 45 F7 EOR ROMPTR+&01 MOS54 0267 EEF3 v64 MOS54 0300 EF08 20 AB EE JSR SPL ;send address hi-byte MOS54 0267 EEF3 v64 MOS54 0301 EF0B 68 PLA MOS54 0267 EEF3 v64 MOS54 0302 EF0C 20 B4 EE JSR SPL1 ;send address hi-nibble MOS54 0267 EEF3 v64 MOS54 0303 EF0F ] MOS54 0267 EEF3 v64 MOS54 0304 EF0F 28 PLP MOS54 0267 EEF3 v64 MOS54 0305 EF10 SRSK0 MOS54 0267 EEF3 v64 MOS54 0306 EF10 ] MOS54 0267 EEF3 v64 MOS54 0307 EF10 60 RTS -- MOS54 0308 EF11 -- MOS54 0309 EF11 -- MOS54 0310 EF11 [ FALSE=0 -- MOS54 0323 EF11 ] -- MOS54 0324 EF11 -- MOS54 0325 EF11 -- MOS54 0326 EF11 < &0001 -- MOS54 0327 EF11 -- MOS54 0328 EF11 -- MOS54 0329 EF11 LNK MOS56 -- MOS56 0001 EF11 -- MOS56 0002 EF11 ; > MOS56 -- MOS56 0003 EF11 TTL MOS56 Keyboard management -- MOS56 0004 EF11 OPT MOS56 MOS56 MOS56 MOS56 MOS56 Acorn macro assembler Page 115 MOS56 MOS56 Keyboard management MOS56 -- MOS56 0005 EF11 ;(c) 1981 ACORN Computers Limited -- MOS56 0006 EF11 ;BBC Microcomputer Machine Operating System (MOS) -- MOS56 0007 EF11 ;Change record: -- MOS56 0008 EF11 ;202 01-May-82 PB Programmable TAB key -- MOS56 0009 EF11 ;.05 16-Nov-81 PB Fix CTRL/SHIFT matrix h/w problem -- MOS56 0010 EF11 ;100 04-Sep-81 PB Remove SHIFT and CTRL debounce -- MOS56 0011 EF11 ;Author(s): -- MOS56 0012 EF11 ;PB Paul Bond -- MOS56 0013 EF11 ;MP Mike Prees -- MOS56 0014 EF11 ; STATUS BYTE USES (KSTAT) -- MOS56 0015 EF11 ; N.B. status byte is NEVER zero -- MOS56 0016 EF11 ; (CAPITALS and SHIFT lock never concurrent) -- MOS56 0017 EF11 ; BIT 0 not used -- MOS56 0018 EF11 ; BIT 1 not used -- MOS56 0019 EF11 ; BIT 2 not used -- MOS56 0020 EF11 ; BIT 3 SHIFT -- MOS56 0021 EF11 ; BIT 4 not CAPITALS lock -- MOS56 0022 EF11 ; BIT 5 not SHIFT lock -- MOS56 0023 EF11 ; BIT 6 CTRL -- MOS56 0024 EF11 ; BIT 7 shift enable (only meaningful if a lock is active) -- MOS56 0025 EF11 ; SEQUENCE OF EVENTS :- -- MOS56 0026 EF11 ; 1. CHECK SHIFT KEY -- MOS56 0027 EF11 ; 2. CHECK CONTROL KEY -- MOS56 0028 EF11 ; 3. PROCESS CURRENT KEY -- MOS56 0029 EF11 ; 4. PROCESS OLD KEY -- MOS56 0030 EF11 ; 5. SCAN KEYS IF REQ'D -- MOS56 0031 EF11 ; 6. ENABLE CA2 IF REQ'D -- MOS56 0032 EF11 -- MOS56 0033 EF11 -- MOS56 0034 EF11 KBDAW -- MOS56 0035 EF11 A2 FF LDXIM &FF ;prepare to enable keyboard timer interrupts -- MOS56 0036 EF13 ; -- MOS56 0037 EF13 ; IF ALL KEYS UP & FORGOTTEN, RESTORE INTERRUPTS -- MOS56 0038 EF13 ; -- MOS56 0039 EF13 A5 EC LDA CKEY -- MOS56 0040 EF15 05 ED ORA OKEY -- MOS56 0041 EF17 D0 06 BNE KBDISX ;[at least one active key, so keep keyboard interrupt disabled] MOS56 0041 EF17 v79 MOS56 0042 EF19 ; MOS56 0041 EF17 v79 MOS56 0043 EF19 ; enable keyboard interrupt MOS56 0041 EF17 v79 MOS56 0044 EF19 ; MOS56 0041 EF17 v79 MOS56 0045 EF19 A9 81 LDAIM &81 MOS56 0041 EF17 v79 MOS56 0046 EF1B 8D 4E FE STA IERQ MOS56 0041 EF17 v79 MOS56 0047 EF1E E8 INX ;X:=0, disable keyboard timer interrupts MOS56 0041 EF17 v79 MOS56 0048 EF1F ; MOS56 0041 EF17 v79 MOS56 0049 EF1F KBDISX MOS56 0041 EF17 v79 MOS56 0050 EF1F 8E 42 02 STX KSEMA ;set keyboard timer interrupt control flag -- MOS56 0051 EF22 ; $00 => disabled, $FF => enabled -- MOS56 0052 EF22 ; -- MOS56 0053 EF22 KBDIS -- MOS56 0054 EF22 08 PHP MOS56 0127 EF65 ^3B MOS56 0055 EF23 ; disable keyboard, coping with CAPITALS & SHIFT lock LEDs MOS56 0127 EF65 ^3B MOS56 0056 EF23 AD 5A 02 LDA KSTAT MOS56 0127 EF65 ^3B MOS56 0057 EF26 ; isolate CAPITALS lock and SHIFT lock states MOS56 0127 EF65 ^3B MOS56 0058 EF26 4A LSRA MOS56 0127 EF65 ^3B MOS56 0059 EF27 29 18 ANDIM &18 MOS56 0127 EF65 ^3B MOS56 0060 EF29 ; update LED1 (CAPITALS lock) MOS56 0127 EF65 ^3B MOS56 0061 EF29 09 06 ORAIM &06 ;use addressable latch output 6 MOS56 0127 EF65 ^3B MOS56 0062 EF2B 8D 40 FE STA PBQ ;store LED1 MOS56 0127 EF65 ^3B MOS56 0063 EF2E ; update LED2 (SHIFT lock) MOS56 0127 EF65 ^3B MOS56 0064 EF2E 4A LSRA ;move state into bit3 MOS56 0127 EF65 ^3B MOS56 0065 EF2F 09 07 ORAIM &07 ;use addressable latch output 7 MOS56 0127 EF65 ^3B MOS56 0066 EF31 8D 40 FE STA PBQ ;store LED2 MOS56 0127 EF65 ^3B MOS56 0067 EF34 ; MOS56 0127 EF65 ^3B MOS56 0068 EF34 [ TRUE=0 MOS56 0127 EF65 ^3B MOS56 0069 EF34 20 34 F1 JSR KALLOX MOS56 0127 EF65 ^3B MOS56 0070 EF37 | MOS56 0127 EF65 ^3B MOS56 0073 EF37 ] MOS56 0127 EF65 ^3B MOS56 0074 EF37 ; MOS56 0127 EF65 ^3B MOS56 0075 EF37 68 PLA MOS56 0127 EF65 ^3B MOS56 0076 EF38 60 RTS MOS56 0127 EF65 ^3B MOS56 0077 EF39 MOS56 0127 EF65 ^3B MOS56 0078 EF39 DEFKEY ;keyboard control effect MOS56 0127 EF65 ^3B MOS56 0079 EF39 ; MOS56 0127 EF65 ^3B MOS56 0080 EF39 ; entered with: MOS56 0127 EF65 ^3B MOS56 0081 EF39 ; C=0, V=0 => SHIFT/CTRL test MOS56 0127 EF65 ^3B MOS56 0082 EF39 ; C=1, V=0 => keyboard scan MOS56 0127 EF65 ^3B MOS56 0083 EF39 ; C=0, V=1 => keyboard interrupt MOS56 0127 EF65 ^3B MOS56 0084 EF39 ; C=1, V=1 => timer interrupt MOS56 0127 EF65 ^3B MOS56 0085 EF39 ; MOS56 0127 EF65 ^3B MOS56 0086 EF39 ; route keyboard entry reason MOS56 0127 EF65 ^3B MOS56 0087 EF39 ; MOS56 0127 EF65 ^3B MOS56 0088 EF39 50 0A BVC KEYV0 ;[V=0] MOS56 0127 EF65 ^3B MOS56 0089 EF3B ; MOS56 0127 EF65 ^3B MOS56 0090 EF3B A9 01 LDAIM &01 MOS56 0127 EF65 ^3B MOS56 0091 EF3D 8D 4E FE STA IERQ MOS56 0127 EF65 ^3B MOS56 0092 EF40 ; MOS56 0127 EF65 ^3B MOS56 0093 EF40 B0 08 BCS KYBD ;[timer interrupt entry] MOS56 0127 EF65 ^3B MOS56 0094 EF42 4C 3C F0 JMP KBDAT ;[keyboard interrupt] MOS56 0127 EF65 ^3B MOS56 0095 EF45 ; MOS56 0127 EF65 ^3B MOS56 0096 EF45 KEYV0 MOS56 0127 EF65 ^3B MOS56 0097 EF45 90 06 BCC TSHIFT ;[SHIFT/CTRL test] MOS56 0127 EF65 ^3B MOS56 0098 EF47 4C D7 F0 JMP SKFMA ;C=1, scan keyboard MOS56 0127 EF65 ^3B MOS56 0099 EF4A MOS56 0127 EF65 ^3B MOS56 0100 EF4A KYBD ;C=1 MOS56 0127 EF65 ^3B MOS56 0101 EF4A ; entered when key(s) active AND timer interrupt MOS56 0127 EF65 ^3B MOS56 0102 EF4A ; MOS56 0127 EF65 ^3B MOS56 0103 EF4A ; ensure no more keyboard timer interrupts MOS56 0127 EF65 ^3B MOS56 0104 EF4A EE 42 02 INC KSEMA ;KSEMA := 0 MOS56 0127 EF65 ^3B MOS56 0105 EF4D ; MOS56 0127 EF65 ^3B MOS56 0106 EF4D TSHIFT ;C=0 MOS56 0127 EF65 ^3B MOS56 0107 EF4D ; entry point used by test shift routine (uses C=1) MOS56 0127 EF65 ^3B MOS56 0108 EF4D ; clear SHIFT and CTRL status MOS56 0127 EF65 ^3B MOS56 0109 EF4D AD 5A 02 LDA KSTAT MOS56 0127 EF65 ^3B MOS56 0110 EF50 29 B7 ANDIM CTLSHI ;N.B. A will accumulate new state MOS56 0127 EF65 ^3B MOS56 0111 EF52 ; set SHIFT key status MOS56 0127 EF65 ^3B MOS56 0112 EF52 A2 00 LDXIM ZERO ;N.B. SHIFT key is at matrix entry 0 MOS56 0127 EF65 ^3B MOS56 0113 EF54 20 57 F0 JSR KC ;get state of SHIFT key MOS56 0127 EF65 ^3B MOS56 0114 EF57 ; N.B. C not corrupted MOS56 0127 EF65 ^3B MOS56 0115 EF57 86 FA STX KTEMP ;save state of SHIFT key for SHIFT/CAPS invert feature MOS56 0127 EF65 ^3B MOS56 0116 EF59 ; KTEMP = 1xxx xxxx => SHIFT MOS56 0127 EF65 ^3B MOS56 0117 EF59 ; KTEMP = 0xxx xxxx => no SHIFT MOS56 0127 EF65 ^3B MOS56 0118 EF59 B8 CLV MOS56 0127 EF65 ^3B MOS56 0119 EF5A 10 05 BPL KYBD1 ;[SHIFT key not active] MOS56 0127 EF65 ^3B MOS56 0120 EF5C ; shift key active and within timer interrupt routine MOS56 0127 EF65 ^3B MOS56 0121 EF5C 2C 49 D9 BIT FFBYT MOS56 0127 EF65 ^3B MOS56 0122 EF5F 09 08 ORAIM SHFT MOS56 0127 EF65 ^3B MOS56 0123 EF61 KYBD1 MOS56 0127 EF65 ^3B MOS56 0124 EF61 ; set CTRL key status MOS56 0127 EF65 ^3B MOS56 0125 EF61 E8 INX ;X := 1, N.B. CTRL key is at matrix entry 1 MOS56 0127 EF65 ^3B MOS56 0126 EF62 20 57 F0 JSR KC ;get state of CTRL key MOS56 0127 EF65 ^3B MOS56 0127 EF65 90 BB BCC KBDIS ;[testing CTRL and SHIFT, MI=>CTRL, V=>SHIFT] MOS56 MOS56 MOS56 MOS56 Acorn macro assembler Page 116 MOS56 MOS56 Keyboard management MOS56 -- MOS56 0128 EF67 10 02 BPL KYBD2 ;[CTRL key not active] MOS56 0128 EF67 v7D MOS56 0129 EF69 ; CTRL key active MOS56 0128 EF67 v7D MOS56 0130 EF69 09 40 ORAIM CTRL MOS56 0128 EF67 v7D MOS56 0131 EF6B KYBD2 ;A has accumulated new keyboard status MOS56 0128 EF67 v7D MOS56 0132 EF6B 8D 5A 02 STA KSTAT ;update keyboard status -- MOS56 0133 EF6E ; evaluate status of the current key -- MOS56 0134 EF6E ; IF IT IS & WAS OPEN, THEN FORGET IT -- MOS56 0135 EF6E ; IF OPEN & WAS CLOSED, MARK AS OPEN -- MOS56 0136 EF6E ; IF CLOSED & WAS OPEN, MARK AS CLOSED -- MOS56 0137 EF6E ; IF CLOSED & WAS CLOSED, THEN DECREMENT -- MOS56 0138 EF6E ; AUTO-REPEAT COUNTER. IF THIS GOES TO -- MOS56 0139 EF6E ; ZERO (IT STARTS AT 1 INITIALLY) THEN -- MOS56 0140 EF6E ; TRANSMIT CHARACTER TO RDCH BUFFER -- MOS56 0141 EF6E ; (UNLESS IT IS SHF LOCK OR CAPS LOCK) -- MOS56 0142 EF6E ; IF AUTO REPEAT PERMANENTLY DISABLED -- MOS56 0143 EF6E ; THEN DON'T RESET THIS COUNTER. -- MOS56 0144 EF6E A6 EC LDX CKEY -- MOS56 0145 EF70 F0 12 BEQ KBDWU ;[no current key] MOS56 0145 EF70 v6D MOS56 0146 EF72 ; current key exists MOS56 0145 EF70 v6D MOS56 0147 EF72 20 57 F0 JSR KC ;get status of current key MOS56 0145 EF70 v6D MOS56 0148 EF75 30 10 BMI KBDX ;[current key closed] MOS56 0145 EF70 v6D MOS56 0149 EF77 ; current key open MOS56 0145 EF70 v6D MOS56 0150 EF77 E4 EC CPX CKEY MOS56 0145 EF70 v6D MOS56 0151 EF79 KBDW MOS56 0145 EF70 v6D MOS56 0152 EF79 86 EC STX CKEY ;update open/closed state of current key MOS56 0145 EF70 v6D MOS56 0153 EF7B D0 07 BNE KBDWU ;[current key: is open was closed, or is closed was open] MOS56 0145 EF70 v6D MOS56 0154 EF7D ; CURRENT KEY HAS BEEN OPEN FOR TWO CLOCK MOS56 0145 EF70 v6D MOS56 0155 EF7D ; CYCLES, SO 'FORGET' IT BY ZEROING CKEY MOS56 0145 EF70 v6D MOS56 0156 EF7D ; (KEY VALUES START AT 16 IN THIS RTNE) MOS56 0145 EF70 v6D MOS56 0157 EF7D ; ALSO SET COUNTER TO 1 MOS56 0145 EF70 v6D MOS56 0158 EF7D ; indicate no current key MOS56 0145 EF70 v6D MOS56 0159 EF7D A2 00 LDXIM ZERO MOS56 0145 EF70 v6D MOS56 0160 EF7F 86 EC STX CKEY MOS56 0145 EF70 v6D MOS56 0161 EF81 FCSP ;fix to CTRL/SHIFT h/w problem MOS56 0145 EF70 v6D MOS56 0162 EF81 20 4C F0 JSR AR ;update auto-repeat intervals MOS56 0267 EFD9 ^26 MOS56 0163 EF84 KBDWU MOS56 0267 EFD9 ^26 MOS56 0164 EF84 4C 16 F0 JMP KBDY MOS56 0267 EFD9 ^26 MOS56 0165 EF87 KBDX ;current KEY IS CLOSED:IF WAS OPEN,SIMPLY MOS56 0267 EFD9 ^26 MOS56 0166 EF87 ; UPDATE STATUS,ELSE CHECK COUNTER MOS56 0267 EFD9 ^26 MOS56 0167 EF87 ; AND PROCESS CHAR IF REQ'D. MOS56 0267 EFD9 ^26 MOS56 0168 EF87 E4 EC CPX CKEY MOS56 0267 EFD9 ^26 MOS56 0169 EF89 D0 EE BNE KBDW ;[current key: is closed, was open] MOS56 0267 EFD9 ^26 MOS56 0170 EF8B ; current key is closed and was closed MOS56 0267 EFD9 ^26 MOS56 0171 EF8B A5 E7 LDA ARCTR MOS56 0267 EFD9 ^26 MOS56 0172 EF8D F0 23 BEQ KBDXS ;[auto-repeat suppressed] MOS56 0267 EFD9 ^26 MOS56 0173 EF8F ; decrement auto-repeat countdown MOS56 0267 EFD9 ^26 MOS56 0174 EF8F C6 E7 DEC ARCTR MOS56 0267 EFD9 ^26 MOS56 0175 EF91 D0 1F BNE KBDXS ;[auto-repeat interval not exhausted] MOS56 0267 EFD9 ^26 MOS56 0176 EF93 ; auto-repeat interval exhausted MOS56 0267 EFD9 ^26 MOS56 0177 EF93 ; auto-repeat countdown := delay/repeat period MOS56 0267 EFD9 ^26 MOS56 0178 EF93 AD CA 02 LDA FARCTR MOS56 0267 EFD9 ^26 MOS56 0179 EF96 85 E7 STA ARCTR MOS56 0267 EFD9 ^26 MOS56 0180 EF98 ; next auto-repeat interval := repeat period MOS56 0267 EFD9 ^26 MOS56 0181 EF98 AD 55 02 LDA ARSET MOS56 0267 EFD9 ^26 MOS56 0182 EF9B 8D CA 02 STA FARCTR MOS56 0267 EFD9 ^26 MOS56 0183 EF9E ; MOS56 0267 EFD9 ^26 MOS56 0184 EF9E AD 5A 02 LDA KSTAT MOS56 0267 EFD9 ^26 MOS56 0185 EFA1 ; test for shift lock key MOS56 0267 EFD9 ^26 MOS56 0186 EFA1 A6 EC LDX CKEY MOS56 0267 EFD9 ^26 MOS56 0187 EFA3 E0 D0 CPXIM SHLKKY ;IS THIS THE SHIFT LOCK? MOS56 0267 EFD9 ^26 MOS56 0188 EFA5 D0 0D BNE KCPLK ;[key is not SHIFT lock] MOS56 0267 EFD9 ^26 MOS56 0189 EFA7 ; MOS56 0267 EFD9 ^26 MOS56 0190 EFA7 ; SHIFT LOCK key processing MOS56 0267 EFD9 ^26 MOS56 0191 EFA7 09 90 ORAIM CAPSL+INVERT ;clear CAPITALS lock state MOS56 0267 EFD9 ^26 MOS56 0192 EFA9 49 A0 EORIM SHFTL+INVERT ;flip SHIFT lock state and clear invert MOS56 0267 EFD9 ^26 MOS56 0193 EFAB KEYBD3 ;update keyboard status MOS56 0267 EFD9 ^26 MOS56 0194 EFAB 8D 5A 02 STA KSTAT ;store SHIFT lock state MOS56 0267 EFD9 ^26 MOS56 0195 EFAE ; suppress auto-repeat MOS56 0267 EFD9 ^26 MOS56 0196 EFAE A9 00 LDAIM ZERO MOS56 0267 EFD9 ^26 MOS56 0197 EFB0 85 E7 STA ARCTR MOS56 0267 EFD9 ^26 MOS56 0198 EFB2 KBDXS MOS56 0267 EFD9 ^26 MOS56 0199 EFB2 [ MOS125 = &FF MOS56 0267 EFD9 ^26 MOS56 0201 EFB2 | MOS56 0267 EFD9 ^26 MOS56 0202 EFB2 B0 62 BCS KBDY ;always branch MOS56 0202 EFB2 v1D MOS56 0203 EFB4 ] MOS56 0202 EFB2 v1D MOS56 0204 EFB4 MOS56 0202 EFB2 v1D MOS56 0205 EFB4 KCPLK ;CAPS key processing MOS56 0202 EFB2 v1D MOS56 0206 EFB4 E0 C0 CPXIM CPLKKY MOS56 0202 EFB2 v1D MOS56 0207 EFB6 D0 0E BNE KCPLK1 ;[not CAPITALS lock] MOS56 0202 EFB2 v1D MOS56 0208 EFB8 ; clear SHIFT lock state MOS56 0202 EFB2 v1D MOS56 0209 EFB8 09 A0 ORAIM SHFTL+INVERT MOS56 0202 EFB2 v1D MOS56 0210 EFBA ; add in SHIFT invert status MOS56 0202 EFB2 v1D MOS56 0211 EFBA 24 FA BIT KTEMP MOS56 0202 EFB2 v1D MOS56 0212 EFBC 10 04 BPL KCPLK2 ;[not SHIFT/CAPS] MOS56 0202 EFB2 v1D MOS56 0213 EFBE ; SHIFT/CAPS - force CAPS invert MOS56 0202 EFB2 v1D MOS56 0214 EFBE 09 10 ORAIM CAPSL MOS56 0202 EFB2 v1D MOS56 0215 EFC0 49 80 EORIM INVERT MOS56 0202 EFB2 v1D MOS56 0216 EFC2 KCPLK2 MOS56 0202 EFB2 v1D MOS56 0217 EFC2 ; flip CAPITALS lock state MOS56 0202 EFB2 v1D MOS56 0218 EFC2 49 90 EORIM CAPSL+INVERT MOS56 0202 EFB2 v1D MOS56 0219 EFC4 ; set CAPITALS lock state and disable auto-repeat MOS56 0202 EFB2 v1D MOS56 0220 EFC4 [ MOS125 = &FF MOS56 0202 EFB2 v1D MOS56 0222 EFC4 | MOS56 0202 EFB2 v1D MOS56 0223 EFC4 B0 E5 BCS KEYBD3 ;C=1 from CPXIM MOS56 0202 EFB2 v1D MOS56 0224 EFC6 ] MOS56 0202 EFB2 v1D MOS56 0225 EFC6 MOS56 0202 EFB2 v1D MOS56 0226 EFC6 KCPLK1 MOS56 0202 EFB2 v1D MOS56 0227 EFC6 ; AT THIS POINT, WE HAVE A CHARACTER FOR RDCH MOS56 0202 EFB2 v1D MOS56 0228 EFC6 ; NOW LOOK UP CODE AND MODIFY BY SHIFT MOS56 0202 EFB2 v1D MOS56 0229 EFC6 ; CONTROL OR CAPS LOCK AS APPROPRIATE MOS56 0202 EFB2 v1D MOS56 0230 EFC6 ; convert current key code to ASCII MOS56 0202 EFB2 v1D MOS56 0231 EFC6 BD D8 EF LDAAX KTBL -&80 MOS56 0202 EFB2 v1D MOS56 0232 EFC9 D0 03 BNE NTAB ;[not TAB key] MOS56 0202 EFB2 v1D MOS56 0233 EFCB ; TAB key MOS56 0202 EFB2 v1D MOS56 0234 EFCB AD 6B 02 LDA TABCOD MOS56 0202 EFB2 v1D MOS56 0235 EFCE NTAB MOS56 0202 EFB2 v1D MOS56 0236 EFCE MOS56 0202 EFB2 v1D MOS56 0237 EFCE [ FALSE=0 MOS56 0202 EFB2 v1D MOS56 0256 EFCE ] MOS56 0202 EFB2 v1D MOS56 0257 EFCE MOS56 0202 EFB2 v1D MOS56 0258 EFCE ; setup for KSTAT tests MOS56 0202 EFB2 v1D MOS56 0259 EFCE AE 5A 02 LDX KSTAT MOS56 0202 EFB2 v1D MOS56 0260 EFD1 86 FA STX KTEMP MOS56 0202 EFB2 v1D MOS56 0261 EFD3 ; check for CTRL MOS56 0202 EFB2 v1D MOS56 0262 EFD3 26 FA ROL KTEMP MOS56 0202 EFB2 v1D MOS56 0263 EFD5 10 07 BPL KCONV6 ;[no CTRL] MOS56 0202 EFB2 v1D MOS56 0264 EFD7 ; cannot support two-key rollover with CTRL (h/w constraint) MOS56 0202 EFB2 v1D MOS56 0265 EFD7 A6 ED LDX OKEY MOS56 0202 EFB2 v1D MOS56 0266 EFD9 FCSP1 ;chained branch MOS56 0202 EFB2 v1D MOS56 0267 EFD9 D0 A6 BNE FCSP ;[at least two keys pressed] MOS56 0202 EFB2 v1D MOS56 0268 EFDB ; convert character to associated control character MOS56 MOS56 MOS56 MOS56 Acorn macro assembler Page 117 MOS56 MOS56 Keyboard management MOS56 MOS56 0202 EFB2 v1D MOS56 0269 EFDB 20 29 EB JSR CTRLCH MOS56 0202 EFB2 v1D MOS56 0270 EFDE KCONV6 MOS56 0202 EFB2 v1D MOS56 0271 EFDE ; check for SHIFT lock MOS56 0202 EFB2 v1D MOS56 0272 EFDE [ MOS125 = &FF MOS56 0202 EFB2 v1D MOS56 0290 EFDE | MOS56 0202 EFB2 v1D MOS56 0291 EFDE 26 FA ROL KTEMP MOS56 0202 EFB2 v1D MOS56 0292 EFE0 26 FA ROL KTEMP ;skip over CAPITALS lock state MOS56 0202 EFB2 v1D MOS56 0293 EFE2 90 07 BCC KCONV4 ;[SHIFT lock] MOS56 0202 EFB2 v1D MOS56 0294 EFE4 ; check for CAPS lock MOS56 0202 EFB2 v1D MOS56 0295 EFE4 30 0D BMI KCONV2 ;[no CAPS lock or SHIFT lock] MOS56 0202 EFB2 v1D MOS56 0296 EFE6 ; convert character to upper case MOS56 0202 EFB2 v1D MOS56 0297 EFE6 ; check for character in the range 'A' to 'Z' or 'a' to 'z' MOS56 0202 EFB2 v1D MOS56 0298 EFE6 20 45 E5 JSR CAPS MOS56 0202 EFB2 v1D MOS56 0299 EFE9 B0 08 BCS KCONV2 ;[not alpha] MOS56 0202 EFB2 v1D MOS56 0300 EFEB ; character is an alpha MOS56 0202 EFB2 v1D MOS56 0301 EFEB KCONV4 MOS56 0202 EFB2 v1D MOS56 0302 EFEB 20 06 EB JSR SHIFT ;invert case of alpha MOS56 0202 EFB2 v1D MOS56 0303 EFEE ] MOS56 0202 EFB2 v1D MOS56 0304 EFEE ; check for shift disabled MOS56 0202 EFB2 v1D MOS56 0305 EFEE AE 5A 02 LDX KSTAT MOS56 0202 EFB2 v1D MOS56 0306 EFF1 10 0B BPL KCONV1 ;[shift disabled] MOS56 0202 EFB2 v1D MOS56 0307 EFF3 KCONV2 ;check for SHIFT MOS56 0202 EFB2 v1D MOS56 0308 EFF3 26 FA ROL KTEMP MOS56 0202 EFB2 v1D MOS56 0309 EFF5 10 07 BPL KCONV1 ;[no SHIFT] MOS56 0202 EFB2 v1D MOS56 0310 EFF7 ; cannot support two-key rollover with SHIFT (h/w constraint) MOS56 0202 EFB2 v1D MOS56 0311 EFF7 A6 ED LDX OKEY MOS56 0202 EFB2 v1D MOS56 0312 EFF9 D0 DE BNE FCSP1 ;[at least two keys pressed] MOS56 0202 EFB2 v1D MOS56 0313 EFFB ; shift character MOS56 0202 EFB2 v1D MOS56 0314 EFFB 20 06 EB JSR SHIFT MOS56 0202 EFB2 v1D MOS56 0315 EFFE KCONV1 MOS56 0202 EFB2 v1D MOS56 0316 EFFE ; MOS56 0202 EFB2 v1D MOS56 0317 EFFE ; check for interrupt character MOS56 0202 EFB2 v1D MOS56 0318 EFFE ; MOS56 0202 EFB2 v1D MOS56 0319 EFFE CD 6C 02 CMP INTCH MOS56 0202 EFB2 v1D MOS56 0320 F001 D0 07 BNE KESC1 ;[not interrupt character] MOS56 0202 EFB2 v1D MOS56 0321 F003 AE 75 02 LDX ESCHAR MOS56 0202 EFB2 v1D MOS56 0322 F006 D0 02 BNE KESC1 ;[treat as normal character] MOS56 0202 EFB2 v1D MOS56 0323 F008 ; MOS56 0202 EFB2 v1D MOS56 0324 F008 ; X=0, Z=1 MOS56 0202 EFB2 v1D MOS56 0325 F008 ; MOS56 0202 EFB2 v1D MOS56 0326 F008 86 E7 STX ARCTR ;suppress auto-repeat for escape if escape condition enabled MOS56 0202 EFB2 v1D MOS56 0327 F00A KESC1 MOS56 0202 EFB2 v1D MOS56 0328 F00A ; MOS56 0202 EFB2 v1D MOS56 0329 F00A ; allow interrupts MOS56 0202 EFB2 v1D MOS56 0330 F00A ; MOS56 0202 EFB2 v1D MOS56 0331 F00A A8 TAY ;Y := character (will be passed to RDCHS) MOS56 0202 EFB2 v1D MOS56 0332 F00B 20 2F F1 JSR KALLOW MOS56 0202 EFB2 v1D MOS56 0333 F00E ; MOS56 0202 EFB2 v1D MOS56 0334 F00E ; insert character into RDCH buffer MOS56 0202 EFB2 v1D MOS56 0335 F00E ; MOS56 0202 EFB2 v1D MOS56 0336 F00E AD 59 02 LDA NETKDS MOS56 0202 EFB2 v1D MOS56 0337 F011 D0 03 BNE KBDY ;[keyboard disabled] MOS56 0202 EFB2 v1D MOS56 0338 F013 20 52 E5 JSR RDCHS MOS56 0202 EFB2 v1D MOS56 0339 F016 ; MOS56 0202 EFB2 v1D MOS56 0340 F016 KBDY ; NOW WE EVALUATE THE OLD KEY STATUS. MOS56 0202 EFB2 v1D MOS56 0341 F016 ; IF OPEN FOR 2 CLOCK CYCLES, FORGET IT MOS56 0202 EFB2 v1D MOS56 0342 F016 ; OTHERWISE, SIMPLY MEMORISE IT! MOS56 0202 EFB2 v1D MOS56 0343 F016 A6 ED LDX OKEY -- MOS56 0344 F018 F0 0B BEQ KBDA ;[old key does not exist] MOS56 0344 F018 v74 MOS56 0345 F01A ; MOS56 0344 F018 v74 MOS56 0346 F01A ; old key exists MOS56 0344 F018 v74 MOS56 0347 F01A 20 57 F0 JSR KC MOS56 0344 F018 v74 MOS56 0348 F01D 86 ED STX OKEY ;remember old key state MOS56 0344 F018 v74 MOS56 0349 F01F 30 04 BMI KBDA ;[old key closed] MOS56 0344 F018 v74 MOS56 0350 F021 ; MOS56 0344 F018 v74 MOS56 0351 F021 ; old key open MOS56 0344 F018 v74 MOS56 0352 F021 [ FALSE=0 MOS56 0344 F018 v74 MOS56 0356 F021 ] MOS56 0344 F018 v74 MOS56 0357 F021 ; MOS56 0344 F018 v74 MOS56 0358 F021 ; old key: is open, was open MOS56 0344 F018 v74 MOS56 0359 F021 A2 00 LDXIM ZERO MOS56 0344 F018 v74 MOS56 0360 F023 86 ED STX OKEY ;indicate no old key MOS56 0344 F018 v74 MOS56 0361 F025 KBDA ; NOW CHECK TO SEE IF A SCAN IS NEEDED. MOS56 0344 F018 v74 MOS56 0362 F025 ; IF OLD KEY ZERO, DO SCAN. IF KEY DOWN & MOS56 0344 F018 v74 MOS56 0363 F025 ; NOT EQUAL CKEY THEN SET OLD=CURRENT, & THIS MOS56 0344 F018 v74 MOS56 0364 F025 ; ONE = CURRENT, RESET STATUS CHANGE BITS MOS56 0344 F018 v74 MOS56 0365 F025 A6 ED LDX OKEY -- MOS56 0366 F027 D0 16 BNE KBDAU ;[old key exists] MOS56 0366 F027 v69 MOS56 0367 F029 ; no old key so scan keyboard MOS56 0366 F027 v69 MOS56 0368 F029 A0 EC LDYIM CKEY MOS56 0366 F027 v69 MOS56 0369 F02B 20 D2 F0 JSR ISCAN MOS56 0366 F027 v69 MOS56 0370 F02E 30 09 BMI KBDAS ;[all keys searched] MOS56 0366 F027 v69 MOS56 0371 F030 ; closed key found other than current key MOS56 0366 F027 v69 MOS56 0372 F030 ; new current key found MOS56 0366 F027 v69 MOS56 0373 F030 ; set old key = current key MOS56 0366 F027 v69 MOS56 0374 F030 A5 EC LDA CKEY MOS56 0366 F027 v69 MOS56 0375 F032 85 ED STA OKEY MOS56 0366 F027 v69 MOS56 0376 F034 KBDAR ;set new current key MOS56 0366 F027 v69 MOS56 0377 F034 86 EC STX CKEY ;current key := new key number MOS56 0394 F04A ^68 MOS56 0378 F036 20 4C F0 JSR AR ;update auto-repeat intervals MOS56 0394 F04A ^68 MOS56 0379 F039 4C 11 EF KBDAS JMP KBDAW MOS56 0394 F04A ^68 MOS56 0380 F03C KBDAT MOS56 0394 F04A ^68 MOS56 0381 F03C ; ENTRY POINT FROM ANY KEY MOS56 0394 F04A ^68 MOS56 0382 F03C ; DOWN INTERRUPT MOS56 0394 F04A ^68 MOS56 0383 F03C ; enable keyboard by scanning random key (X) MOS56 0394 F04A ^68 MOS56 0384 F03C 20 57 F0 JSR KC MOS56 0394 F04A ^68 MOS56 0385 F03F KBDAU ;find new current key MOS56 0394 F04A ^68 MOS56 0386 F03F A5 EC LDA CKEY MOS56 0394 F04A ^68 MOS56 0387 F041 D0 F6 BNE KBDAS ;[current key exists, should only exist during power up] MOS56 0394 F04A ^68 MOS56 0388 F043 ; scan keyboard matrix entries MOS56 0394 F04A ^68 MOS56 0389 F043 A0 ED LDYIM OKEY MOS56 0394 F04A ^68 MOS56 0390 F045 20 D2 F0 JSR ISCAN MOS56 0394 F04A ^68 MOS56 0391 F048 30 EF BMI KBDAS ;[processed all keys] MOS56 0394 F04A ^68 MOS56 0392 F04A ; pressed key found other than old key MOS56 0394 F04A ^68 MOS56 0393 F04A ; new current key identified MOS56 0394 F04A ^68 MOS56 0394 F04A 10 E8 BPL KBDAR ;[ALWAYS JUMP] -- MOS56 0395 F04C ; NEVER fall thru -- MOS56 0396 F04C -- MOS56 0397 F04C -- MOS56 0398 F04C AR ;set auto-repeat interval to reflect next character -- MOS56 0399 F04C A2 01 LDXIM &01 -- MOS56 0400 F04E 86 E7 STX ARCTR -- MOS56 0401 F050 ; set next auto-repeat interval to delay period -- MOS56 0402 F050 AE 54 02 LDX FARSET -- MOS56 0403 F053 8E CA 02 STX FARCTR -- MOS56 0404 F056 60 RTS -- MOS56 0405 F057 -- MOS56 0406 F057 -- MOS56 0407 F057 [ FALSE=0 -- MOS56 0414 F057 ] -- MOS56 0415 F057 MOS56 MOS56 MOS56 MOS56 Acorn macro assembler Page 118 MOS56 MOS56 Keyboard management MOS56 -- MOS56 0416 F057 KC -- MOS56 0417 F057 ; KEYBOARD ACCESS SUBROUTINE -- MOS56 0418 F057 ; read state of key -- MOS56 0419 F057 ; X = 0rrrcccc -- MOS56 0420 F057 ; r = row, c = column -- MOS56 0421 F057 ; N.B. A and C not corrupted -- MOS56 0422 F057 [ 1=0 ;$Tutu -- MOS56 0434 F057 | -- MOS56 0435 F057 ; enable keyboard -- MOS56 0436 F057 A0 03 LDYIM &03 -- MOS56 0437 F059 8C 40 FE STY PBQ -- MOS56 0438 F05C ; select VIAA PA6-PA0 as outputs -- MOS56 0439 F05C A0 7F LDYIM &7F -- MOS56 0440 F05E 8C 43 FE STY DDRAQ -- MOS56 0441 F061 8E 4F FE STX PAPQ ;select matrix element -- MOS56 0442 F064 AE 4F FE LDX PAPQ ;read element status: N=0 => open, N=1 => closed -- MOS56 0443 F067 60 RTS -- MOS56 0444 F068 ] -- MOS56 0445 F068 -- MOS56 0446 F068 -- MOS56 0447 F068 -- MOS56 0448 F068 -- MOS56 0449 F068 ; KEY CONVERSION TABLE -- MOS56 0450 F068 ; ROW 0 -- MOS56 0451 F068 ; not relevant -- MOS56 0452 F068 ; (consists of SHIFT, CTRL and start-up options) -- MOS56 0453 F068 KTBL0 -- MOS56 0454 F068 F058 KTBL * KTBL0 -&10 -- MOS56 0455 F068 ; ROW 1 -- MOS56 0456 F068 71 = "q" -- MOS56 0457 F069 33 = "3" ;shift '#' -- MOS56 0458 F06A 34 = "4" ;shift '$' -- MOS56 0459 F06B 35 = "5" ;shift '%' -- MOS56 0460 F06C 84 = SOFTK4 ;f4 -- MOS56 0461 F06D 38 = "8" ;shift '(' -- MOS56 0462 F06E 87 = SOFTK7 ;f7 -- MOS56 0463 F06F 2D = "-" ;shift '=' -- MOS56 0464 F070 5E = "^" ;shift '~' -- MOS56 0465 F071 8C = CURLFT ;cursor left (fC) -- MOS56 0466 F072 -- MOS56 0467 F072 ; 'hide' 6 bytes -- MOS56 0468 F072 [ MOS125 = &FF -- MOS56 0474 F072 | -- MOS56 0475 F072 PUTCHK -- MOS56 0476 F072 -- MOS56 0477 F072 ;Output byte to cassette and add to check sum. -- MOS56 0478 F072 -- MOS56 0479 F072 20 A9 F8 JSR PUTCAS -- MOS56 0480 F075 4C E4 F7 JMP ADDCRC -- MOS56 0481 F078 ] -- MOS56 0482 F078 -- MOS56 0483 F078 ; ROW 2 -- MOS56 0484 F078 80 = SOFTK0 ;f0 -- MOS56 0485 F079 77 = "w" -- MOS56 0486 F07A 65 = "e" -- MOS56 0487 F07B 74 = "t" -- MOS56 0488 F07C 37 = "7" ;shift single quote -- MOS56 0489 F07D 69 = "i" -- MOS56 0490 F07E 39 = "9" ;shift ')' -- MOS56 0491 F07F 30 = "0" ;same shifted -- MOS56 0492 F080 POUNDM -- MOS56 0493 F080 5F = "_" ;shift POUND -- MOS56 0494 F081 8E = CURDWN ;cursor down (fE) -- MOS56 0495 F082 -- MOS56 0496 F082 ; 'hide' 6 bytes -- MOS56 0497 F082 6C FE FD JMITST JMI TSTSFT -- MOS56 0498 F085 [ MOS125 = &FF -- MOS56 0500 F085 | -- MOS56 0501 F085 6C 20 02 JMIEVT JMI EVTVEC ;user event -- MOS56 0502 F088 ] -- MOS56 0503 F088 -- MOS56 0504 F088 ; ROW 3 -- MOS56 0505 F088 31 = "1" ;shift '!' -- MOS56 0506 F089 32 = "2" ;shift double quote -- MOS56 0507 F08A 64 = "d" -- MOS56 0508 F08B 72 = "r" -- MOS56 0509 F08C 36 = "6" ;shift '&' -- MOS56 0510 F08D 75 = "u" -- MOS56 0511 F08E 6F = "o" -- MOS56 0512 F08F 70 = "p" -- MOS56 0513 F090 5B = "[" ;shift curly left bracket -- MOS56 0514 F091 8F = CURUP ;cursor up (fF) -- MOS56 0515 F092 -- MOS56 0516 F092 ; 'hide' 6 bytes -- MOS56 0517 F092 2C 49 D9 JMIKYV BIT FFBYT -- MOS56 0518 F095 6C 28 02 JMIKEY JMI KEYVEC MOS56 0667 F0D5 ^3E MOS56 0519 F098 MOS56 0667 F0D5 ^3E MOS56 0520 F098 ; ROW 4 MOS56 0667 F0D5 ^3E MOS56 0521 F098 01 = &01 ;CAPS lock MOS56 0667 F0D5 ^3E MOS56 0522 F099 61 = "a" MOS56 0667 F0D5 ^3E MOS56 0523 F09A 78 = "x" MOS56 0667 F0D5 ^3E MOS56 0524 F09B 66 = "f" MOS56 0667 F0D5 ^3E MOS56 0525 F09C 79 = "y" MOS56 0667 F0D5 ^3E MOS56 0526 F09D 6A = "j" MOS56 0667 F0D5 ^3E MOS56 0527 F09E 6B = "k" MOS56 0667 F0D5 ^3E MOS56 0528 F09F 40 = AT ;same shifted MOS56 0667 F0D5 ^3E MOS56 0529 F0A0 3A = ":" ;shift '*' MOS56 0667 F0D5 ^3E MOS56 0530 F0A1 0D = MCR ;same shifted MOS56 0667 F0D5 ^3E MOS56 0531 F0A2 MOS56 0667 F0D5 ^3E MOS56 0532 F0A2 [ NOSP = &00 MOS56 0667 F0D5 ^3E MOS56 0542 F0A2 | MOS56 0667 F0D5 ^3E MOS56 0543 F0A2 ; 'hide' 6 bytes MOS56 0667 F0D5 ^3E MOS56 0544 F0A2 SENDD MOS56 0667 F0D5 ^3E MOS56 0545 F0A2 00 = &00 ;inputs MOS56 0667 F0D5 ^3E MOS56 0546 F0A3 FF = &FF ;outputs MOS56 0667 F0D5 ^3E MOS56 0547 F0A4 SENDS MOS56 0667 F0D5 ^3E MOS56 0548 F0A4 01 = &01 ;read enable MOS56 0667 F0D5 ^3E MOS56 0549 F0A5 02 = &02 ;write enable MOS56 0667 F0D5 ^3E MOS56 0550 F0A6 SENDF MOS56 0667 F0D5 ^3E MOS56 0551 F0A6 09 = &09 ;read disable MOS56 0667 F0D5 ^3E MOS56 0552 F0A7 0A = &0A ;write disable MOS56 0667 F0D5 ^3E MOS56 0553 F0A8 ] MOS56 0667 F0D5 ^3E MOS56 0554 F0A8 MOS56 0667 F0D5 ^3E MOS56 0555 F0A8 ; ROW 5 MOS56 0667 F0D5 ^3E MOS56 0556 F0A8 02 = &02 ;SHIFT lock MOS56 0667 F0D5 ^3E MOS56 0557 F0A9 73 = "s" MOS56 0667 F0D5 ^3E MOS56 0558 F0AA 63 = "c" MOS56 0667 F0D5 ^3E MOS56 0559 F0AB 67 = "g" MOS56 0667 F0D5 ^3E MOS56 0560 F0AC 68 = "h" MOS56 0667 F0D5 ^3E MOS56 0561 F0AD 6E = "n" MOS56 0667 F0D5 ^3E MOS56 0562 F0AE 6C = "l" MOS56 MOS56 MOS56 MOS56 Acorn macro assembler Page 119 MOS56 MOS56 Keyboard management MOS56 MOS56 0667 F0D5 ^3E MOS56 0563 F0AF 3B = ";" ;shift '+' MOS56 0667 F0D5 ^3E MOS56 0564 F0B0 5D = "]" ;shift curly right bracket MOS56 0667 F0D5 ^3E MOS56 0565 F0B1 7F = MDEL ;same shifted MOS56 0667 F0D5 ^3E MOS56 0566 F0B2 MOS56 0667 F0D5 ^3E MOS56 0567 F0B2 ; 'hide' 6 bytes MOS56 0667 F0D5 ^3E MOS56 0568 F0B2 RMLA ;read machine low memory address MOS56 0667 F0D5 ^3E MOS56 0569 F0B2 AC 44 02 LDY HWM MOS56 0667 F0D5 ^3E MOS56 0570 F0B5 A2 00 LDXIM ZERO MOS56 0667 F0D5 ^3E MOS56 0571 F0B7 60 RTS MOS56 0667 F0D5 ^3E MOS56 0572 F0B8 MOS56 0667 F0D5 ^3E MOS56 0573 F0B8 ; ROW 6 MOS56 0667 F0D5 ^3E MOS56 0574 F0B8 00 = ZERO ;TAB - programmable TAB key MOS56 0667 F0D5 ^3E MOS56 0575 F0B9 7A = "z" MOS56 0667 F0D5 ^3E MOS56 0576 F0BA 20 = SPACE ;same shifted MOS56 0667 F0D5 ^3E MOS56 0577 F0BB 76 = "v" MOS56 0667 F0D5 ^3E MOS56 0578 F0BC 62 = "b" MOS56 0667 F0D5 ^3E MOS56 0579 F0BD 6D = "m" MOS56 0667 F0D5 ^3E MOS56 0580 F0BE 2C = "," ;shift '<' MOS56 0667 F0D5 ^3E MOS56 0581 F0BF 2E = "." ;shift '>' MOS56 0667 F0D5 ^3E MOS56 0582 F0C0 2F = "/" ; shift '?' MOS56 0667 F0D5 ^3E MOS56 0583 F0C1 8B = MCOPY ;copy character at cursor (fB) MOS56 0667 F0D5 ^3E MOS56 0584 F0C2 MOS56 0667 F0D5 ^3E MOS56 0585 F0C2 ; 'hide' 6 bytes MOS56 0667 F0D5 ^3E MOS56 0586 F0C2 [ MOS125 = &FF MOS56 0667 F0D5 ^3E MOS56 0591 F0C2 | MOS56 0667 F0D5 ^3E MOS56 0592 F0C2 OPT MOS56 0667 F0D5 ^3E MOS56 0593 F0C2 0A ASLA ;lsb(A) := 0 MOS56 0667 F0D5 ^3E MOS56 0594 F0C3 ;* LDAIM $00 MOS56 0667 F0D5 ^3E MOS56 0595 F0C3 EOF MOS56 0667 F0D5 ^3E MOS56 0596 F0C3 29 01 ANDIM &01 ;$00 => OPT, $01 => EOF MOS56 0667 F0D5 ^3E MOS56 0597 F0C5 4C 99 E0 JMP JMIFSC ;[ALWAYS JUMP, present option to file system AND return] MOS56 0667 F0D5 ^3E MOS56 0598 F0C8 ] MOS56 0667 F0D5 ^3E MOS56 0599 F0C8 MOS56 0667 F0D5 ^3E MOS56 0600 F0C8 ; ROW 7 MOS56 0667 F0D5 ^3E MOS56 0601 F0C8 1B = ESC ;same shifted MOS56 0667 F0D5 ^3E MOS56 0602 F0C9 81 = SOFTK1 ;f1 MOS56 0667 F0D5 ^3E MOS56 0603 F0CA 82 = SOFTK2 ;f2 MOS56 0667 F0D5 ^3E MOS56 0604 F0CB 83 = SOFTK3 ;f3 MOS56 0667 F0D5 ^3E MOS56 0605 F0CC 85 = SOFTK5 ;f5 MOS56 0667 F0D5 ^3E MOS56 0606 F0CD 86 = SOFTK6 ;f6 MOS56 0667 F0D5 ^3E MOS56 0607 F0CE 88 = SOFTK8 ;f8 MOS56 0667 F0D5 ^3E MOS56 0608 F0CF 89 = SOFTK9 ;f9 MOS56 0667 F0D5 ^3E MOS56 0609 F0D0 5C = "\" ;shift '|' MOS56 0667 F0D5 ^3E MOS56 0610 F0D1 8D = CURRHT ;cursor right (fD) MOS56 0667 F0D5 ^3E MOS56 0611 F0D2 ENDKT MOS56 0667 F0D5 ^3E MOS56 0612 F0D2 MOS56 0667 F0D5 ^3E MOS56 0613 F0D2 MOS56 0667 F0D5 ^3E MOS56 0614 F0D2 [ MOS125 = &FF MOS56 0667 F0D5 ^3E MOS56 0657 F0D2 ] MOS56 0667 F0D5 ^3E MOS56 0658 F0D2 MOS56 0667 F0D5 ^3E MOS56 0659 F0D2 MOS56 0667 F0D5 ^3E MOS56 0660 F0D2 ISCAN ;scan keys from matrix address $10 MOS56 0667 F0D5 ^3E MOS56 0661 F0D2 18 CLC ;ignore key addressed by Y MOS56 0667 F0D5 ^3E MOS56 0662 F0D3 ; MOS56 0667 F0D5 ^3E MOS56 0663 F0D3 XSCANA ;FX entry, scan keys from matrix address $10, C=1 (ignore no keys) MOS56 0667 F0D5 ^3E MOS56 0664 F0D3 A2 10 LDXIM &10 MOS56 0667 F0D5 ^3E MOS56 0665 F0D5 ; MOS56 0667 F0D5 ^3E MOS56 0666 F0D5 XSCANB ;FX entry, scan keys from matrix address X, C=1 (ignore no keys) MOS56 0667 F0D5 ^3E MOS56 0667 F0D5 B0 BE BCS JMIKEY ;[route FX entries thru indirection] -- MOS56 0668 F0D7 ; -- MOS56 0669 F0D7 SKFMA ;scan keys from matrix address (should have C=1) -- MOS56 0670 F0D7 ; start scan address in X -- MOS56 0671 F0D7 ; X>=0 => scan keys starting at X -- MOS56 0672 F0D7 ; X<0 => investigate key NOT(X) -- MOS56 0673 F0D7 ; -- MOS56 0674 F0D7 8A TXA -- MOS56 0675 F0D8 10 05 BPL SKFMA2 ;[scan keys] MOS56 0675 F0D8 v7A MOS56 0676 F0DA ; C=1 MOS56 0675 F0D8 v7A MOS56 0677 F0DA ; look at key MOS56 0675 F0D8 v7A MOS56 0678 F0DA ; MOS56 0675 F0D8 v7A MOS56 0679 F0DA 20 57 F0 JSR KC ;result in top bit of X (N.B. does not alter C) MOS56 0675 F0D8 v7A MOS56 0680 F0DD ; C=1 MOS56 0675 F0D8 v7A MOS56 0681 F0DD B0 55 BCS KALLOX ;return result in A MOS56 0681 F0DD v2A MOS56 0682 F0DF ; MOS56 0681 F0DD v2A MOS56 0683 F0DF SKFMA2 MOS56 0681 F0DD v2A MOS56 0684 F0DF ; MOS56 0681 F0DD v2A MOS56 0685 F0DF 08 PHP ;save request source indicator (in C) MOS56 0681 F0DD v2A MOS56 0686 F0E0 90 02 BCC SKFMA1 ;[CKEY or OKEY entry] MOS56 0681 F0DD v2A MOS56 0687 F0E2 A0 EE LDYIM CKEY+&02 MOS56 0681 F0DD v2A MOS56 0688 F0E4 SKFMA1 MOS56 0681 F0DD v2A MOS56 0689 F0E4 ; MOS56 0681 F0DD v2A MOS56 0690 F0E4 99 DF 01 STAAY KSCSTA-CKEY ;save scan start address MOS56 0681 F0DD v2A MOS56 0691 F0E7 ; return MI => no keys, otherwise X = key MOS56 0681 F0DD v2A MOS56 0692 F0E7 A2 09 LDXIM &09 MOS56 0681 F0DD v2A MOS56 0693 F0E9 ; MOS56 0681 F0DD v2A MOS56 0694 F0E9 ISCAN1 MOS56 0681 F0DD v2A MOS56 0695 F0E9 ; allow interrupts MOS56 0681 F0DD v2A MOS56 0696 F0E9 ; MOS56 0681 F0DD v2A MOS56 0697 F0E9 20 2F F1 JSR KALLOW MOS56 0681 F0DD v2A MOS56 0698 F0EC ; MOS56 0681 F0DD v2A MOS56 0699 F0EC ; select VIAA PA6-PA0 as outputs MOS56 0681 F0DD v2A MOS56 0700 F0EC ; MOS56 0681 F0DD v2A MOS56 0701 F0EC A9 7F LDAIM &7F MOS56 0681 F0DD v2A MOS56 0702 F0EE 8D 43 FE STA DDRAQ MOS56 0681 F0DD v2A MOS56 0703 F0F1 ; MOS56 0681 F0DD v2A MOS56 0704 F0F1 ; claim keyboard MOS56 0681 F0DD v2A MOS56 0705 F0F1 ; MOS56 0681 F0DD v2A MOS56 0706 F0F1 A9 03 LDAIM &03 MOS56 0681 F0DD v2A MOS56 0707 F0F3 8D 40 FE STA PBQ MOS56 0681 F0DD v2A MOS56 0708 F0F6 ; MOS56 0681 F0DD v2A MOS56 0709 F0F6 ; reset keyboard interrupt line MOS56 0681 F0DD v2A MOS56 0710 F0F6 ; MOS56 0681 F0DD v2A MOS56 0711 F0F6 A9 0F LDAIM &0F ;N.B. use non-existent group which does not interrupt MOS56 0681 F0DD v2A MOS56 0712 F0F8 8D 4F FE STA PAPQ MOS56 0681 F0DD v2A MOS56 0713 F0FB ; MOS56 0681 F0DD v2A MOS56 0714 F0FB ; clear latched event MOS56 0681 F0DD v2A MOS56 0715 F0FB ; MOS56 0681 F0DD v2A MOS56 0716 F0FB A9 01 LDAIM &01 MOS56 0681 F0DD v2A MOS56 0717 F0FD 8D 4D FE STA IFRQ MOS56 0681 F0DD v2A MOS56 0718 F100 ; MOS56 0681 F0DD v2A MOS56 0719 F100 8E 4F FE STX PAPQ ;select key (force no key first time thru loop) MOS56 0681 F0DD v2A MOS56 0720 F103 MOS56 0681 F0DD v2A MOS56 0721 F103 2C 4D FE BIT IFRQ ;test for latched event MOS56 0681 F0DD v2A MOS56 0722 F106 F0 21 BEQ ISCAND ;[no group key pressed] MOS56 0681 F0DD v2A MOS56 0723 F108 ; MOS56 0681 F0DD v2A MOS56 0724 F108 ; key pressed in this group MOS56 0681 F0DD v2A MOS56 0725 F108 ; MOS56 0681 F0DD v2A MOS56 0726 F108 8A TXA ;A := key at start of group MOS56 0681 F0DD v2A MOS56 0727 F109 ; MOS56 0681 F0DD v2A MOS56 0728 F109 ISCANC ;scan group to find pressed key within group MOS56 0681 F0DD v2A MOS56 0729 F109 ; check key against start scan address MOS56 MOS56 MOS56 MOS56 Acorn macro assembler Page 120 MOS56 MOS56 Keyboard management MOS56 MOS56 0681 F0DD v2A MOS56 0730 F109 ; MOS56 0681 F0DD v2A MOS56 0731 F109 D9 DF 01 CMPAY KSCSTA-CKEY MOS56 0681 F0DD v2A MOS56 0732 F10C 90 16 BCC ISCANE ;[ignore key] MOS56 0681 F0DD v2A MOS56 0733 F10E ; MOS56 0681 F0DD v2A MOS56 0734 F10E 8D 4F FE STA PAPQ MOS56 0681 F0DD v2A MOS56 0735 F111 2C 4F FE BIT PAPQ MOS56 0681 F0DD v2A MOS56 0736 F114 10 0E BPL ISCANE ;[individual key not pressed] MOS56 0681 F0DD v2A MOS56 0737 F116 ; MOS56 0681 F0DD v2A MOS56 0738 F116 ; individual key pressed MOS56 0681 F0DD v2A MOS56 0739 F116 ; MOS56 0681 F0DD v2A MOS56 0740 F116 ISCANB ;key press detected at key A MOS56 0681 F0DD v2A MOS56 0741 F116 ; MOS56 0681 F0DD v2A MOS56 0742 F116 ; key found MOS56 0681 F0DD v2A MOS56 0743 F116 ; MOS56 0681 F0DD v2A MOS56 0744 F116 28 PLP MOS56 0681 F0DD v2A MOS56 0745 F117 08 PHP MOS56 0681 F0DD v2A MOS56 0746 F118 B0 13 BCS ISCAN9 ;[ignore no character] MOS56 0681 F0DD v2A MOS56 0747 F11A ; MOS56 0681 F0DD v2A MOS56 0748 F11A 48 PHA ;save key code MOS56 0681 F0DD v2A MOS56 0749 F11B ; MOS56 0681 F0DD v2A MOS56 0750 F11B ; check whether to ignore character MOS56 0681 F0DD v2A MOS56 0751 F11B ; MOS56 0681 F0DD v2A MOS56 0752 F11B 59 00 00 EORAY ZERO MOS56 0681 F0DD v2A MOS56 0753 F11E 0A ASLA ;ignore top bit MOS56 0681 F0DD v2A MOS56 0754 F11F C9 01 CMPIM &01 MOS56 0681 F0DD v2A MOS56 0755 F121 68 PLA ;restore key code MOS56 0681 F0DD v2A MOS56 0756 F122 B0 09 BCS ISCAN9 ;[accept key] MOS56 0681 F0DD v2A MOS56 0757 F124 ; MOS56 0681 F0DD v2A MOS56 0758 F124 ; ignore key MOS56 0681 F0DD v2A MOS56 0759 F124 ; MOS56 0681 F0DD v2A MOS56 0760 F124 ISCANE ;ignore key MOS56 0681 F0DD v2A MOS56 0761 F124 18 CLC MOS56 0681 F0DD v2A MOS56 0762 F125 69 10 ADCIM &10 MOS56 0681 F0DD v2A MOS56 0763 F127 10 E0 BPL ISCANC ;[step to next key within group] MOS56 0681 F0DD v2A MOS56 0764 F129 ; MOS56 0681 F0DD v2A MOS56 0765 F129 ; key group exhausted MOS56 0681 F0DD v2A MOS56 0766 F129 ; MOS56 0681 F0DD v2A MOS56 0767 F129 ISCAND ;scan within group failed MOS56 0681 F0DD v2A MOS56 0768 F129 CA DEX MOS56 0681 F0DD v2A MOS56 0769 F12A 10 BD BPL ISCAN1 ;[try next group] MOS56 0681 F0DD v2A MOS56 0770 F12C ; no key found, X<0 MOS56 0681 F0DD v2A MOS56 0771 F12C 8A TXA ;set up to negate effect of TAX MOS56 0681 F0DD v2A MOS56 0772 F12D ; MOS56 0681 F0DD v2A MOS56 0773 F12D ISCAN9 ;accept key MOS56 0681 F0DD v2A MOS56 0774 F12D AA TAX ;X := key address MOS56 0681 F0DD v2A MOS56 0775 F12E ; MOS56 0681 F0DD v2A MOS56 0776 F12E 28 PLP MOS56 0681 F0DD v2A MOS56 0777 F12F ; MOS56 0681 F0DD v2A MOS56 0778 F12F KALLOW ;release keyboard and allow interrupts MOS56 0681 F0DD v2A MOS56 0779 F12F ; **** MUST NOT CORRUPT Y **** MOS56 0681 F0DD v2A MOS56 0780 F12F ; release keyboard MOS56 0681 F0DD v2A MOS56 0781 F12F ; MOS56 0681 F0DD v2A MOS56 0782 F12F 20 34 F1 JSR KALLOX ;release keyboard MOS56 0681 F0DD v2A MOS56 0783 F132 ; MOS56 0681 F0DD v2A MOS56 0784 F132 ; allow interrupts MOS56 0681 F0DD v2A MOS56 0785 F132 ; MOS56 0681 F0DD v2A MOS56 0786 F132 58 CLI MOS56 0681 F0DD v2A MOS56 0787 F133 78 SEI MOS56 0681 F0DD v2A MOS56 0788 F134 ; MOS56 0681 F0DD v2A MOS56 0789 F134 KALLOX ;release keyboard MOS56 0681 F0DD v2A MOS56 0790 F134 A9 0B LDAIM &0B -- MOS56 0791 F136 8D 40 FE STA PBQ -- MOS56 0792 F139 ; -- MOS56 0793 F139 ; return result in N -- MOS56 0794 F139 ; -- MOS56 0795 F139 8A TXA ;N=1 => no new key, N=0 => new key in X -- MOS56 0796 F13A 60 RTS -- MOS56 0797 F13B -- MOS56 0798 F13B -- MOS56 0799 F13B -- MOS56 0800 F13B < 3 -- MOS56 0801 F13B -- MOS56 0802 F13B LNK MOS70 -- MOS70 0001 F13B TTL C.F.S. Manifest File - MOS70 -- MOS70 0002 F13B OPT &01 -- MOS70 0003 F13B -- MOS70 0004 F13B 0005 MOS70 * DEFOPT -- MOS70 0005 F13B 0005 MOS72 * DEFOPT -- MOS70 0006 F13B 0005 MOS74 * DEFOPT -- MOS70 0007 F13B 0005 MOS76 * DEFOPT -- MOS70 0008 F13B -- MOS70 0009 F13B OPT MOS70 MOS70 MOS70 MOS70 MOS70 Acorn macro assembler Page 121 MOS70 C.F.S. Manifest File - MOS70 MOS70 -- MOS70 0010 F13B -- MOS70 0011 F13B < &0003 -- MOS70 0012 F13B > &0002 -- MOS70 0013 F13B -- MOS70 0014 F13B -- MOS70 0015 F13B ;****** C.F.S HEADER FILE ****** -- MOS70 0016 F13B -- MOS70 0017 F13B -- MOS70 0018 F13B -- MOS70 0019 F13B ;cIOBYTS * $00 ;No longer used -- MOS70 0020 F13B 0000 LENSW * &00 ;Zero => LOAD modify's OSFILE block -- MOS70 0021 F13B 0001 DEBUG * &01 ;zero => messages. +ve => no messages -- MOS70 0022 F13B 0000 TUBESW * &00 ;Zero => tube, +ve => no tube -- MOS70 0023 F13B 00FF PREMRG * &FF ;Zero => entry indirections, +ve => none -- MOS70 0024 F13B 00FF GLYN * &FF ;Zero => special IBG code for -- MOS70 0025 F13B ;Glynn. +ve => as per spec. -- MOS70 0026 F13B -- MOS70 0027 F13B ;MANIFESTS -- MOS70 0028 F13B -- MOS70 0029 F13B 00FE ENDBYT * &FE ;Byte after end of file (GETBYT) -- MOS70 0030 F13B -- MOS70 0031 F13B 0091 FXCDRV * &0091 ;FX call number -- MOS70 0032 F13B 00FF READFX * &FF -- MOS70 0033 F13B 0000 WRITFX * &00 -- MOS70 0034 F13B -- MOS70 0035 F13B 0001 INHAND * &0001 ;Input handle -- MOS70 0036 F13B 0002 OUTHND * &0002 ;Output handle -- MOS70 0037 F13B 0003 HNDS * &03 ;Both handles -- MOS70 0038 F13B 00FD NOUTHD * &FD -- MOS70 0039 F13B 000B FTSIZE * &000B ;File title size (incl. CR) -- MOS70 0040 F13B -- MOS70 0041 F13B ;Note that the 6850 status bytes (following) -- MOS70 0042 F13B ;have their bottom nybble modified according to -- MOS70 0043 F13B ;the setting of SPEED in the routines RXINIT and TXINIT -- MOS70 0044 F13B -- MOS70 0045 F13B 0030 TXSTAT * &30 ;6850 TX status -- MOS70 0046 F13B ;TXSTAT = ~RTS lo;TXI enabled;8 bits + 1 stop -- MOS70 0047 F13B 00D0 RXSTAT * &D0 -- MOS70 0048 F13B ;RXSTAT = ~RTS hi;TXI disabled;8 bits + 1 stop -- MOS70 0049 F13B -- MOS70 0050 F13B 0002 TXBIT * &02 -- MOS70 0051 F13B 0001 RXBIT * &01 -- MOS70 0052 F13B 0004 DCDBIT * &04 -- MOS70 0053 F13B -- MOS70 0054 F13B 0085 SERON * &85 ;Motor on/cass. on/RXCLK=0/TXCLK= 1,0,1 -- MOS70 0055 F13B 0005 SEROFF * &05 ;As SERON but motor off -- MOS70 0056 F13B ;ERRORS -- MOS70 0057 F13B -- MOS70 0058 F13B 00DF ERRBAS * &DF -- MOS70 0059 F13B -- MOS70 0060 F13B 00DF CFSERD * ERRBAS -&00 ;EOF -- MOS70 0061 F13B 00DE CFSERB * ERRBAS -&01 ;Channel -- MOS70 0062 F13B 00DD CFSERK * ERRBAS -&02 ;Address -- MOS70 0063 F13B 00DC SYNXER * ERRBAS -&03 ;Syntax -- MOS70 0064 F13B 00DB CFSERF * ERRBAS -&04 ;File -- MOS70 0065 F13B 00DA CFSERH * ERRBAS -&05 ;Block -- MOS70 0066 F13B 00D9 CFSERI * ERRBAS -&06 ;Header -- MOS70 0067 F13B 00D8 CFSERJ * ERRBAS -&07 ;Data -- MOS70 0068 F13B 00D8 CFSERR * CFSERJ ;Bad tape -- MOS70 0069 F13B -- MOS70 0070 F13B 00D7 SFSERR * ERRBAS -&08 ;Bad ROM -- MOS70 0071 F13B 00D6 SFSER1 * ERRBAS -&09 ;File not found -- MOS70 0072 F13B -- MOS70 0073 F13B 00D5 CFSERL * ERRBAS -&0A ;Locked -- MOS70 0074 F13B -- MOS70 0075 F13B -- MOS70 0076 F13B ;STATUS BYTE MASKS -- MOS70 0077 F13B -- MOS70 0078 F13B 0001 INOPEN * &01 -- MOS70 0079 F13B 0002 OUTOPN * &02 -- MOS70 0080 F13B 0040 LSTBYT * &40 ;Last byte read (GETBYTE) -- MOS70 0081 F13B 0080 EOFBIT * &80 ;Last byte +1 read (GETBYTE) -- MOS70 0082 F13B 00C0 LSTEOF * &C0 ;Last byte & EOF -- MOS70 0083 F13B -- MOS70 0084 F13B 00F7 NCTBIT * &F7 ;Complement of CATBIT -- MOS70 0085 F13B 003F NEFBIT * &3F ;Complement of EOFBIT/lastbyte -- MOS70 0086 F13B 00FE NINHND * &FE ;Complement of INHAND -- MOS70 0087 F13B 003E NECBIT * &3E ;Complement of EOFBIT/lastbyte/openin bit -- MOS70 0088 F13B -- MOS70 0089 F13B -- MOS70 0090 F13B -- MOS70 0091 F13B ;MESSAGE/ERROR SELECTION MASKS -- MOS70 0092 F13B -- MOS70 0093 F13B -- MOS70 0094 F13B 00CC ERRMSK * &CC ;Error bits to zero -- MOS70 0095 F13B 0033 MSGMSK * &33 ;Message bits to zero -- MOS70 0096 F13B 0088 MSGS1 * &88 ;Short messages -- MOS70 0097 F13B 00CC MSGS2 * &CC ;Long messages -- MOS70 0098 F13B -- MOS70 0099 F13B 0011 ABTBIT * &11 ;Abort set -- MOS70 0100 F13B 0022 RETBIT * &22 ;Retry set -- MOS70 0101 F13B 0000 IGBIT * &00 ;Both error bits off => ignore -- MOS70 0102 F13B 0030 NIGBIT * &30 ;Complement of ignore bits -- MOS70 0103 F13B -- MOS70 0104 F13B 00A1 DEFLT * &A1 -- MOS70 0105 F13B -- MOS70 0106 F13B ;Default is retry/messages for loaded and saved -- MOS70 0107 F13B ;files, abort/no messages for sequential files. -- MOS70 0108 F13B -- MOS70 0109 F13B -- MOS70 0110 F13B ;INFO FIELDS -- MOS70 0111 F13B -- MOS70 0112 F13B 000C BKINFO * FTSIZE +&01 -- MOS70 0113 F13B 000C BKLOAD * BKINFO -- MOS70 0114 F13B 000C BKLDLO * BKLOAD -- MOS70 0115 F13B 000D BKLDHI * BKLDLO +&01 -- MOS70 0116 F13B 0010 BKEXEC * BKLOAD +&04 -- MOS70 0117 F13B 0014 BKNOLO * BKEXEC +&04 -- MOS70 0118 F13B 0015 BKNOHI * BKNOLO +&01 ;Block no. (lo & hi) -- MOS70 0119 F13B 0016 BKSZEL * BKNOHI +&01 -- MOS70 0120 F13B 0017 BKSZEH * BKSZEL +&01 -- MOS70 0121 F13B 0018 BKFLAG * BKSZEH +&01 ;b7 => last block -- MOS70 0122 F13B 0019 BKSPAR * BKFLAG +&01 -- MOS70 0123 F13B 001D BKLAST * BKSPAR +&04 ;Length of info. -- MOS70 0124 F13B -- MOS70 0125 F13B 001D BKWORKK * BKLAST -- MOS70 0126 F13B 001E BKWRK1 * BKWORKK +&01 -- MOS70 0127 F13B 001F BKWRK2 * BKWRK1 +&01 -- MOS70 0128 F13B -- MOS70 0129 F13B -- MOS70 0130 F13B MOS70 MOS70 MOS70 MOS70 Acorn macro assembler Page 122 MOS70 C.F.S. Manifest File - MOS70 MOS70 -- MOS70 0131 F13B -- MOS70 0132 F13B ;BLOCK FLAG MASKS -- MOS70 0133 F13B -- MOS70 0134 F13B 0080 LASTBK * &80 ;NOTE - don't change, BMI and BVS etc. used -- MOS70 0135 F13B -- MOS70 0136 F13B -- MOS70 0137 F13B -- MOS70 0138 F13B ;TIMES -- MOS70 0139 F13B -- MOS70 0140 F13B 0019 DEFGAP * &19 ;25/10 Secs inter block gap -- MOS70 0141 F13B 0006 GAP * &06 ;SAVE/LOAD gap -- MOS70 0142 F13B -- MOS70 0143 F13B -- MOS70 0144 F13B ;BITS AND PIECES -- MOS70 0145 F13B -- MOS70 0146 F13B -- MOS70 0147 F13B -- MOS70 0148 F13B -- MOS70 0149 F13B 0008 CATBIT * &08 ;Doing a CAT -- MOS70 0150 F13B 0088 MONBIT * &88 ;Messages on/off -- MOS70 0151 F13B -- MOS70 0152 F13B -- MOS70 0153 F13B 02EA INBSZE * CFSA ;GBYT block size (retained over FS change) -- MOS70 0154 F13B 02EC BUFFLG * INBSZE +&02 ;Note BUFFLG & INBZSE must be contig. -- MOS70 0155 F13B -- MOS70 0156 F13B 02ED FINBYT * CFSD ;Last byte in GETBYT buffer -- MOS70 0157 F13B -- MOS70 0158 F13B ;BUFFERS -- MOS70 0159 F13B -- MOS70 0160 F13B 0A00 INBUFR * &0A00 -- MOS70 0161 F13B 0900 OUTBFR * &0900 ;Sequential access I/O buffers -- MOS70 0162 F13B -- MOS70 0163 F13B ;VARS -- MOS70 0164 F13B -- MOS70 0165 F13B 0380 VARSS * &0380 -- MOS70 0166 F13B 0300 VARPGE * &0300 -- MOS70 0167 F13B -- MOS70 0168 F13B 0380 OUTHDR * VARSS ;Header buffer for PUTBYTE -- MOS70 0169 F13B 039D OUTPTR * OUTHDR +BKLAST -- MOS70 0170 F13B 039E INPTR * OUTPTR +&01 -- MOS70 0171 F13B 039F INLDEX * INPTR +&01 ;8 bytes load/exec for input file -- MOS70 0172 F13B 03A7 INFILE * INLDEX +&08 ;GETBYTE file name -- MOS70 0173 F13B 03B2 INFO * INFILE +FTSIZE ;Header buffer -- MOS70 0174 F13B 03CF WORKK * INFO +BKWORKK ;Space to read CRC during RDHEAD -- MOS70 0175 F13B 03D1 SEQGAP * WORKK +&02 -- MOS70 0176 F13B 03D2 FILNAM * SEQGAP +&01 -- MOS70 0177 F13B 03DD NEXTIN * FILNAM +FTSIZE ;Next expected block (GETBYTE) -- MOS70 0178 F13B 03DF OLDFLG * NEXTIN +&02 -- MOS70 0179 F13B -- MOS70 0180 F13B 03CB SRPTR * INFO +BKSPAR -- MOS70 0181 F13B -- MOS70 0182 F13B -- MOS70 0183 F13B ;CHIP LOCATIONS -- MOS70 0184 F13B -- MOS70 0185 F13B FE08 STATUS * &FE08 -- MOS70 0186 F13B FE09 PORT * &FE09 -- MOS70 0187 F13B -- MOS70 0188 F13B -- MOS70 0189 F13B -- MOS70 0190 F13B ;DOS/MOS ROUTINES & ADDRESSES -- MOS70 0191 F13B -- MOS70 0192 F13B -- MOS70 0193 F13B 00FF ESCADD * &00FF ;b7 = 1 if ESCAPE occured -- MOS70 0194 F13B -- MOS70 0195 F13B -- MOS70 0196 F13B ;TUBE THINGS -- MOS70 0197 F13B -- MOS70 0198 F13B 0000 TUBER * &00 ;Value in A for tube READ initialisation -- MOS70 0199 F13B 0001 TUBEW * &01 ;Value in A for tube WRITE initialisation -- MOS70 0200 F13B 0004 TUBEX * &04 ;Value in A for tube execute -- MOS70 0201 F13B -- MOS70 0202 F13B 0080 TUBERL * &80 ;A reg. for tube RELEASE -- MOS70 0203 F13B 00C0 TUBECL * &C0 ;A reg. for tube CLAIM -- MOS70 0204 F13B -- MOS70 0205 F13B 002B SFSEND * "+" ;Marker for end of SERROM -- MOS70 0206 F13B -- MOS70 0207 F13B ; interface to code in MOS -- MOS70 0208 F13B ; -- MOS70 0209 F13B -- MOS70 0210 F13B -- MOS70 0211 F13B LNK MOS72 -- MOS72 0001 F13B ; FILE -> MOS72 -- MOS72 0002 F13B -- MOS72 0003 F13B [ MOS125 = &FF -- MOS72 0005 F13B ] -- MOS72 0006 F13B -- MOS72 0007 F13B TTL C.F.S. Main Routines - INIT -- MOS72 0008 F13B OPT MOS72 MOS72 MOS72 MOS72 MOS72 Acorn macro assembler Page 123 MOS72 C.F.S. Main Routines - INIT MOS72 -- MOS72 0009 F13B -- MOS72 0010 F13B -- MOS72 0011 F13B [ MOS125 = &FF -- MOS72 0045 F13B | -- MOS72 0046 F13B INIT -- MOS72 0047 F13B -- MOS72 0048 F13B ;Initialises CLI and file operation -- MOS72 0049 F13B ;vectors. Motor turned OFF -- MOS72 0050 F13B -- MOS72 0051 F13B ;Z set => 300 baud => speed nybble = 6 -- MOS72 0052 F13B ;Z unset => 1200 baud => speed nybble = 5 -- MOS72 0053 F13B -- MOS72 0054 F13B ;Speed nybble is OR'd in with -- MOS72 0055 F13B ;6850 status byte during TX/RXinit -- MOS72 0056 F13B -- MOS72 0057 F13B 08 PHP -- MOS72 0058 F13C A9 A1 LDAIM DEFLT -- MOS72 0059 F13E 85 E3 STA OPTS ;User status = retry & msgs on -- MOS72 0060 F140 A9 19 LDAIM DEFGAP -- MOS72 0061 F142 8D D1 03 STA SEQGAP -- MOS72 0062 F145 D0 09 BNE SOFTPT MOS72 0062 F145 v76 MOS72 0063 F147 MOS72 0062 F145 v76 MOS72 0064 F147 MOS72 0062 F145 v76 MOS72 0065 F147 CROM ;A=$8D, V=0 MOS72 0062 F145 v76 MOS72 0066 F147 TAPE ;A=$8C, V=0 MOS72 0062 F145 v76 MOS72 0067 F147 49 8C EORIM &8C MOS72 0062 F145 v76 MOS72 0068 F149 TAPE12 ;used by RESET, A=X=$00 MOS72 0062 F145 v76 MOS72 0069 F149 0A ASLA MOS72 0062 F145 v76 MOS72 0070 F14A 8D 47 02 STA SROMSW ;A=0 => *TAPE, A=2 => *ROM MOS72 0062 F145 v76 MOS72 0071 F14D E0 03 CPXIM &03 ;test for *TAPE3 MOS72 0062 F145 v76 MOS72 0072 F14F 08 PHP MOS72 0062 F145 v76 MOS72 0073 F150 MOS72 0062 F145 v76 MOS72 0074 F150 MOS72 0062 F145 v76 MOS72 0075 F150 ;Note CFSTAT (CFS0) set to zero by MOS free of charge MOS72 0062 F145 v76 MOS72 0076 F150 ;on hard reset MOS72 0062 F145 v76 MOS72 0077 F150 MOS72 0062 F145 v76 MOS72 0078 F150 SOFTPT ;Soft entry point (*TAPE) MOS72 0062 F145 v76 MOS72 0079 F150 ] MOS72 0062 F145 v76 MOS72 0080 F150 A9 06 LDAIM FSDIE -- MOS72 0081 F152 20 99 E0 JSR JMIFSC ;present command to file system -- MOS72 0082 F155 A2 06 LDXIM &06 -- MOS72 0083 F157 28 PLP -- MOS72 0084 F158 F0 01 BEQ INITON MOS72 0084 F158 v7E MOS72 0085 F15A CA DEX MOS72 0084 F158 v7E MOS72 0086 F15B 86 C6 INITON STX SPEED -- MOS72 0087 F15D ; -- MOS72 0088 F15D ; initialise filing system indirection table -- MOS72 0089 F15D ; -- MOS72 0090 F15D A2 0E LDXIM &0E -- MOS72 0091 F15F BD E3 D8 INITLP LDAAX CFSTAB -&01 MOS72 0094 F166 ^77 MOS72 0092 F162 9D 11 02 STAAX FILVEC -&01 MOS72 0094 F166 ^77 MOS72 0093 F165 CA DEX MOS72 0094 F166 ^77 MOS72 0094 F166 D0 F7 BNE INITLP -- MOS72 0095 F168 86 C2 STX ITYPE ;No i'rupts pending -- MOS72 0096 F16A ; -- MOS72 0097 F16A ; inform paged ROMs of change -- MOS72 0098 F16A ; -- MOS72 0099 F16A A2 0F LDXIM SVFSIC -- MOS72 0100 F16C ; -- MOS72 0101 F16C SVOP ;issue service ROM operati -- MOS72 0102 F16C ; optype in X -- MOS72 0103 F16C A5 F4 LDA ROMID ;save current ROM id -- MOS72 0104 F16E 48 PHA -- MOS72 0105 F16F 8A TXA ;A = optype -- MOS72 0106 F170 ; -- MOS72 0107 F170 A2 0F LDXIM NROM-&1 -- MOS72 0108 F172 SVOP1 -- MOS72 0109 F172 [ $Tutu ; Less farting about with page 02 -- MOS72 0115 F172 | -- MOS72 0116 F172 FE A1 02 INCAX ROMS ;test MOS72 0135 F186 ^6A MOS72 0117 F175 DE A1 02 DECAX ROMS ;ROMS MOS72 0135 F186 ^6A MOS72 0118 F178 10 0B BPL SVOP2 ;[not a service ROM] MOS72 0135 F186 ^6A MOS72 0119 F17A ] MOS72 0135 F186 ^6A MOS72 0120 F17A ; found a service ROM MOS72 0135 F186 ^6A MOS72 0121 F17A [ MOS125 = &FF MOS72 0135 F186 ^6A MOS72 0124 F17A | MOS72 0135 F186 ^6A MOS72 0125 F17A 20 DB DB JSR STXROM MOS72 0135 F186 ^6A MOS72 0126 F17D ] MOS72 0135 F186 ^6A MOS72 0127 F17D ; call service routine MOS72 0135 F186 ^6A MOS72 0128 F17D 20 03 80 JSR ROMSFT ;initialise service ROM MOS72 0135 F186 ^6A MOS72 0129 F180 AA TAX MOS72 0135 F186 ^6A MOS72 0130 F181 F0 05 BEQ SVOP3 ;[service claimed, do not offer to other ROMs] MOS72 0135 F186 ^6A MOS72 0131 F183 ; MOS72 0135 F186 ^6A MOS72 0132 F183 A6 F4 LDX ROMID ;restore ROM id MOS72 0135 F186 ^6A MOS72 0133 F185 SVOP2 MOS72 0135 F186 ^6A MOS72 0134 F185 CA DEX MOS72 0135 F186 ^6A MOS72 0135 F186 10 EA BPL SVOP1 MOS72 0130 F181 v7A MOS72 0136 F188 ; X<>0 MOS72 0130 F181 v7A MOS72 0137 F188 SVOP3 ;C = return code MOS72 0130 F181 v7A MOS72 0138 F188 ; restore caller's ROMid MOS72 0130 F181 v7A MOS72 0139 F188 68 PLA -- MOS72 0140 F189 85 F4 STA ROMID -- MOS72 0141 F18B 8D 30 FE STA ROM -- MOS72 0142 F18E ; restore return code -- MOS72 0143 F18E 8A TXA ;A=0 => claimed, A<>0 => not claimed -- MOS72 0144 F18F 60 RTS -- MOS72 0145 F190 -- MOS72 0146 F190 -- MOS72 0147 F190 TTL C.F.S. Main Routines - ARGGO -- MOS72 0148 F190 OPT &01 -- MOS72 0149 F190 -- MOS72 0150 F190 -- MOS72 0151 F190 ;Returns 1 if in 1200 baud cassette -- MOS72 0152 F190 ;2 300 -- MOS72 0153 F190 ;3 if in SERROM filing system -- MOS72 0154 F190 -- MOS72 0155 F190 ;Note SPEED is 5 if in 1200 and 6 in 300 -- MOS72 0156 F190 -- MOS72 0157 F190 -- MOS72 0158 F190 ARGGO -- MOS72 0159 F190 09 00 ORAIM 0 -- MOS72 0160 F192 D0 0D BNE INTRTS ;No action on non-zero entry condition MOS72 0160 F192 v72 MOS72 0161 F194 C0 00 CPYIM &00 MOS72 0160 F192 v72 MOS72 0162 F196 D0 09 BNE INTRTS ;If handle not zero -> don't do MOS72 0160 F192 v72 MOS72 0163 F198 [ MOS125 = &FF MOS72 0160 F192 v72 MOS72 0170 F198 | MOS72 0160 F192 v72 MOS72 0171 F198 A9 03 LDAIM &03 MOS72 0160 F192 v72 MOS72 0172 F19A 2C 47 02 BIT SROMSW MOS72 0160 F192 v72 MOS72 0173 F19D D0 02 BNE INTRTS MOS72 0160 F192 v72 MOS72 0174 F19F 25 C6 AND SPEED MOS72 0160 F192 v72 MOS72 0175 F1A1 ] MOS72 MOS72 MOS72 MOS72 Acorn macro assembler Page 124 MOS72 C.F.S. Main Routines - ARGGO MOS72 MOS72 0160 F192 v72 MOS72 0176 F1A1 60 INTRTS RTS MOS72 0215 F1A4 ^7B MOS72 0177 F1A2 MOS72 0215 F1A4 ^7B MOS72 0178 F1A2 MOS72 0215 F1A4 ^7B MOS72 0179 F1A2 TTL C.F.S Main Routines - FSFUNC MOS72 0215 F1A4 ^7B MOS72 0180 F1A2 OPT &01 MOS72 0215 F1A4 ^7B MOS72 0181 F1A2 MOS72 0215 F1A4 ^7B MOS72 0182 F1A2 [ MOS125 = &FF MOS72 0215 F1A4 ^7B MOS72 0209 F1A2 | MOS72 0215 F1A4 ^7B MOS72 0210 F1A2 FSFUNC MOS72 0215 F1A4 ^7B MOS72 0211 F1A2 MOS72 0215 F1A4 ^7B MOS72 0212 F1A2 ;File system operation entry pt. MOS72 0215 F1A4 ^7B MOS72 0213 F1A2 MOS72 0215 F1A4 ^7B MOS72 0214 F1A2 C9 07 CMPIM NOTAB MOS72 0215 F1A4 ^7B MOS72 0215 F1A4 B0 FB BCS INTRTS ;Check call legal otherwise, exit -- MOS72 0216 F1A6 -- MOS72 0217 F1A6 86 BC STX TEMP -- MOS72 0218 F1A8 AA TAX ;Get address from table -- MOS72 0219 F1A9 BD F9 FB LDAAX JMPTAB +NOTAB -- MOS72 0220 F1AC 48 PHA ;push hi byte -- MOS72 0221 F1AD BD F2 FB LDAAX JMPTAB -- MOS72 0222 F1B0 48 PHA ;push lo byte -- MOS72 0223 F1B1 A6 BC LDX TEMP ;Restore argument -- MOS72 0224 F1B3 60 RTS ;enter routine -- MOS72 0225 F1B4 ] -- MOS72 0226 F1B4 -- MOS72 0227 F1B4 TTL C.F.S. Main Routines - LOAD -- MOS72 0228 F1B4 OPT &01 -- MOS72 0229 F1B4 -- MOS72 0230 F1B4 -- MOS72 0231 F1B4 ;*********** -- MOS72 0232 F1B4 ;* L O A D * -- MOS72 0233 F1B4 ;*********** -- MOS72 0234 F1B4 -- MOS72 0235 F1B4 -- MOS72 0236 F1B4 ;On entry A NZ => load from OSFILE -- MOS72 0237 F1B4 ; A =0 => load and run -- MOS72 0238 F1B4 ;Differentiating between these is necessary -- MOS72 0239 F1B4 ;so that the protection bit in the flags -- MOS72 0240 F1B4 ;byte can be checked. -- MOS72 0241 F1B4 -- MOS72 0242 F1B4 -- MOS72 0243 F1B4 [ MOS125 = &FF -- MOS72 0358 F1B4 ] -- MOS72 0359 F1B4 -- MOS72 0360 F1B4 -- MOS72 0361 F1B4 -- MOS72 0362 F1B4 TTL C.F.S. Main Routines - FILEGO -- MOS72 0363 F1B4 OPT &01 -- MOS72 0364 F1B4 -- MOS72 0365 F1B4 -- MOS72 0366 F1B4 GETFLN -- MOS72 0367 F1B4 -- MOS72 0368 F1B4 ;X/Y -> start of file name -- MOS72 0369 F1B4 -- MOS72 0370 F1B4 -- MOS72 0371 F1B4 MOVFT -- MOS72 0372 F1B4 -- MOS72 0373 F1B4 ;Moves file title from ptr. pointed to by X,Y (lo,hi) -- MOS72 0374 F1B4 ;to FILNAM. -- MOS72 0375 F1B4 -- MOS72 0376 F1B4 ; SEI -- MOS72 0377 F1B4 86 F2 STX WORK -- MOS72 0378 F1B6 84 F3 STY WORK +&01 -- MOS72 0379 F1B8 A0 00 LDYIM &00 -- MOS72 0380 F1BA 20 96 EA JSR GSINTC ;Initialise -- MOS72 0381 F1BD A2 00 LDXIM &00 -- MOS72 0382 F1BF 20 A8 EA MOVFTL JSR GSREAD MOS72 0388 F1CC ^71 MOS72 0383 F1C2 B0 0D BCS MOVFTX MOS72 0388 F1CC ^71 MOS72 0384 F1C4 F0 08 BEQ STRERR MOS72 0388 F1CC ^71 MOS72 0385 F1C6 9D D2 03 STAAX FILNAM MOS72 0388 F1CC ^71 MOS72 0386 F1C9 E8 INX MOS72 0388 F1CC ^71 MOS72 0387 F1CA E0 0B CPXIM FTSIZE MOS72 0388 F1CC ^71 MOS72 0388 F1CC D0 F1 BNE MOVFTL MOS72 0383 F1C2 v72 MOS72 0389 F1CE MOS72 0383 F1C2 v72 MOS72 0390 F1CE STRNG0 MOS72 0383 F1C2 v72 MOS72 0391 F1CE 4C 89 EA STRERR JMP BADSTR MOS72 0445 F20B ^41 MOS72 0392 F1D1 MOS72 0445 F20B ^41 MOS72 0393 F1D1 A9 00 MOVFTX LDAIM &00 MOS72 0445 F20B ^41 MOS72 0394 F1D3 9D D2 03 STAAX FILNAM MOS72 0445 F20B ^41 MOS72 0395 F1D6 ; CLI MOS72 0445 F20B ^41 MOS72 0396 F1D6 60 RTS MOS72 0445 F20B ^41 MOS72 0397 F1D7 MOS72 0445 F20B ^41 MOS72 0398 F1D7 MOS72 0445 F20B ^41 MOS72 0399 F1D7 FILEGO MOS72 0445 F20B ^41 MOS72 0400 F1D7 MOS72 0445 F20B ^41 MOS72 0401 F1D7 ;Entry here from OSFILE. MOS72 0445 F20B ^41 MOS72 0402 F1D7 MOS72 0445 F20B ^41 MOS72 0403 F1D7 48 PHA ;Store load/save indication MOS72 0445 F20B ^41 MOS72 0404 F1D8 86 C8 STX GENPTR MOS72 0445 F20B ^41 MOS72 0405 F1DA 84 C9 STY GENPTR +&01 MOS72 0445 F20B ^41 MOS72 0406 F1DC MOS72 0445 F20B ^41 MOS72 0407 F1DC A0 00 LDYIM &00 MOS72 0445 F20B ^41 MOS72 0408 F1DE B1 C8 LDAIY GENPTR MOS72 0445 F20B ^41 MOS72 0409 F1E0 AA TAX ;Set ptr. to file name for MOVFT MOS72 0445 F20B ^41 MOS72 0410 F1E1 C8 INY MOS72 0445 F20B ^41 MOS72 0411 F1E2 B1 C8 LDAIY GENPTR MOS72 0445 F20B ^41 MOS72 0412 F1E4 A8 TAY MOS72 0445 F20B ^41 MOS72 0413 F1E5 MOS72 0445 F20B ^41 MOS72 0414 F1E5 20 B4 F1 JSR MOVFT ;File title -> FILNAM MOS72 0445 F20B ^41 MOS72 0415 F1E8 A0 02 LDYIM &02 MOS72 0445 F20B ^41 MOS72 0416 F1EA B1 C8 FILELP LDAIY GENPTR MOS72 0445 F20B ^41 MOS72 0417 F1EC 99 BC 03 STAAY INFO +BKLOAD -&02 ;Set LOAD/EXEC address in header buffer MOS72 0445 F20B ^41 MOS72 0418 F1EF 99 AE 00 STAAY BKADDR -&02 ;Optional load address stored for LOAD MOS72 0445 F20B ^41 MOS72 0419 F1F2 C8 INY MOS72 0445 F20B ^41 MOS72 0420 F1F3 C0 0A CPYIM &0A ;Ten coz 2*4 + 2 initially MOS72 0445 F20B ^41 MOS72 0421 F1F5 D0 F3 BNE FILELP MOS72 0445 F20B ^41 MOS72 0422 F1F7 MOS72 0445 F20B ^41 MOS72 0423 F1F7 68 PLA MOS72 0445 F20B ^41 MOS72 0424 F1F8 [ MOS125 = &FF MOS72 0445 F20B ^41 MOS72 0429 F1F8 | MOS72 0445 F20B ^41 MOS72 0430 F1F8 D0 5D BNE FILENE MOS72 0430 F1F8 v22 MOS72 0431 F1FA ] MOS72 0430 F1F8 v22 MOS72 0432 F1FA MOS72 0430 F1F8 v22 MOS72 0433 F1FA ;Now doing save MOS72 0430 F1F8 v22 MOS72 0434 F1FA MOS72 0430 F1F8 v22 MOS72 0435 F1FA 8D C6 03 FILEL2 STA INFO +BKNOLO ;Set block number in header MOS72 0430 F1F8 v22 MOS72 0436 F1FD 8D C7 03 STA INFO +BKNOHI ;while A is zero MOS72 0430 F1F8 v22 MOS72 0437 F200 B1 C8 FILEL3 LDAIY GENPTR MOS72 0430 F1F8 v22 MOS72 0438 F202 99 A6 00 STAAY BKADDR -&0A ;BKADDR := data start MOS72 0430 F1F8 v22 MOS72 0439 F205 C8 INY ;Also sets HIADDR which MOS72 0430 F1F8 v22 MOS72 0440 F206 ;must be contiguous with BKADDR MOS72 MOS72 MOS72 MOS72 Acorn macro assembler Page 125 MOS72 C.F.S. Main Routines - FILEGO MOS72 MOS72 0430 F1F8 v22 MOS72 0441 F206 C0 12 CPYIM &12 MOS72 0430 F1F8 v22 MOS72 0442 F208 D0 F6 BNE FILEL3 MOS72 0430 F1F8 v22 MOS72 0443 F20A MOS72 0430 F1F8 v22 MOS72 0444 F20A 8A TXA ;X preserved from MOVFT MOS72 0430 F1F8 v22 MOS72 0445 F20B F0 C1 BEQ STRNG0 ;Drops through to SAVE if string OK MOS72 0430 F1F8 v22 MOS72 0446 F20D MOS72 0430 F1F8 v22 MOS72 0447 F20D MOS72 0430 F1F8 v22 MOS72 0448 F20D TTL C.F.S Main Routines - SAVE MOS72 0430 F1F8 v22 MOS72 0449 F20D OPT &01 MOS72 0430 F1F8 v22 MOS72 0450 F20D MOS72 0430 F1F8 v22 MOS72 0451 F20D ;*********** MOS72 0430 F1F8 v22 MOS72 0452 F20D ;* S A V E * MOS72 0430 F1F8 v22 MOS72 0453 F20D ;*********** MOS72 0430 F1F8 v22 MOS72 0454 F20D MOS72 0430 F1F8 v22 MOS72 0455 F20D MOS72 0430 F1F8 v22 MOS72 0456 F20D MOS72 0430 F1F8 v22 MOS72 0457 F20D ;Entry here from OSFILE call MOS72 0430 F1F8 v22 MOS72 0458 F20D MOS72 0430 F1F8 v22 MOS72 0459 F20D 20 1B FB JSR SETDEF MOS72 0430 F1F8 v22 MOS72 0460 F210 MOS72 0430 F1F8 v22 MOS72 0461 F210 20 5D F5 JSR RECORD ;Prompt and motor ON MOS72 0430 F1F8 v22 MOS72 0462 F213 MOS72 0430 F1F8 v22 MOS72 0463 F213 [ TUBESW=0 MOS72 0430 F1F8 v22 MOS72 0464 F213 A9 00 LDAIM TUBER ;initialise tube for reading MOS72 0430 F1F8 v22 MOS72 0465 F215 20 B0 FB JSR TBINIT MOS72 0430 F1F8 v22 MOS72 0466 F218 ] MOS72 0430 F1F8 v22 MOS72 0467 F218 MOS72 0430 F1F8 v22 MOS72 0468 F218 20 D5 FB JSR BUGFIX ;Put out extra char MOS72 0430 F1F8 v22 MOS72 0469 F21B MOS72 0430 F1F8 v22 MOS72 0470 F21B 38 SAVELP SEC MOS72 0430 F1F8 v22 MOS72 0471 F21C A2 FD LDXIM &FD MOS72 0430 F1F8 v22 MOS72 0472 F21E [ MOS125 = &FF MOS72 0430 F1F8 v22 MOS72 0475 F21E | MOS72 0430 F1F8 v22 MOS72 0476 F21E B5 B7 SAVEL1 LDAZX (HIADDR -&FD):AND:&FF MOS72 0430 F1F8 v22 MOS72 0477 F220 F5 B3 SBCZX (BKADDR -&FD):AND:&FF MOS72 0430 F1F8 v22 MOS72 0478 F222 ] MOS72 0430 F1F8 v22 MOS72 0479 F222 9D CB 02 STAAX INFO +BKSZEL-&FD ;Note corrupts Flags byte MOS72 0430 F1F8 v22 MOS72 0480 F225 E8 INX MOS72 0430 F1F8 v22 MOS72 0481 F226 D0 F6 BNE SAVEL1 ;Do HIADDR - BKADDR MOS72 0430 F1F8 v22 MOS72 0482 F228 A8 TAY MOS72 0430 F1F8 v22 MOS72 0483 F229 D0 0A BNE SAVEL2 ;Msb non-zero => not last block MOS72 0430 F1F8 v22 MOS72 0484 F22B MOS72 0430 F1F8 v22 MOS72 0485 F22B ;Now: IF $0100 < block size THEN block size := $0100, MOS72 0430 F1F8 v22 MOS72 0486 F22B ; not last block MOS72 0430 F1F8 v22 MOS72 0487 F22B ; ELSE last block MOS72 0430 F1F8 v22 MOS72 0488 F22B MOS72 0430 F1F8 v22 MOS72 0489 F22B [ MOS125 = &FF MOS72 0430 F1F8 v22 MOS72 0502 F22B | MOS72 0430 F1F8 v22 MOS72 0503 F22B CD C8 03 CMP INFO +BKSZEL ;Note A = X = Y = 0 MOS72 0430 F1F8 v22 MOS72 0504 F22E 2A ROLA ;if L=0 then C := (H<=1) else C := (H==0) MOS72 0430 F1F8 v22 MOS72 0505 F22F CD C9 03 CMP INFO +BKSZEH ;use constant C=1 from CMP MOS72 0430 F1F8 v22 MOS72 0506 F232 6A RORA ;A = $80 if <=$0100, A = 0 if more MOS72 0430 F1F8 v22 MOS72 0507 F233 30 08 BMI SAVEL3 ;if last block then don't clamp block size MOS72 0430 F1F8 v22 MOS72 0508 F235 SAVEL2 ;X = 0, A = Y = undefined MOS72 0430 F1F8 v22 MOS72 0509 F235 8A TXA ;clear last block flag MOS72 0430 F1F8 v22 MOS72 0510 F236 8E C8 03 STX INFO +BKSZEL ;Default block size = $0100 MOS72 0430 F1F8 v22 MOS72 0511 F239 E8 INX MOS72 0430 F1F8 v22 MOS72 0512 F23A 8E C9 03 STX INFO +BKSZEH ;Note N=0 preserved by WRBLOK MOS72 0430 F1F8 v22 MOS72 0513 F23D 8D CA 03 SAVEL3 STA INFO +BKFLAG ;WRBLOK clobbers A, X MOS72 0430 F1F8 v22 MOS72 0514 F240 ] MOS72 0430 F1F8 v22 MOS72 0515 F240 MOS72 0430 F1F8 v22 MOS72 0516 F240 20 1A F8 JSR WRBLOK ;Write out data + header MOS72 0430 F1F8 v22 MOS72 0517 F243 30 11 BMI SAVFIN ;Last block => finished MOS72 0430 F1F8 v22 MOS72 0518 F245 MOS72 0430 F1F8 v22 MOS72 0519 F245 20 5F F9 JSR ADDBKA ;Add block size to address MOS72 0430 F1F8 v22 MOS72 0520 F248 MOS72 0430 F1F8 v22 MOS72 0521 F248 EE C6 03 INC INFO +BKNOLO MOS72 0430 F1F8 v22 MOS72 0522 F24B D0 CE BNE SAVELP MOS72 0430 F1F8 v22 MOS72 0523 F24D EE C7 03 INC INFO +BKNOHI ;Inc. block no. for next time MOS72 0430 F1F8 v22 MOS72 0524 F250 D0 C9 BNE SAVELP ;Assumed always +ve MOS72 0430 F1F8 v22 MOS72 0525 F252 MOS72 0430 F1F8 v22 MOS72 0526 F252 [ MOS125 = &FF MOS72 0430 F1F8 v22 MOS72 0527 F252 | MOS72 0430 F1F8 v22 MOS72 0528 F252 OLDKEY ;force old key state MOS72 0430 F1F8 v22 MOS72 0529 F252 84 EC STY CKEY ;CKEY := 0 MOS72 0430 F1F8 v22 MOS72 0530 F254 86 ED STX OKEY ;force old key state MOS72 0430 F1F8 v22 MOS72 0531 F256 SAVFIN ;Exit from SAVE MOS72 0430 F1F8 v22 MOS72 0532 F256 60 RTS MOS72 0430 F1F8 v22 MOS72 0533 F257 MOS72 0430 F1F8 v22 MOS72 0534 F257 C9 FF FILENE CMPIM &FF MOS72 0535 F259 ^7B MOS72 0535 F259 D0 FB BNE SAVFIN -- MOS72 0536 F25B -- MOS72 0537 F25B LOADGO -- MOS72 0538 F25B -- MOS72 0539 F25B 08 PHP ;Store interrupt status -- MOS72 0540 F25C 48 PHA ;Store indication of load or load/run -- MOS72 0541 F25D 20 1B FB JSR SETDEF ;Set defaults if nesc. -- MOS72 0542 F260 -- MOS72 0543 F260 AD C2 03 LDA INFO +BKEXEC -- MOS72 0544 F263 48 PHA ;EQ=> use addr. from C.line or OSFILE -- MOS72 0545 F264 -- MOS72 0546 F264 20 62 F6 JSR SRCH0 ;Find file on tape. -- MOS72 0547 F267 LOADL6 -- MOS72 0548 F267 -- MOS72 0549 F267 68 PLA -- MOS72 0550 F268 F0 17 BEQ LOADLB ;Use load address from command line or OSFILE MOS72 0550 F268 v68 MOS72 0551 F26A MOS72 0550 F268 v68 MOS72 0552 F26A ;Move load address from OSFILE command block MOS72 0550 F268 v68 MOS72 0553 F26A ;and check if is $FFFFFFFF, in which case MOS72 0550 F268 v68 MOS72 0554 F26A ;give BAD ADDRESS error MOS72 0550 F268 v68 MOS72 0555 F26A MOS72 0550 F268 v68 MOS72 0556 F26A A2 03 LDXIM &03 MOS72 0550 F268 v68 MOS72 0557 F26C 38 SEC MOS72 0550 F268 v68 MOS72 0558 F26D LOADL1 MOS72 0550 F268 v68 MOS72 0559 F26D BD BE 03 LDAAX INFO +BKLOAD ;Address from command block MOS72 0550 F268 v68 MOS72 0560 F270 95 B0 STAAX BKADDR MOS72 0550 F268 v68 MOS72 0561 F272 90 02 BCC LOADL2 ;not ADCIM &00 as V may be in use MOS72 0550 F268 v68 MOS72 0562 F274 C9 FF CMPIM &FF MOS72 0550 F268 v68 MOS72 0563 F276 LOADL2 MOS72 0550 F268 v68 MOS72 0564 F276 CA DEX MOS72 0550 F268 v68 MOS72 0565 F277 10 F4 BPL LOADL1 MOS72 0550 F268 v68 MOS72 0566 F279 MOS72 0550 F268 v68 MOS72 0567 F279 90 06 BCC LOADLB ;If CS, all bytes are $FF => error MOS72 0550 F268 v68 MOS72 0568 F27B MOS72 0550 F268 v68 MOS72 0569 F27B 20 DC FA JSR BEEPOF ;Motor off/beep MOS72 0550 F268 v68 MOS72 0570 F27E 4C E1 E2 JMP MBADHX MOS72 0550 F268 v68 MOS72 0571 F281 MOS72 0550 F268 v68 MOS72 0572 F281 AD CA 03 LOADLB LDA INFO +BKFLAG ;Check protection bit -- MOS72 0573 F284 4A LSRA ;CS -> prot. CC -> unprot -- MOS72 0574 F285 68 PLA ;Check if loading and running -- MOS72 0575 F286 90 13 BCC LOADLA ;Not protected -> carry on MOS72 MOS72 MOS72 MOS72 Acorn macro assembler Page 126 MOS72 C.F.S Main Routines - SAVE MOS72 MOS72 0575 F286 v6C MOS72 0576 F288 F0 0C BEQ LOADLC ;Yes => carry on MOS72 0575 F286 v6C MOS72 0577 F28A MOS72 0575 F286 v6C MOS72 0578 F28A 20 E6 FA PROTER JSR CASMOF ;Turn motor off MOS72 0575 F286 v6C MOS72 0579 F28D ;Also called from RDBFER MOS72 0575 F286 v6C MOS72 0580 F28D MOS72 0575 F286 v6C MOS72 0581 F28D 00 BRK MOS72 0575 F286 v6C MOS72 0582 F28E D5 = CFSERL MOS72 0575 F286 v6C MOS72 0583 F28F 4C 6F 63 = "Locked" MOS72 0575 F286 v6C MOS72 0584 F295 00 = &00 MOS72 0575 F286 v6C MOS72 0585 F296 MOS72 0575 F286 v6C MOS72 0586 F296 LOADLC MOS72 0575 F286 v6C MOS72 0587 F296 A9 03 LDAIM &03 MOS72 0575 F286 v6C MOS72 0588 F298 8D 58 02 STA CRIT ;Loading/running & prot., so disable ESCAPE and trap BREAK MOS72 0575 F286 v6C MOS72 0589 F29B LOADLA MOS72 0575 F286 v6C MOS72 0590 F29B A9 30 LDAIM NIGBIT MOS72 0650 F2EA ^2F MOS72 0591 F29D 25 BB AND USFLGS MOS72 0650 F2EA ^2F MOS72 0592 F29F F0 04 BEQ LOADL8 ;If ignore set, just read block MOS72 0650 F2EA ^2F MOS72 0593 F2A1 A5 C1 LDA HDRCRC ;Check hdr. checksum MOS72 0650 F2EA ^2F MOS72 0594 F2A3 MOS72 0650 F2EA ^2F MOS72 0595 F2A3 ;Don't start bg job if header CRC is no good, MOS72 0650 F2EA ^2F MOS72 0596 F2A3 ;otherwise data may be loaded somewhere strange MOS72 0650 F2EA ^2F MOS72 0597 F2A3 MOS72 0650 F2EA ^2F MOS72 0598 F2A3 D0 0A BNE LOADL7 MOS72 0650 F2EA ^2F MOS72 0599 F2A5 98 LOADL8 TYA MOS72 0650 F2EA ^2F MOS72 0600 F2A6 48 PHA ;Store "Loading" flag MOS72 0650 F2EA ^2F MOS72 0601 F2A7 20 AE FB JSR TWINIT ;Initialise tube for writing if nesc. MOS72 0650 F2EA ^2F MOS72 0602 F2AA 68 PLA MOS72 0650 F2EA ^2F MOS72 0603 F2AB A8 TAY ;Restore "Loading" flag MOS72 0650 F2EA ^2F MOS72 0604 F2AC 20 03 F8 JSR RDBLOK MOS72 0650 F2EA ^2F MOS72 0605 F2AF 20 A8 F9 LOADL7 JSR LODHDR ;Print header and error msgs. MOS72 0650 F2EA ^2F MOS72 0606 F2B2 D0 33 BNE LODRTR ;=> retry MOS72 0650 F2EA ^2F MOS72 0607 F2B4 MOS72 0650 F2EA ^2F MOS72 0608 F2B4 20 5D FB JSR NXTBLK ;Next block := blk. found + 1 MOS72 0650 F2EA ^2F MOS72 0609 F2B7 2C CA 03 BIT INFO +BKFLAG MOS72 0650 F2EA ^2F MOS72 0610 F2BA 30 08 BMI LOADEX ;Just loaded last block => finish MOS72 0650 F2EA ^2F MOS72 0611 F2BC MOS72 0650 F2EA ^2F MOS72 0612 F2BC 20 5F F9 JSR ADDBKA ;Add block size to BKADDR MOS72 0650 F2EA ^2F MOS72 0613 F2BF MOS72 0650 F2EA ^2F MOS72 0614 F2BF 20 AF F7 JSR RDHEAD MOS72 0650 F2EA ^2F MOS72 0615 F2C2 D0 D7 BNE LOADLA ;Always jump MOS72 0650 F2EA ^2F MOS72 0616 F2C4 MOS72 0650 F2EA ^2F MOS72 0617 F2C4 LOADEX MOS72 0650 F2EA ^2F MOS72 0618 F2C4 [ LENSW =0 ;Alter OSFILE control block MOS72 0650 F2EA ^2F MOS72 0619 F2C4 A0 0A LDYIM &0A ;Length offset in OSFILE block MOS72 0650 F2EA ^2F MOS72 0620 F2C6 A5 CC LDA FSIZE ;File size set in PRTHDR MOS72 0650 F2EA ^2F MOS72 0621 F2C8 91 C8 STAIY GENPTR ;Note GENPTR kept from OSFILE MOS72 0650 F2EA ^2F MOS72 0622 F2CA C8 INY MOS72 0650 F2EA ^2F MOS72 0623 F2CB A5 CD LDA FSIZE + 1 MOS72 0650 F2EA ^2F MOS72 0624 F2CD 91 C8 STAIY GENPTR MOS72 0650 F2EA ^2F MOS72 0625 F2CF A9 00 LDAIM &00 ;Set high bytes of length = 0 MOS72 0650 F2EA ^2F MOS72 0626 F2D1 C8 INY MOS72 0650 F2EA ^2F MOS72 0627 F2D2 91 C8 STAIY GENPTR MOS72 0650 F2EA ^2F MOS72 0628 F2D4 C8 INY MOS72 0650 F2EA ^2F MOS72 0629 F2D5 91 C8 STAIY GENPTR MOS72 0650 F2EA ^2F MOS72 0630 F2D7 ] MOS72 0650 F2EA ^2F MOS72 0631 F2D7 MOS72 0650 F2EA ^2F MOS72 0632 F2D7 28 PLP ;Restore interrupt status MOS72 0650 F2EA ^2F MOS72 0633 F2D8 MOS72 0650 F2EA ^2F MOS72 0634 F2D8 FINOP MOS72 0650 F2EA ^2F MOS72 0635 F2D8 MOS72 0650 F2EA ^2F MOS72 0636 F2D8 20 DC FA JSR BEEPOF ;Motor OFF/BEEP MOS72 0650 F2EA ^2F MOS72 0637 F2DB MOS72 0650 F2EA ^2F MOS72 0638 F2DB 24 BA NOOLN1 BIT ERRSW ;If error taken place, already new line MOS72 0650 F2EA ^2F MOS72 0639 F2DD 30 07 BMI FINOPX MOS72 0650 F2EA ^2F MOS72 0640 F2DF 08 NOOLIN PHP MOS72 0650 F2EA ^2F MOS72 0641 F2E0 20 3A FA JSR MSGOUT MOS72 0650 F2EA ^2F MOS72 0642 F2E3 0D = MCR MOS72 0650 F2EA ^2F MOS72 0643 F2E4 00 = &00 ;Print new line if msgs on MOS72 0650 F2EA ^2F MOS72 0644 F2E5 28 PLP MOS72 0650 F2EA ^2F MOS72 0645 F2E6 60 FINOPX RTS MOS72 0650 F2EA ^2F MOS72 0646 F2E7 MOS72 0650 F2EA ^2F MOS72 0647 F2E7 MOS72 0650 F2EA ^2F MOS72 0648 F2E7 MOS72 0650 F2EA ^2F MOS72 0649 F2E7 20 68 F6 LODRTR JSR SEARCH ;Search for current block (BLOKNO) MOS72 0650 F2EA ^2F MOS72 0650 F2EA D0 AF BNE LOADLA ;Try and reload data -- MOS72 0651 F2EC ] -- MOS72 0652 F2EC -- MOS72 0653 F2EC -- MOS72 0654 F2EC TTL C.F.S. Main Routines - RUN -- MOS72 0655 F2EC OPT &01 -- MOS72 0656 F2EC -- MOS72 0657 F2EC RUN -- MOS72 0658 F2EC 20 B4 F1 JSR GETFLN -- MOS72 0659 F2EF [ MOS125 = &FF -- MOS72 0662 F2EF | -- MOS72 0663 F2EF ;initialise GENPTR as this is not an OSFILE load -- MOS72 0664 F2EF A2 C2 LDXIM FSIZE - &0A ;note value assumed nonzero -- MOS72 0665 F2F1 86 C8 STX GENPTR ;so LOADEX overwrites FSIZE with itself -- MOS72 0666 F2F3 85 C9 STA GENPTR+1 ;A=0 from GETFLN -- MOS72 0667 F2F5 8E C2 03 STX INFO +BKEXEC ;=> >0 loads file to header addr -- MOS72 0668 F2F8 ] -- MOS72 0669 F2F8 -- MOS72 0670 F2F8 ;Note, is assumed here that A = 0 from GETFLN -- MOS72 0671 F2F8 ;since LOADGO tests A -- MOS72 0672 F2F8 -- MOS72 0673 F2F8 [ MOS125 = &7F -- MOS72 0674 F2F8 [ STARGO = &00 -- MOS72 0675 F2F8 84 E6 STY CLIRY ;use temp, stack is snooped by CompROMs during LOADGO -- MOS72 0676 F2FA 20 5B F2 JSR LOADGO ;Load file from tape -- MOS72 0677 F2FD A4 E6 LDY CLIRY -- MOS72 0678 F2FF RUNGO -- MOS72 0679 F2FF 98 TYA -- MOS72 0680 F300 20 6C E0 JSR CLIXY2 ;XY = tail ptr, A = Y on entry = offset -- MOS72 0681 F303 8E D0 02 STX TAILLO ;save pointer to command line tail -- MOS72 0682 F306 C8 INY ;permute so a page of OS ROM becomes zero -- MOS72 0683 F307 8C D1 02 STY TAILHI ;marking all other addresses valid -- MOS72 0684 F30A A8 TAY ;set up registers to simulate entry from Acorn DFS -- MOS72 0685 F30B A2 FF LDXIM &FF ;from filename comparison -- MOS72 0686 F30D 38 SEC -- MOS72 0687 F30E [ TUBESW=0 -- MOS72 0688 F30E 2C 7A 02 BIT TUBE -- MOS72 0689 F311 10 0A BPL NOTUB1 ;No tube - jump to IO proc. address MOS72 0689 F311 v75 MOS72 0690 F313 MOS72 0689 F311 v75 MOS72 0691 F313 AD C4 03 LDA INFO +BKEXEC +&02 ;Check if execution address MOS72 0689 F311 v75 MOS72 0692 F316 2D C5 03 AND INFO +BKEXEC +&03 ;of file is accross tube MOS72 0689 F311 v75 MOS72 0693 F319 C9 FF CMPIM &FF MOS72 0689 F311 v75 MOS72 0694 F31B D0 05 BNE RUNL1 ;Yes, set up tube call MOS72 0689 F311 v75 MOS72 0695 F31D A9 01 NOTUB1 LDAIM &01 ;enter with A=1, X=&FF, Y=arg offset, C=1 MOS72 0694 F31B v7A MOS72 0696 F31F 6C C2 03 JMI INFO +BKEXEC ;No, just jump MOS72 0694 F31B v7A MOS72 0697 F322 MOS72 0694 F31B v7A MOS72 0698 F322 A2 C2 RUNL1 LDXIM INFO +BKEXEC ;Point to exec. address MOS72 MOS72 MOS72 MOS72 Acorn macro assembler Page 127 MOS72 C.F.S. Main Routines - RUN MOS72 -- MOS72 0699 F324 A0 03 LDYIM /(INFO +BKEXEC ) -- MOS72 0700 F326 A9 04 LDAIM TUBEX ;=> execute to tube -- MOS72 0701 F328 4C BA FB JMP TBINT1 ;Claim tube and jump to address -- MOS72 0702 F32B | -- MOS72 0705 F32B ] -- MOS72 0706 F32B | -- MOS72 0728 F32B ] -- MOS72 0729 F32B | -- MOS72 0751 F32B ] -- MOS72 0752 F32B -- MOS72 0753 F32B -- MOS72 0754 F32B TTL C.F.S Main Routines - CAT -- MOS72 0755 F32B OPT &01 -- MOS72 0756 F32B -- MOS72 0757 F32B -- MOS72 0758 F32B ;********* -- MOS72 0759 F32B ;* C A T * -- MOS72 0760 F32B ;********* -- MOS72 0761 F32B -- MOS72 0762 F32B -- MOS72 0763 F32B -- MOS72 0764 F32B CAT -- MOS72 0765 F32B -- MOS72 0766 F32B ;Entered from MOS with two args -- MOS72 0767 F32B ;in X and Y as per OPT. These are not used. -- MOS72 0768 F32B -- MOS72 0769 F32B A9 08 LDAIM CATBIT -- MOS72 0770 F32D 20 44 F3 JSR ORSTAT -- MOS72 0771 F330 20 1B FB JSR SETDEF ;Set message type etc. -- MOS72 0772 F333 A9 00 LDAIM &00 ;Indicate verify only -- MOS72 0773 F335 20 48 F3 JSR LOOK ;In CFS, will never return -- MOS72 0774 F338 ;In SFS, will return -- MOS72 0775 F338 20 F0 FA JSR RELEAS ;So in SFS release RS423 -- MOS72 0776 F33B ;NOTE - only release call outside CASMOF -- MOS72 0777 F33B -- MOS72 0778 F33B -- MOS72 0779 F33B A9 F7 CATOFF LDAIM NCTBIT -- MOS72 0780 F33D -- MOS72 0781 F33D 25 E2 ANDSTA AND CFSTAT -- MOS72 0782 F33F 85 E2 ANDSTB STA CFSTAT MOS72 0793 F346 ^77 MOS72 0783 F341 MOS72 0793 F346 ^77 MOS72 0784 F341 [ MOS125 = &FF MOS72 0793 F346 ^77 MOS72 0786 F341 ] MOS72 0793 F346 ^77 MOS72 0787 F341 60 RTS MOS72 0793 F346 ^77 MOS72 0788 F342 MOS72 0793 F346 ^77 MOS72 0789 F342 ORLST MOS72 0793 F346 ^77 MOS72 0790 F342 A9 40 LDAIM LSTBYT MOS72 0793 F346 ^77 MOS72 0791 F344 ; MOS72 0793 F346 ^77 MOS72 0792 F344 05 E2 ORSTAT ORA CFSTAT MOS72 0793 F346 ^77 MOS72 0793 F346 D0 F7 BNE ANDSTB ;Assumed always non-zero -- MOS72 0794 F348 -- MOS72 0795 F348 -- MOS72 0796 F348 -- MOS72 0797 F348 -- MOS72 0798 F348 -- MOS72 0799 F348 48 LOOK PHA -- MOS72 0800 F349 AD 47 02 LDA SROMSW -- MOS72 0801 F34C F0 08 BEQ LOOKLR ;No SFS -> don't call SFS routines MOS72 0801 F34C v77 MOS72 0802 F34E MOS72 0801 F34C v77 MOS72 0803 F34E 20 4A EE JSR SRINIT ;Initialise SERROM ptr. MOS72 0801 F34C v77 MOS72 0804 F351 [ MOS125 = &FF MOS72 0801 F34C v77 MOS72 0806 F351 ] MOS72 0801 F34C v77 MOS72 0807 F351 90 03 BCC LOOKLR MOS72 0801 F34C v77 MOS72 0808 F353 MOS72 0801 F34C v77 MOS72 0809 F353 B8 CLV ;Indicate end of rom to outside world MOS72 0801 F34C v77 MOS72 0810 F354 50 5B BVC LOOKEX MOS72 0810 F354 v24 MOS72 0811 F356 MOS72 0810 F354 v24 MOS72 0812 F356 20 AF F7 LOOKLR JSR RDHEAD MOS72 0810 F354 v24 MOS72 0813 F359 AD C6 03 LDA INFO +BKNOLO MOS72 0810 F354 v24 MOS72 0814 F35C 85 B4 STA BLOKNO MOS72 0810 F354 v24 MOS72 0815 F35E AD C7 03 LDA INFO +BKNOHI MOS72 0810 F354 v24 MOS72 0816 F361 85 B5 STA BLOKNO +&01 MOS72 0810 F354 v24 MOS72 0817 F363 A2 FF LDXIM &FF MOS72 0810 F354 v24 MOS72 0818 F365 8E DF 03 STX OLDFLG MOS72 0810 F354 v24 MOS72 0819 F368 E8 INX MOS72 0810 F354 v24 MOS72 0820 F369 86 BA STX ERRSW MOS72 0810 F354 v24 MOS72 0821 F36B F0 20 BEQ LOOKL5 ;Always new line MOS72 0810 F354 v24 MOS72 0822 F36D MOS72 0810 F354 v24 MOS72 0823 F36D [ MOS125 = &FF MOS72 0810 F354 v24 MOS72 0824 F36D | MOS72 0810 F354 v24 MOS72 0825 F36D 50 05 LOOKL4 BVC LOOKL3 ;Header interrupted MOS72 0810 F354 v24 MOS72 0826 F36F A9 FF LDAIM &FF MOS72 0810 F354 v24 MOS72 0827 F371 20 05 F8 JSR CHKBIN ;Check data MOS72 0810 F354 v24 MOS72 0828 F374 MOS72 0810 F354 v24 MOS72 0829 F374 A2 00 LOOKL3 LDXIM &00 MOS72 0810 F354 v24 MOS72 0830 F376 20 CD F9 JSR CATERR ;Print errors and header MOS72 0810 F354 v24 MOS72 0831 F379 MOS72 0810 F354 v24 MOS72 0832 F379 AD 47 02 LDA SROMSW MOS72 0810 F354 v24 MOS72 0833 F37C F0 04 BEQ LOOKL9 ;In CFS -> continue MOS72 0810 F354 v24 MOS72 0834 F37E 24 BB BIT USFLGS MOS72 0810 F354 v24 MOS72 0835 F380 50 36 BVC LOOKL8 ;=> short msgs and skip beween files MOS72 0810 F354 v24 MOS72 0836 F382 MOS72 0810 F354 v24 MOS72 0837 F382 2C CA 03 LOOKL9 BIT INFO +BKFLAG MOS72 0810 F354 v24 MOS72 0838 F385 30 34 BMI LOOKLA ;Look for block zero MOS72 0810 F354 v24 MOS72 0839 F387 ] MOS72 0810 F354 v24 MOS72 0840 F387 MOS72 0810 F354 v24 MOS72 0841 F387 20 5D FB LOOKL1 JSR NXTBLK ;Blokno := INFO +BKNO + 1 MOS72 0810 F354 v24 MOS72 0842 F38A MOS72 0810 F354 v24 MOS72 0843 F38A 20 AF F7 JSR RDHEAD ;Read header MOS72 0810 F354 v24 MOS72 0844 F38D AD 47 02 LOOKL5 LDA SROMSW MOS72 0810 F354 v24 MOS72 0845 F390 F0 02 BEQ LOOKL7 MOS72 0810 F354 v24 MOS72 0846 F392 MOS72 0810 F354 v24 MOS72 0847 F392 ;Check V from RDHEAD MOS72 0810 F354 v24 MOS72 0848 F392 MOS72 0810 F354 v24 MOS72 0849 F392 50 1D BVC LOOKEX ;In SFS and VC => end of all ROMs MOS72 0810 F354 v24 MOS72 0850 F394 MOS72 0810 F354 v24 MOS72 0851 F394 68 LOOKL7 PLA MOS72 0810 F354 v24 MOS72 0852 F395 48 PHA ;Check if just verifying MOS72 0810 F354 v24 MOS72 0853 F396 F0 D5 BEQ LOOKL4 ;If just verifying, continue MOS72 0810 F354 v24 MOS72 0854 F398 20 66 FA JSR CMPFT ;Otherwise, check file titles MOS72 0810 F354 v24 MOS72 0855 F39B D0 16 BNE LOOKL2 ;Not the same, continue MOS72 0810 F354 v24 MOS72 0856 F39D A9 30 LDAIM NIGBIT MOS72 0810 F354 v24 MOS72 0857 F39F 25 BB AND USFLGS MOS72 0810 F354 v24 MOS72 0858 F3A1 F0 0E BEQ LOOKEX ;If ignore set, just exit MOS72 0810 F354 v24 MOS72 0859 F3A3 MOS72 0810 F354 v24 MOS72 0860 F3A3 AD C6 03 LDA INFO +BKNOLO ;Otherwise, check block no. MOS72 0810 F354 v24 MOS72 0861 F3A6 C5 B6 CMP SRCHBK MOS72 0810 F354 v24 MOS72 0862 F3A8 D0 09 BNE LOOKL2 ;Not found ... MOS72 0810 F354 v24 MOS72 0863 F3AA AD C7 03 LDA INFO +BKNOHI MOS72 0810 F354 v24 MOS72 0864 F3AD C5 B7 CMP SRCHBK +&01 MOS72 0810 F354 v24 MOS72 0865 F3AF D0 02 BNE LOOKL2 MOS72 MOS72 MOS72 MOS72 Acorn macro assembler Page 128 MOS72 C.F.S Main Routines - CAT MOS72 MOS72 0810 F354 v24 MOS72 0866 F3B1 68 LOOKEX PLA MOS72 0881 F3B6 ^35 MOS72 0867 F3B2 MOS72 0881 F3B6 ^35 MOS72 0868 F3B2 ;On exit, V indicates in CFS if header MOS72 0881 F3B6 ^35 MOS72 0869 F3B2 ;interrupted by DCD. In SFS, indicates MOS72 0881 F3B6 ^35 MOS72 0870 F3B2 ;if end of ROM filing system reached. MOS72 0881 F3B6 ^35 MOS72 0871 F3B2 MOS72 0881 F3B6 ^35 MOS72 0872 F3B2 60 RTS MOS72 0881 F3B6 ^35 MOS72 0873 F3B3 MOS72 0881 F3B6 ^35 MOS72 0874 F3B3 LOOKL2 MOS72 0881 F3B6 ^35 MOS72 0875 F3B3 MOS72 0881 F3B6 ^35 MOS72 0876 F3B3 ;Here, file not recognised. In CFS, just MOS72 0881 F3B6 ^35 MOS72 0877 F3B3 ;carry on reading next block. In SFS, MOS72 0881 F3B6 ^35 MOS72 0878 F3B3 ;skip to block zero of next file. MOS72 0881 F3B6 ^35 MOS72 0879 F3B3 MOS72 0881 F3B6 ^35 MOS72 0880 F3B3 AD 47 02 LDA SROMSW MOS72 0881 F3B6 ^35 MOS72 0881 F3B6 F0 B5 BEQ LOOKL4 ;In CFS, carry on MOS72 0886 F3C3 ^42 MOS72 0882 F3B8 20 E7 EE LOOKL8 JSR SRSKIP ;Not recognised => skip MOS72 0886 F3C3 ^42 MOS72 0883 F3BB A9 FF LOOKLA LDAIM &FF MOS72 0886 F3C3 ^42 MOS72 0884 F3BD 8D C6 03 STA INFO +BKNOLO ;Look for block zero of next file MOS72 0886 F3C3 ^42 MOS72 0885 F3C0 8D C7 03 STA INFO +BKNOHI MOS72 0886 F3C3 ^42 MOS72 0886 F3C3 D0 C2 BNE LOOKL1 -- MOS72 0887 F3C5 -- MOS72 0888 F3C5 [ MOS125 = &FF -- MOS72 0904 F3C5 ] -- MOS72 0905 F3C5 -- MOS72 0906 F3C5 -- MOS72 0907 F3C5 TTL C.F.S Main Routines - FIND -- MOS72 0908 F3C5 OPT &01 -- MOS72 0909 F3C5 -- MOS72 0910 F3C5 ;****** SEQUENTIAL ACCESS ****** -- MOS72 0911 F3C5 -- MOS72 0912 F3C5 -- MOS72 0913 F3C5 -- MOS72 0914 F3C5 ;*********** -- MOS72 0915 F3C5 ;* F I N D * -- MOS72 0916 F3C5 ;*********** -- MOS72 0917 F3C5 -- MOS72 0918 F3C5 -- MOS72 0919 F3C5 FIND ;FIND -- MOS72 0920 F3C5 -- MOS72 0921 F3C5 -- MOS72 0922 F3C5 ;Entered from OSFIND: -- MOS72 0923 F3C5 -- MOS72 0924 F3C5 ;A NZ => open -- MOS72 0925 F3C5 ;b6 => file already exists and opened for read/ud -- MOS72 0926 F3C5 ;A EQ => shut -- MOS72 0927 F3C5 -- MOS72 0928 F3C5 ;For open: X,Y -> file name lo,hi -- MOS72 0929 F3C5 -- MOS72 0930 F3C5 ;For shut: Y = handle. If zero, all files shut. -- MOS72 0931 F3C5 -- MOS72 0932 F3C5 -- MOS72 0933 F3C5 -- MOS72 0934 F3C5 85 BC STA TEMP -- MOS72 0935 F3C7 8A TXA -- MOS72 0936 F3C8 48 PHA -- MOS72 0937 F3C9 98 TYA -- MOS72 0938 F3CA 48 PHA -- MOS72 0939 F3CB A5 BC LDA TEMP -- MOS72 0940 F3CD D0 1E BNE FINDON MOS72 0940 F3CD v61 MOS72 0941 F3CF MOS72 0940 F3CD v61 MOS72 0942 F3CF 98 TYA MOS72 0940 F3CD v61 MOS72 0943 F3D0 D0 0C BNE SHUTL1 ;Y non-zero => shut one file MOS72 0940 F3CD v61 MOS72 0944 F3D2 ; MOS72 0940 F3CD v61 MOS72 0945 F3D2 20 EF E2 JSR SHUTES ;shut EXEC and SPOOL files opened by CFS MOS72 0940 F3CD v61 MOS72 0946 F3D5 20 73 F4 JSR SHUTW ;Else shut write file MOS72 0940 F3CD v61 MOS72 0947 F3D8 ; Shut read file and exit MOS72 0940 F3CD v61 MOS72 0948 F3D8 46 E2 SHUTR LSR CFSTAT MOS72 0940 F3CD v61 MOS72 0949 F3DA 06 E2 ASL CFSTAT ;Note assumes input bit = b0 MOS72 0940 F3CD v61 MOS72 0950 F3DC ; C=0 MOS72 0940 F3CD v61 MOS72 0951 F3DC 90 0C BCC JFINDEX ;[ALWAYS jump] MOS72 0940 F3CD v61 MOS72 0952 F3DE ; MOS72 0940 F3CD v61 MOS72 0953 F3DE ; MOS72 0940 F3CD v61 MOS72 0954 F3DE 4A SHUTL1 LSRA MOS72 0940 F3CD v61 MOS72 0955 F3DF B0 F7 BCS SHUTR ;Shut input file MOS72 0940 F3CD v61 MOS72 0956 F3E1 4A LSRA MOS72 0940 F3CD v61 MOS72 0957 F3E2 B0 03 BCS SHUTL2 ;Shut output file MOS72 0940 F3CD v61 MOS72 0958 F3E4 MOS72 0940 F3CD v61 MOS72 0959 F3E4 4C A4 FB JMP HNDERR ;Invalid handle MOS72 0940 F3CD v61 MOS72 0960 F3E7 MOS72 0940 F3CD v61 MOS72 0961 F3E7 20 73 F4 SHUTL2 JSR SHUTW MOS72 0940 F3CD v61 MOS72 0962 F3EA JFINDEX MOS72 0940 F3CD v61 MOS72 0963 F3EA 4C 6C F4 JMP FINDEX MOS72 0940 F3CD v61 MOS72 0964 F3ED MOS72 0940 F3CD v61 MOS72 0965 F3ED MOS72 0940 F3CD v61 MOS72 0966 F3ED MOS72 0940 F3CD v61 MOS72 0967 F3ED 20 B4 F1 FINDON JSR MOVFT -- MOS72 0968 F3F0 -- MOS72 0969 F3F0 24 BC BIT TEMP -- MOS72 0970 F3F2 50 3D BVC FINDO ;Find for output if b.6 = 0 MOS72 0970 F3F2 v42 MOS72 0971 F3F4 MOS72 0970 F3F2 v42 MOS72 0972 F3F4 ;Opening files already open MOS72 0970 F3F2 v42 MOS72 0973 F3F4 ;is the same as if not already open MOS72 0970 F3F2 v42 MOS72 0974 F3F4 MOS72 0970 F3F2 v42 MOS72 0975 F3F4 MOS72 0970 F3F2 v42 MOS72 0976 F3F4 ;Open for reading MOS72 0970 F3F2 v42 MOS72 0977 F3F4 ;Set handle and read in first buffer MOS72 0970 F3F2 v42 MOS72 0978 F3F4 MOS72 0970 F3F2 v42 MOS72 0979 F3F4 A9 00 LDAIM &00 MOS72 0970 F3F2 v42 MOS72 0980 F3F6 8D 9E 03 STA INPTR ;Set buffer ptr. := 0 MOS72 0970 F3F2 v42 MOS72 0981 F3F9 8D DD 03 STA NEXTIN MOS72 0970 F3F2 v42 MOS72 0982 F3FC 8D DE 03 STA NEXTIN +&01 ;Set expected block := 0 MOS72 0970 F3F2 v42 MOS72 0983 F3FF MOS72 0970 F3F2 v42 MOS72 0984 F3FF A9 3E LDAIM NECBIT ;End of file/last byte unset/input file closed MOS72 0970 F3F2 v42 MOS72 0985 F401 20 3D F3 JSR ANDSTA MOS72 0970 F3F2 v42 MOS72 0986 F404 MOS72 0970 F3F2 v42 MOS72 0987 F404 20 0E FB JSR SETSDF ;Set seq. access default MOS72 0970 F3F2 v42 MOS72 0988 F407 MOS72 0970 F3F2 v42 MOS72 0989 F407 08 PHP ;Store interrupt status MOS72 0970 F3F2 v42 MOS72 0990 F408 20 62 F6 JSR SRCH0 ;Find file, first block. MOS72 0970 F3F2 v42 MOS72 0991 F40B 20 EA F6 JSR RDBFRS ;Check hdr. read ok, and get first bfr. MOS72 0970 F3F2 v42 MOS72 0992 F40E 28 PLP ;Restore interrupt status MOS72 0970 F3F2 v42 MOS72 0993 F40F MOS72 0970 F3F2 v42 MOS72 0994 F40F A2 FF LDXIM &FF MOS72 0970 F3F2 v42 MOS72 0995 F411 E8 FINDL5 INX ;Make file name found = file name MOS72 0970 F3F2 v42 MOS72 0996 F412 BD B2 03 LDAAX INFO ;for subsequent block reads MOS72 0970 F3F2 v42 MOS72 0997 F415 9D A7 03 STAAX INFILE ;so that OPENIN "" locks onto one filet block. MOS72 0970 F3F2 v42 MOS72 0998 F418 D0 F7 BNE FINDL5 MOS72 0970 F3F2 v42 MOS72 0999 F41A MOS72 0970 F3F2 v42 MOS72 1000 F41A A9 01 LDAIM INOPEN MOS72 0970 F3F2 v42 MOS72 1001 F41C 20 44 F3 JSR ORSTAT MOS72 MOS72 MOS72 MOS72 Acorn macro assembler Page 129 MOS72 C.F.S Main Routines - FIND MOS72 MOS72 0970 F3F2 v42 MOS72 1002 F41F AD EA 02 LDA INBSZE MOS72 0970 F3F2 v42 MOS72 1003 F422 0D EB 02 ORA INBSZE +&01 MOS72 0970 F3F2 v42 MOS72 1004 F425 D0 03 BNE FINDL6 ;If non-empty, don't worry MOS72 0970 F3F2 v42 MOS72 1005 F427 20 42 F3 JSR ORLST ;Otherwise, at end of file MOS72 0970 F3F2 v42 MOS72 1006 F42A MOS72 0970 F3F2 v42 MOS72 1007 F42A A9 01 FINDL6 LDAIM INHAND MOS72 0970 F3F2 v42 MOS72 1008 F42C 0D 47 02 ORA SROMSW ;If in SFS, return 3 MOS72 0970 F3F2 v42 MOS72 1009 F42F D0 39 BNE OPENEX ;Return input handle MOS72 0970 F3F2 v42 MOS72 1010 F431 MOS72 0970 F3F2 v42 MOS72 1011 F431 MOS72 0970 F3F2 v42 MOS72 1012 F431 MOS72 0970 F3F2 v42 MOS72 1013 F431 8A FINDO TXA ;Can't openout "" MOS72 1009 F42F v46 MOS72 1014 F432 D0 03 BNE FINABC MOS72 1009 F42F v46 MOS72 1015 F434 4C 89 EA JMP BADSTR MOS72 1009 F42F v46 MOS72 1016 F437 MOS72 1009 F42F v46 MOS72 1017 F437 A2 FF FINABC LDXIM &FF MOS72 1009 F42F v46 MOS72 1018 F439 E8 FINDL2 INX MOS72 1009 F42F v46 MOS72 1019 F43A BD D2 03 LDAAX FILNAM ;Store output file name MOS72 1009 F42F v46 MOS72 1020 F43D 9D 80 03 STAAX OUTHDR MOS72 1009 F42F v46 MOS72 1021 F440 D0 F7 BNE FINDL2 MOS72 1009 F42F v46 MOS72 1022 F442 MOS72 1009 F42F v46 MOS72 1023 F442 A9 FF LDAIM &FF MOS72 1009 F42F v46 MOS72 1024 F444 A2 08 LDXIM &08 MOS72 1009 F42F v46 MOS72 1025 F446 9D 8B 03 FINDL4 STAAX OUTHDR +BKLOAD -&01 MOS72 1009 F42F v46 MOS72 1026 F449 CA DEX MOS72 1009 F42F v46 MOS72 1027 F44A D0 FA BNE FINDL4 ;Set load/EXEC address to default value MOS72 1009 F42F v46 MOS72 1028 F44C MOS72 1009 F42F v46 MOS72 1029 F44C 8A TXA MOS72 1009 F42F v46 MOS72 1030 F44D A2 14 LDXIM BKNOLO MOS72 1009 F42F v46 MOS72 1031 F44F MOS72 1009 F42F v46 MOS72 1032 F44F ;Set block no./block len./last bk. =0 MOS72 1009 F42F v46 MOS72 1033 F44F ;Note also sets OUTPTR which must MOS72 1009 F42F v46 MOS72 1034 F44F ;be contiguous with OUTHDR MOS72 1009 F42F v46 MOS72 1035 F44F MOS72 1009 F42F v46 MOS72 1036 F44F 9D 80 03 FINDL3 STAAX OUTHDR MOS72 1009 F42F v46 MOS72 1037 F452 E8 INX MOS72 1009 F42F v46 MOS72 1038 F453 E0 1E CPXIM BKLAST +&01 MOS72 1009 F42F v46 MOS72 1039 F455 D0 F8 BNE FINDL3 ;Note carry set MOS72 1009 F42F v46 MOS72 1040 F457 2E 97 03 ROL OUTHDR +BKSZEH ;Set hi byte of size MOS72 1009 F42F v46 MOS72 1041 F45A MOS72 1009 F42F v46 MOS72 1042 F45A 20 1B FB JSR SETDEF ;If default, print prompt MOS72 1009 F42F v46 MOS72 1043 F45D 20 5D F5 JSR RECORD MOS72 1009 F42F v46 MOS72 1044 F460 20 E6 FA JSR CASMOF ;OFF for putbyte call MOS72 1009 F42F v46 MOS72 1045 F463 MOS72 1009 F42F v46 MOS72 1046 F463 A9 02 LDAIM OUTOPN MOS72 1009 F42F v46 MOS72 1047 F465 20 44 F3 JSR ORSTAT ;Indicate file open for output MOS72 1009 F42F v46 MOS72 1048 F468 MOS72 1009 F42F v46 MOS72 1049 F468 A9 02 LDAIM OUTHND MOS72 1009 F42F v46 MOS72 1050 F46A MOS72 1009 F42F v46 MOS72 1051 F46A 85 BC OPENEX STA TEMP -- MOS72 1052 F46C FINDEX ;Common exit for PUT/GETBYTE and FIND -- MOS72 1053 F46C 68 GBEXX PLA -- MOS72 1054 F46D A8 TAY -- MOS72 1055 F46E 68 PLA -- MOS72 1056 F46F AA TAX -- MOS72 1057 F470 A5 BC LDA TEMP -- MOS72 1058 F472 FINDXX -- MOS72 1059 F472 60 RTS MOS72 1070 F477 ^79 MOS72 1060 F473 MOS72 1070 F477 ^79 MOS72 1061 F473 MOS72 1070 F477 ^79 MOS72 1062 F473 MOS72 1070 F477 ^79 MOS72 1063 F473 MOS72 1070 F477 ^79 MOS72 1064 F473 MOS72 1070 F477 ^79 MOS72 1065 F473 MOS72 1070 F477 ^79 MOS72 1066 F473 SHUTW MOS72 1070 F477 ^79 MOS72 1067 F473 MOS72 1070 F477 ^79 MOS72 1068 F473 A9 02 LDAIM OUTHND MOS72 1070 F477 ^79 MOS72 1069 F475 25 E2 AND CFSTAT MOS72 1070 F477 ^79 MOS72 1070 F477 F0 F9 BEQ FINDXX ;If already shut, dont bother -- MOS72 1071 F479 -- MOS72 1072 F479 A9 00 LDAIM &00 -- MOS72 1073 F47B 8D 97 03 STA OUTHDR +BKSZEH -- MOS72 1074 F47E -- MOS72 1075 F47E A9 80 LDAIM LASTBK -- MOS72 1076 F480 AE 9D 03 LDX OUTPTR -- MOS72 1077 F483 8E 96 03 STX OUTHDR +BKSZEL -- MOS72 1078 F486 8D 98 03 STA OUTHDR +BKFLAG -- MOS72 1079 F489 20 91 F4 JSR WRTBFR ;Write out block -- MOS72 1080 F48C A9 FD LDAIM NOUTHD -- MOS72 1081 F48E 4C 3D F3 JMP ANDSTA ;Mark file as closed -- MOS72 1082 F491 -- MOS72 1083 F491 -- MOS72 1084 F491 WRTBFR ;Write out buffer -- MOS72 1085 F491 -- MOS72 1086 F491 20 0E FB JSR SETSDF ;Set sequential defaults -- MOS72 1087 F494 -- MOS72 1088 F494 A2 11 LDXIM BKLAST -BKLOAD -- MOS72 1089 F496 BD 8C 03 WRTBL3 LDAAX OUTHDR +BKLOAD MOS72 1092 F49D ^77 MOS72 1090 F499 9D BE 03 STAAX INFO +BKLOAD MOS72 1092 F49D ^77 MOS72 1091 F49C CA DEX MOS72 1092 F49D ^77 MOS72 1092 F49D 10 F7 BPL WRTBL3 -- MOS72 1093 F49F -- MOS72 1094 F49F ; Set buffer address for WBLOCK call -- MOS72 1095 F49F -- MOS72 1096 F49F 86 B2 STX BKADDR +&02 -- MOS72 1097 F4A1 86 B3 STX BKADDR +&03 ;Output buffer is in IO proc. -- MOS72 1098 F4A3 -- MOS72 1099 F4A3 0000 T * OUTBFR:SHL: 8 -- MOS72 1100 F4A3 [ T=0 -- MOS72 1101 F4A3 E8 INX -- MOS72 1102 F4A4 86 B0 STX BKADDR ;If OUTBFR on page boundary, set lo byte = 0 -- MOS72 1103 F4A6 | -- MOS72 1106 F4A6 ] -- MOS72 1107 F4A6 -- MOS72 1108 F4A6 A9 09 LDAIM /(OUTBFR ) -- MOS72 1109 F4A8 85 B1 STA BKADDR +&01 -- MOS72 1110 F4AA -- MOS72 1111 F4AA A2 7F LDXIM OUTHDR -&01 -- MOS72 1112 F4AC 20 77 FB JSR MOVFN ;File name -> FILNAM etc. -- MOS72 1113 F4AF 8D DF 03 STA OLDFLG -- MOS72 1114 F4B2 -- MOS72 1115 F4B2 20 84 FB JSR MOTONW ;Motor on and select output drive -- MOS72 1116 F4B5 20 D5 FB JSR BUGFIX -- MOS72 1117 F4B8 20 1A F8 JSR WBLOCK ;Write out block -- MOS72 1118 F4BB EE 94 03 INC OUTHDR +BKNOLO ;Next block -- MOS72 1119 F4BE D0 03 BNE WRTBL4 MOS72 1119 F4BE v7C MOS72 1120 F4C0 EE 95 03 INC OUTHDR +BKNOHI MOS72 1119 F4BE v7C MOS72 1121 F4C3 60 WRTBL4 RTS -- MOS72 1122 F4C4 -- MOS72 1123 F4C4 -- MOS72 1124 F4C4 MOS72 MOS72 MOS72 MOS72 Acorn macro assembler Page 130 MOS72 C.F.S Main Routines - FIND MOS72 -- MOS72 1125 F4C4 -- MOS72 1126 F4C4 -- MOS72 1127 F4C4 -- MOS72 1128 F4C4 -- MOS72 1129 F4C4 -- MOS72 1130 F4C4 TTL C.F.S. Main Routines - GETBYTE -- MOS72 1131 F4C4 OPT &01 -- MOS72 1132 F4C4 -- MOS72 1133 F4C4 -- MOS72 1134 F4C4 ;****************** -- MOS72 1135 F4C4 ;* G E T B Y T E * -- MOS72 1136 F4C4 ;****************** -- MOS72 1137 F4C4 -- MOS72 1138 F4C4 -- MOS72 1139 F4C4 GETBYT -- MOS72 1140 F4C4 -- MOS72 1141 F4C4 8A TXA -- MOS72 1142 F4C5 48 PHA -- MOS72 1143 F4C6 98 TYA -- MOS72 1144 F4C7 48 PHA -- MOS72 1145 F4C8 A9 01 LDAIM INHAND -- MOS72 1146 F4CA 20 92 FB JSR CHKHND ;Is handle open ? -- MOS72 1147 F4CD -- MOS72 1148 F4CD A5 E2 LDA CFSTAT -- MOS72 1149 F4CF 0A ASLA -- MOS72 1150 F4D0 B0 4F BCS GBEOF ;=> Going past end of file MOS72 1150 F4D0 v30 MOS72 1151 F4D2 0A ASLA MOS72 1150 F4D0 v30 MOS72 1152 F4D3 90 09 BCC GBLF ;=> Not getting last byte MOS72 1150 F4D0 v30 MOS72 1153 F4D5 MOS72 1150 F4D0 v30 MOS72 1154 F4D5 ;Here indicate next GB call MOS72 1150 F4D0 v30 MOS72 1155 F4D5 ;goes off end of file MOS72 1150 F4D0 v30 MOS72 1156 F4D5 MOS72 1150 F4D0 v30 MOS72 1157 F4D5 A9 80 LDAIM EOFBIT MOS72 1150 F4D0 v30 MOS72 1158 F4D7 20 44 F3 JSR ORSTAT MOS72 1150 F4D0 v30 MOS72 1159 F4DA MOS72 1150 F4D0 v30 MOS72 1160 F4DA ;Carry still set from above MOS72 1150 F4D0 v30 MOS72 1161 F4DA MOS72 1150 F4D0 v30 MOS72 1162 F4DA A9 FE LDAIM ENDBYT ;Byte after end of file MOS72 1150 F4D0 v30 MOS72 1163 F4DC B0 38 BCS GBEXY MOS72 1150 F4D0 v30 MOS72 1164 F4DE MOS72 1150 F4D0 v30 MOS72 1165 F4DE AE 9E 03 GBLF LDX INPTR MOS72 1150 F4D0 v30 MOS72 1166 F4E1 E8 INX MOS72 1150 F4D0 v30 MOS72 1167 F4E2 EC EA 02 CPX INBSZE ;Is last byte of buffer ? MOS72 1150 F4D0 v30 MOS72 1168 F4E5 D0 2A BNE GBLDE ;Nope -> continue MOS72 1150 F4D0 v30 MOS72 1169 F4E7 MOS72 1150 F4D0 v30 MOS72 1170 F4E7 MOS72 1150 F4D0 v30 MOS72 1171 F4E7 2C EC 02 BIT BUFFLG ;Check if in last block. If so, are reading MOS72 1150 F4D0 v30 MOS72 1172 F4EA 30 22 BMI GBLH ;last byte of last block => exit MOS72 1150 F4D0 v30 MOS72 1173 F4EC MOS72 1150 F4D0 v30 MOS72 1174 F4EC ;Read last byte of block. NOTE this is kept in a location MOS72 1150 F4D0 v30 MOS72 1175 F4EC ;separate from the rest of the block buffer, so that if the MOS72 1150 F4D0 v30 MOS72 1176 F4EC ;next block being read aborts and corrupts the block buffer, MOS72 1150 F4D0 v30 MOS72 1177 F4EC ;a subsequent retry will still provide the last byte of the MOS72 1150 F4D0 v30 MOS72 1178 F4EC ;previous block. The variable FINBYT is updated in RDBFER after MOS72 1150 F4D0 v30 MOS72 1179 F4EC ;the background block read has succesfully completed. MOS72 1150 F4D0 v30 MOS72 1180 F4EC MOS72 1150 F4D0 v30 MOS72 1181 F4EC AD ED 02 LDA FINBYT MOS72 1150 F4D0 v30 MOS72 1182 F4EF 48 PHA ;Store final byte of this block MOS72 1150 F4D0 v30 MOS72 1183 F4F0 20 0E FB JSR SETSDF ;Set sequential defaults MOS72 1150 F4D0 v30 MOS72 1184 F4F3 08 PHP ;Store I'rupt status MOS72 1150 F4D0 v30 MOS72 1185 F4F4 20 E2 F6 JSR RDBFER ;Read buffer for next GETBYTE call MOS72 1150 F4D0 v30 MOS72 1186 F4F7 28 PLP ;Restore I'rupt status MOS72 1150 F4D0 v30 MOS72 1187 F4F8 68 PLA ;Restore final byte of previous buffer MOS72 1150 F4D0 v30 MOS72 1188 F4F9 85 BC STA TEMP ;Store for later use MOS72 1150 F4D0 v30 MOS72 1189 F4FB MOS72 1150 F4D0 v30 MOS72 1190 F4FB 18 CLC ;Prepare for non-end of file exit MOS72 1150 F4D0 v30 MOS72 1191 F4FC 2C EC 02 BIT BUFFLG MOS72 1150 F4D0 v30 MOS72 1192 F4FF 10 17 BPL GBEXIT ;Exit, result = TEMP, carry clear MOS72 1150 F4D0 v30 MOS72 1193 F501 MOS72 1150 F4D0 v30 MOS72 1194 F501 AD EA 02 LDA INBSZE ;If here, is last block MOS72 1150 F4D0 v30 MOS72 1195 F504 0D EB 02 ORA INBSZE +&01 MOS72 1150 F4D0 v30 MOS72 1196 F507 D0 0F BNE GBEXIT ;Last block, is not empty MOS72 1150 F4D0 v30 MOS72 1197 F509 20 42 F3 JSR ORLST ;If is last block, and empty MOS72 1150 F4D0 v30 MOS72 1198 F50C D0 0A BNE GBEXIT ;then this is the last byte MOS72 1150 F4D0 v30 MOS72 1199 F50E ;So set last byte bit and exit, C = 0 MOS72 1150 F4D0 v30 MOS72 1200 F50E MOS72 1150 F4D0 v30 MOS72 1201 F50E GBLH MOS72 1150 F4D0 v30 MOS72 1202 F50E 20 42 F3 JSR ORLST ;Otherwise, reading last byte. MOS72 1150 F4D0 v30 MOS72 1203 F511 MOS72 1150 F4D0 v30 MOS72 1204 F511 ;So exit, carry clear MOS72 1150 F4D0 v30 MOS72 1205 F511 MOS72 1150 F4D0 v30 MOS72 1206 F511 CA GBLDE DEX MOS72 1150 F4D0 v30 MOS72 1207 F512 18 CLC ;Carry clear unless byte AFTER last byte of file MOS72 1150 F4D0 v30 MOS72 1208 F513 BD 00 0A LDAAX INBUFR ;GET BYTE ! MOS72 1150 F4D0 v30 MOS72 1209 F516 85 BC GBEXY STA TEMP MOS72 1150 F4D0 v30 MOS72 1210 F518 EE 9E 03 GBEXIT INC INPTR ;Inc. buffer ptr. for next time MOS72 1150 F4D0 v30 MOS72 1211 F51B 4C 6C F4 JMP GBEXX ;Share exit with PUTBYT MOS72 1150 F4D0 v30 MOS72 1212 F51E MOS72 1150 F4D0 v30 MOS72 1213 F51E [ MOS125 = &FF MOS72 1150 F4D0 v30 MOS72 1214 F51E | MOS72 1150 F4D0 v30 MOS72 1215 F51E COPYR ;here to save a byte MOS72 1150 F4D0 v30 MOS72 1216 F51E 29 = ")" MOS72 1150 F4D0 v30 MOS72 1217 F51F 43 = "C" MOS72 1150 F4D0 v30 MOS72 1218 F520 28 = "(" ;BRK forms terminator MOS72 1150 F4D0 v30 MOS72 1219 F521 ] MOS72 1150 F4D0 v30 MOS72 1220 F521 MOS72 1150 F4D0 v30 MOS72 1221 F521 00 GBEOF BRK -- MOS72 1222 F522 DF = CFSERD -- MOS72 1223 F523 45 = "E" -- MOS72 1224 F524 4F = "O" -- MOS72 1225 F525 46 = "F" -- MOS72 1226 F526 00 = &00 -- MOS72 1227 F527 -- MOS72 1228 F527 TTL C.F.S. Main Routines - PUTBYTE -- MOS72 1229 F527 OPT &01 -- MOS72 1230 F527 -- MOS72 1231 F527 -- MOS72 1232 F527 ;****************** -- MOS72 1233 F527 ;* P U T B Y T E * -- MOS72 1234 F527 ;****************** -- MOS72 1235 F527 -- MOS72 1236 F527 -- MOS72 1237 F527 [ MOS125 = &FF -- MOS72 1268 F527 | -- MOS72 1269 F527 PUTBYT -- MOS72 1270 F527 -- MOS72 1271 F527 ;Note, IADDR not used in this -- MOS72 1272 F527 ;function coz RX interrupts are "disabled" -- MOS72 1273 F527 ;by TXFLAG (see IRUPT) -- MOS72 1274 F527 -- MOS72 1275 F527 48 PHA MOS72 MOS72 MOS72 MOS72 Acorn macro assembler Page 131 MOS72 C.F.S. Main Routines - PUTBYTE MOS72 -- MOS72 1276 F528 8A TXA -- MOS72 1277 F529 48 PHA -- MOS72 1278 F52A 98 TYA -- MOS72 1279 F52B 48 PHA -- MOS72 1280 F52C A9 02 LDAIM OUTHND -- MOS72 1281 F52E 20 92 FB JSR CHKHND ;Check handle open -- MOS72 1282 F531 -- MOS72 1283 F531 BA TSX -- MOS72 1284 F532 BD 03 01 LDAAX &0103 -- MOS72 1285 F535 AE 9D 03 LDX OUTPTR -- MOS72 1286 F538 9D 00 09 STAAX OUTBFR -- MOS72 1287 F53B E8 INX -- MOS72 1288 F53C D0 06 BNE PBEXIT ;Test if last byte of buffer MOS72 1288 F53C v79 MOS72 1289 F53E 20 91 F4 JSR WRTBFR ;Buffer full, write out. MOS72 1288 F53C v79 MOS72 1290 F541 20 E6 FA JSR CASMOF MOS72 1288 F53C v79 MOS72 1291 F544 MOS72 1288 F53C v79 MOS72 1292 F544 EE 9D 03 PBEXIT INC OUTPTR -- MOS72 1293 F547 -- MOS72 1294 F547 ;Increment pointer after writing block out so that -- MOS72 1295 F547 ;user can retry if block is interrupted -- MOS72 1296 F547 ;by ESCAPE. -- MOS72 1297 F547 -- MOS72 1298 F547 4C 6A E1 JMP PLYXAR -- MOS72 1299 F54A ;and now IADDR is not used at all. -- MOS72 1300 F54A ] -- MOS72 1301 F54A -- MOS72 1302 F54A -- MOS72 1303 F54A -- MOS72 1304 F54A -- MOS72 1305 F54A LNK MOS74 -- MOS74 0001 F54A -- MOS74 0002 F54A ;File - MOS74 -- MOS74 0003 F54A -- MOS74 0004 F54A TTL C.F.S Main Routines - OPT -- MOS74 0005 F54A OPT &01 -- MOS74 0006 F54A -- MOS74 0007 F54A [ MOS125 = &FF -- MOS74 0037 F54A | -- MOS74 0038 F54A HELP ;*HELP command -- MOS74 0039 F54A A2 09 LDXIM SVHELP -- MOS74 0040 F54C 20 6C F1 JSR SVOP ;Y = offset within line of arguments -- MOS74 0041 F54F ; -- MOS74 0042 F54F ; Y preserved, therefore Y>=2 on return -- MOS74 0043 F54F ; -- MOS74 0044 F54F ;STROUT uses FTPTR, clobbered during OSASCI->OSBPUT -- MOS74 0045 F54F A9 0D LDAIM MCR ;start by printing CR -- MOS74 0046 F551 A8 TAY ;initialise offset -- MOS74 0047 F552 20 E3 FF HELOP JSR OSASCI MOS74 0050 F559 ^77 MOS74 0048 F555 C8 INY MOS74 0050 F559 ^77 MOS74 0049 F556 B9 74 EA LDAAY PVER +&01 -MCR MOS74 0050 F559 ^77 MOS74 0050 F559 D0 F7 BNE HELOP -- MOS74 0051 F55B F0 30 BEQ HELOO MOS74 0051 F55B v4F MOS74 0052 F55D MOS74 0051 F55B v4F MOS74 0053 F55D RECORD MOS74 0051 F55B v4F MOS74 0054 F55D MOS74 0051 F55B v4F MOS74 0055 F55D AD 47 02 LDA SROMSW MOS74 0051 F55B v4F MOS74 0056 F560 D0 2E BNE OPTERR ;OK if not in SFS MOS74 0051 F55B v4F MOS74 0057 F562 20 84 FB JSR MOTONW ;Motor ON for OUTPUT MOS74 0051 F55B v4F MOS74 0058 F565 20 D5 FB JSR BUGFIX MOS74 0051 F55B v4F MOS74 0059 F568 20 55 EA JSR MSGON MOS74 0051 F55B v4F MOS74 0060 F56B F0 45 BEQ RECEXX MOS74 0060 F56B v3A MOS74 0061 F56D MOS74 0060 F56B v3A MOS74 0062 F56D 20 3A FA JSR MSGOUT ;If messages ON, prompt MOS74 0060 F56B v3A MOS74 0063 F570 52 45 43 = "RECORD then RETURN" MOS74 0060 F56B v3A MOS74 0064 F582 00 = &00 MOS74 0060 F56B v3A MOS74 0065 F583 MOS74 0060 F56B v3A MOS74 0066 F583 20 89 F9 GETCR1 JSR ESCAPE MOS74 0060 F56B v3A MOS74 0067 F586 20 E0 FF JSR OSRDCH MOS74 0060 F56B v3A MOS74 0068 F589 C9 0D CMPIM MCR MOS74 0060 F56B v3A MOS74 0069 F58B D0 F6 BNE GETCR1 MOS74 0060 F56B v3A MOS74 0070 F58D 4C E7 FF HELOO JMP OSNEWL MOS74 0060 F56B v3A MOS74 0071 F590 MOS74 0060 F56B v3A MOS74 0072 F590 MOS74 0060 F56B v3A MOS74 0073 F590 4C 73 E3 OPTERR JMP MBDCMD MOS74 0060 F56B v3A MOS74 0074 F593 MOS74 0060 F56B v3A MOS74 0075 F593 ;Entered with two args in X & Y decoded from MOS74 0060 F56B v3A MOS74 0076 F593 ;command line by MOS. MOS74 0060 F56B v3A MOS74 0077 F593 MOS74 0060 F56B v3A MOS74 0078 F593 E0 03 CFSOPT CPXIM &03 MOS74 0060 F56B v3A MOS74 0079 F595 F0 1C BEQ SETGAP MOS74 0060 F56B v3A MOS74 0080 F597 B0 F7 BCS OPTERR MOS74 0060 F56B v3A MOS74 0081 F599 A9 A1 LDAIM DEFLT MOS74 0060 F56B v3A MOS74 0082 F59B C0 03 CPYIM &03 MOS74 0060 F56B v3A MOS74 0083 F59D CA DEX MOS74 0060 F56B v3A MOS74 0084 F59E 30 10 BMI SETFL1 MOS74 0060 F56B v3A MOS74 0085 F5A0 B0 EE BCS OPTERR MOS74 0060 F56B v3A MOS74 0086 F5A2 F0 05 BEQ MSGS MOS74 0060 F56B v3A MOS74 0087 F5A4 ERRS MOS74 0060 F56B v3A MOS74 0088 F5A4 C8 INY MOS74 0060 F56B v3A MOS74 0089 F5A5 C8 INY MOS74 0060 F56B v3A MOS74 0090 F5A6 C8 INY MOS74 0060 F56B v3A MOS74 0091 F5A7 49 FF EORIM MSGMSK:EOR:ERRMSK ;Mask out error and default bits MOS74 0060 F56B v3A MOS74 0092 F5A9 49 92 MSGS EORIM DEFLT:EOR:MSGMSK MOS74 0060 F56B v3A MOS74 0093 F5AB XSETFLG MOS74 0060 F56B v3A MOS74 0094 F5AB 25 E3 AND OPTS MOS74 0060 F56B v3A MOS74 0095 F5AD 19 B5 F6 ORAAY OPTTAB MOS74 0060 F56B v3A MOS74 0096 F5B0 SETFL1 MOS74 0060 F56B v3A MOS74 0097 F5B0 85 E3 STA OPTS MOS74 0060 F56B v3A MOS74 0098 F5B2 RECEXX MOS74 0060 F56B v3A MOS74 0099 F5B2 60 RTS MOS74 0079 F595 v63 MOS74 0100 F5B3 ] MOS74 0079 F595 v63 MOS74 0101 F5B3 MOS74 0079 F595 v63 MOS74 0102 F5B3 98 SETGAP TYA -- MOS74 0103 F5B4 30 02 BMI SETGP2 ; >127 => default MOS74 0103 F5B4 v7D MOS74 0104 F5B6 D0 02 BNE SETGP1 ; 0 < gap < 128 => OK MOS74 0103 F5B4 v7D MOS74 0105 F5B8 A9 19 SETGP2 LDAIM DEFGAP MOS74 0104 F5B6 v7D MOS74 0106 F5BA 8D D1 03 SETGP1 STA SEQGAP -- MOS74 0107 F5BD 60 RTS -- MOS74 0108 F5BE -- MOS74 0109 F5BE [ MOS125 = &FF -- MOS74 0120 F5BE ] -- MOS74 0121 F5BE -- MOS74 0122 F5BE TTL Main Routines - Interrupt routine -- MOS74 0123 F5BE OPT &01 -- MOS74 0124 F5BE -- MOS74 0125 F5BE IRUPT -- MOS74 0126 F5BE -- MOS74 0127 F5BE C6 C0 DEC IFLAG -- MOS74 0128 F5C0 AD 47 02 LDA SROMSW ;Is SFS active ? -- MOS74 0129 F5C3 F0 06 BEQ NOTSPK ;Nope MOS74 0129 F5C3 v79 MOS74 0130 F5C5 ;GoMMC tape patch has F58D NOP;NOP MOS74 MOS74 MOS74 MOS74 Acorn macro assembler Page 132 MOS74 Main Routines - Interrupt routine MOS74 MOS74 0129 F5C3 v79 MOS74 0131 F5C5 MOS74 0129 F5C3 v79 MOS74 0132 F5C5 20 8B EE JSR RDSPCH ;Yes, get next byte from ROM MOS74 0129 F5C3 v79 MOS74 0133 F5C8 [ MOS125 = &FF MOS74 0129 F5C3 v79 MOS74 0135 F5C8 ] MOS74 0129 F5C3 v79 MOS74 0136 F5C8 18 CLC ;Clear carry => no DCD MOS74 0129 F5C3 v79 MOS74 0137 F5C9 90 1A BCC DOIRPT ;Do as per cassette irupt MOS74 0137 F5C9 v65 MOS74 0138 F5CB MOS74 0137 F5C9 v65 MOS74 0139 F5CB AD 08 FE NOTSPK LDA STATUS MOS74 0137 F5C9 v65 MOS74 0140 F5CE 48 PHA MOS74 0137 F5C9 v65 MOS74 0141 F5CF 29 02 ANDIM TXBIT MOS74 0137 F5C9 v65 MOS74 0142 F5D1 F0 0B BEQ ITXON ;No TX interrupt MOS74 0137 F5C9 v65 MOS74 0143 F5D3 A4 CA LDY TXFLAG MOS74 0137 F5C9 v65 MOS74 0144 F5D5 F0 07 BEQ ITXON ;0 => receiving MOS74 0137 F5C9 v65 MOS74 0145 F5D7 MOS74 0137 F5C9 v65 MOS74 0146 F5D7 ;Here, transmiting byte .... MOS74 0137 F5C9 v65 MOS74 0147 F5D7 MOS74 0137 F5C9 v65 MOS74 0148 F5D7 68 PLA ;Restore stack MOS74 0137 F5C9 v65 MOS74 0149 F5D8 A5 BD LDA IBUF MOS74 0137 F5C9 v65 MOS74 0150 F5DA 8D 09 FE STA PORT MOS74 0137 F5C9 v65 MOS74 0151 F5DD 60 RTS MOS74 0137 F5C9 v65 MOS74 0152 F5DE MOS74 0137 F5C9 v65 MOS74 0153 F5DE MOS74 0137 F5C9 v65 MOS74 0154 F5DE ITXON MOS74 0137 F5C9 v65 MOS74 0155 F5DE MOS74 0137 F5C9 v65 MOS74 0156 F5DE ;If receiving byte, check IFLAG to see MOS74 0137 F5C9 v65 MOS74 0157 F5DE ;where to put it. MOS74 0137 F5C9 v65 MOS74 0158 F5DE MOS74 0137 F5C9 v65 MOS74 0159 F5DE AC 09 FE LDY PORT ;Cancel interrupt MOS74 0137 F5C9 v65 MOS74 0160 F5E1 68 PLA ;Pull status MOS74 0137 F5C9 v65 MOS74 0161 F5E2 4A LSRA MOS74 0137 F5C9 v65 MOS74 0162 F5E3 4A LSRA MOS74 0137 F5C9 v65 MOS74 0163 F5E4 4A LSRA ;C = 1 => DCD; C = 0 => no DCD MOS74 0137 F5C9 v65 MOS74 0164 F5E5 A6 C2 DOIRPT LDX ITYPE -- MOS74 0165 F5E7 F0 65 BEQ IEX ;0 => no task pending MOS74 0165 F5E7 v1A MOS74 0166 F5E9 MOS74 0165 F5E7 v1A MOS74 0167 F5E9 MOS74 0165 F5E7 v1A MOS74 0168 F5E9 CA DEX MOS74 0165 F5E7 v1A MOS74 0169 F5EA D0 06 BNE FNDHDR ;X <> 1 => not DCD task MOS74 0165 F5E7 v1A MOS74 0170 F5EC 90 60 BCC IEX ;=> DCD Not yet found MOS74 0165 F5E7 v1A MOS74 0171 F5EE A0 02 LDYIM &02 MOS74 0165 F5E7 v1A MOS74 0172 F5F0 D0 5A BNE NEWINT ;Go on to look find hdr. MOS74 0165 F5E7 v1A MOS74 0173 F5F2 MOS74 0165 F5E7 v1A MOS74 0174 F5F2 CA FNDHDR DEX MOS74 0165 F5E7 v1A MOS74 0175 F5F3 D0 13 BNE RDCHAR ;X <> 2 => not header task MOS74 0165 F5E7 v1A MOS74 0176 F5F5 B0 57 BCS IEX ;Ignore DCD if present MOS74 0165 F5E7 v1A MOS74 0177 F5F7 98 TYA ;Get stuff from port MOS74 0165 F5E7 v1A MOS74 0178 F5F8 20 6C FB JSR SETJOB ;Set CHKSUM etc. MOS74 0165 F5E7 v1A MOS74 0179 F5FB A0 03 LDYIM &03 ;New task MOS74 0165 F5E7 v1A MOS74 0180 F5FD MOS74 0165 F5E7 v1A MOS74 0181 F5FD [ GLYN=0 MOS74 0165 F5E7 v1A MOS74 0185 F5FD ] MOS74 0165 F5E7 v1A MOS74 0186 F5FD MOS74 0165 F5E7 v1A MOS74 0187 F5FD C9 2A CMPIM "*" MOS74 0165 F5E7 v1A MOS74 0188 F5FF F0 4B BEQ NEWINT ;Set read chars MOS74 0165 F5E7 v1A MOS74 0189 F601 20 44 FB JSR RXINIT ;Reset ULA (should be BLIP) MOS74 0165 F5E7 v1A MOS74 0190 F604 A0 01 LDYIM &01 MOS74 0165 F5E7 v1A MOS74 0191 F606 D0 44 BNE NEWINT ;Otherwise, wait for DCD MOS74 0165 F5E7 v1A MOS74 0192 F608 MOS74 0165 F5E7 v1A MOS74 0193 F608 CA RDCHAR DEX MOS74 0165 F5E7 v1A MOS74 0194 F609 D0 0A BNE RDBLK ;X <> 3 => not RDCHAR task MOS74 0165 F5E7 v1A MOS74 0195 F60B B0 03 BCS GOTDCD ;DCD found, not char MOS74 0165 F5E7 v1A MOS74 0196 F60D 84 BD STY IBUF ;Store char read MOS74 0165 F5E7 v1A MOS74 0197 F60F [ MOS125 = &FF MOS74 0165 F5E7 v1A MOS74 0199 F60F | MOS74 0165 F5E7 v1A MOS74 0200 F60F 60 RTS MOS74 0165 F5E7 v1A MOS74 0201 F610 ] MOS74 0165 F5E7 v1A MOS74 0202 F610 A9 80 GOTDCD LDAIM &80 MOS74 0165 F5E7 v1A MOS74 0203 F612 85 C0 STA IFLAG ;Indicate DCD MOS74 0165 F5E7 v1A MOS74 0204 F614 [ MOS125 = &FF MOS74 0165 F5E7 v1A MOS74 0206 F614 | MOS74 0165 F5E7 v1A MOS74 0207 F614 60 RTS MOS74 0165 F5E7 v1A MOS74 0208 F615 ] MOS74 0165 F5E7 v1A MOS74 0209 F615 MOS74 0165 F5E7 v1A MOS74 0210 F615 CA RDBLK DEX ;X <> 4=> not RDBLK MOS74 0165 F5E7 v1A MOS74 0211 F616 D0 27 BNE SUMIN MOS74 0165 F5E7 v1A MOS74 0212 F618 B0 2D BCS IFIN ;If DCD, finish immediately MOS74 0165 F5E7 v1A MOS74 0213 F61A 98 TYA MOS74 0165 F5E7 v1A MOS74 0214 F61B 20 E4 F7 JSR ADDCRC MOS74 0165 F5E7 v1A MOS74 0215 F61E A4 BC LDY TEMP ;(pointer) MOS74 0165 F5E7 v1A MOS74 0216 F620 E6 BC INC TEMP MOS74 0165 F5E7 v1A MOS74 0217 F622 24 BD BIT IBUF MOS74 0165 F5E7 v1A MOS74 0218 F624 30 0D BMI RDBLKA ;=> just verify, don't store MOS74 0165 F5E7 v1A MOS74 0219 F626 MOS74 0165 F5E7 v1A MOS74 0220 F626 [ TUBESW=0 MOS74 0165 F5E7 v1A MOS74 0221 F626 20 C6 FB JSR TUBCHK ;Check tube present and top bytes of address MOS74 0165 F5E7 v1A MOS74 0222 F629 F0 05 BEQ RDBLKB ;No need to tube. (NOTE TUBCHK DOES TAX to preserve A) MOS74 0165 F5E7 v1A MOS74 0223 F62B MOS74 0165 F5E7 v1A MOS74 0224 F62B 8E E5 FE STX TREG3 ;Otherwise, push to tube R3 MOS74 0165 F5E7 v1A MOS74 0225 F62E D0 03 BNE RDBLKA ;And continue MOS74 0165 F5E7 v1A MOS74 0226 F630 MOS74 0165 F5E7 v1A MOS74 0227 F630 8A RDBLKB TXA MOS74 0165 F5E7 v1A MOS74 0228 F631 91 B0 STAIY BKADDR ;Store in IO proc. MOS74 0165 F5E7 v1A MOS74 0229 F633 | MOS74 0165 F5E7 v1A MOS74 0231 F633 ] MOS74 0165 F5E7 v1A MOS74 0232 F633 MOS74 0165 F5E7 v1A MOS74 0233 F633 C8 RDBLKA INY MOS74 0165 F5E7 v1A MOS74 0234 F634 CC C8 03 CPY INFO +BKSZEL ;** 1 BYTE SIZE ONLY ** MOS74 0165 F5E7 v1A MOS74 0235 F637 D0 15 BNE IEX ;Keep going MOS74 0165 F5E7 v1A MOS74 0236 F639 MOS74 0165 F5E7 v1A MOS74 0237 F639 ;Have here finished reading data, so MOS74 0165 F5E7 v1A MOS74 0238 F639 ;read two more bytes of CRC without storing MOS74 0165 F5E7 v1A MOS74 0239 F639 MOS74 0165 F5E7 v1A MOS74 0240 F639 [ MOS125 = &FF MOS74 0165 F5E7 v1A MOS74 0244 F639 | MOS74 0165 F5E7 v1A MOS74 0245 F639 A0 05 LDYIM &05 ;NB bit 1 <> bit 0 MOS74 0165 F5E7 v1A MOS74 0246 F63B 84 BC STY TEMP ;Set counter MOS74 0165 F5E7 v1A MOS74 0247 F63D ] MOS74 0165 F5E7 v1A MOS74 0248 F63D D0 0D BNE NEWINT MOS74 0165 F5E7 v1A MOS74 0249 F63F MOS74 0165 F5E7 v1A MOS74 0250 F63F MOS74 0165 F5E7 v1A MOS74 0251 F63F SUMIN MOS74 0165 F5E7 v1A MOS74 0252 F63F MOS74 0165 F5E7 v1A MOS74 0253 F63F ;Here, assumed X = 5 MOS74 0165 F5E7 v1A MOS74 0254 F63F MOS74 0165 F5E7 v1A MOS74 0255 F63F 98 TYA MOS74 0165 F5E7 v1A MOS74 0256 F640 20 E4 F7 JSR ADDCRC MOS74 0165 F5E7 v1A MOS74 0257 F643 [ MOS125 = &FF MOS74 0165 F5E7 v1A MOS74 0260 F643 | MOS74 0165 F5E7 v1A MOS74 0261 F643 46 BC LSR TEMP ;NB alters returned C MOS74 0165 F5E7 v1A MOS74 0262 F645 B0 07 BCS IEX ;One more to go MOS74 0165 F5E7 v1A MOS74 0263 F647 ] MOS74 MOS74 MOS74 MOS74 Acorn macro assembler Page 133 MOS74 Main Routines - Interrupt routine MOS74 MOS74 0165 F5E7 v1A MOS74 0264 F647 MOS74 0165 F5E7 v1A MOS74 0265 F647 ;If here, finished, so mark BG job finished MOS74 0165 F5E7 v1A MOS74 0266 F647 MOS74 0165 F5E7 v1A MOS74 0267 F647 20 3A FB IFIN JSR CRESET MOS74 0165 F5E7 v1A MOS74 0268 F64A A0 00 LDYIM &00 MOS74 0165 F5E7 v1A MOS74 0269 F64C 84 C2 NEWINT STY ITYPE MOS74 0165 F5E7 v1A MOS74 0270 F64E 60 IEX RTS -- MOS74 0271 F64F -- MOS74 0272 F64F TTL C.F.S. Main routines - EOF -- MOS74 0273 F64F OPT MOS74 MOS74 MOS74 MOS74 MOS74 Acorn macro assembler Page 134 MOS74 C.F.S. Main routines - EOF MOS74 -- MOS74 0274 F64F -- MOS74 0275 F64F 48 CFSEOF PHA ;First store Y and A -- MOS74 0276 F650 98 TYA -- MOS74 0277 F651 48 PHA -- MOS74 0278 F652 8A TXA ;Transfer handle to Y -- MOS74 0279 F653 A8 TAY ;for checking. -- MOS74 0280 F654 A9 03 LDAIM HNDS ;Both handles -- MOS74 0281 F656 20 92 FB JSR CHKHND ;NOTE - CORRUPTS Y -- MOS74 0282 F659 -- MOS74 0283 F659 A5 E2 LDA CFSTAT -- MOS74 0284 F65B 29 40 ANDIM LSTBYT -- MOS74 0285 F65D AA TAX ;Result (zero or non-zero) in X -- MOS74 0286 F65E 68 PLA -- MOS74 0287 F65F A8 TAY -- MOS74 0288 F660 68 PLA ;Restore A and Y -- MOS74 0289 F661 60 RTS -- MOS74 0290 F662 -- MOS74 0291 F662 TTL C.F.S. UTILITIES - MOS74 -- MOS74 0292 F662 OPT &01 -- MOS74 0293 F662 -- MOS74 0294 F662 ;****** CASSETTE UTILITIES ****** -- MOS74 0295 F662 -- MOS74 0296 F662 -- MOS74 0297 F662 A9 00 SRCH0 LDAIM &00 -- MOS74 0298 F664 85 B4 STA BLOKNO -- MOS74 0299 F666 85 B5 STA BLOKNO +&01 -- MOS74 0300 F668 -- MOS74 0301 F668 SEARCH -- MOS74 0302 F668 -- MOS74 0303 F668 -- MOS74 0304 F668 ;File title pointed to by FTPTR. -- MOS74 0305 F668 ;Block number in BLOKNO. -- MOS74 0306 F668 -- MOS74 0307 F668 ;Tool through tape until found. If messages -- MOS74 0308 F668 ;on, print header info and checksum messages. -- MOS74 0309 F668 -- MOS74 0310 F668 A5 B4 LDA BLOKNO -- MOS74 0311 F66A 48 PHA -- MOS74 0312 F66B 85 B6 STA SRCHBK -- MOS74 0313 F66D A5 B5 LDA BLOKNO +&01 -- MOS74 0314 F66F 48 PHA -- MOS74 0315 F670 85 B7 STA SRCHBK +&01 ;Set block to search for -- MOS74 0316 F672 20 3A FA JSR MSGOUT -- MOS74 0317 F675 53 65 61 = "Searching",MCR,&00 -- MOS74 0318 F680 A9 FF LDAIM &FF ;=> search and validate -- MOS74 0319 F682 20 48 F3 JSR LOOK -- MOS74 0320 F685 68 PLA -- MOS74 0321 F686 85 B5 STA BLOKNO +&01 -- MOS74 0322 F688 68 PLA -- MOS74 0323 F689 85 B4 STA BLOKNO -- MOS74 0324 F68B A5 B6 LDA SRCHBK -- MOS74 0325 F68D 05 B7 ORA SRCHBK+&01 -- MOS74 0326 F68F D0 0D BNE SRCHXX MOS74 0326 F68F v72 MOS74 0327 F691 MOS74 0326 F68F v72 MOS74 0328 F691 ;If finding first block, set next expected MOS74 0326 F68F v72 MOS74 0329 F691 ;block to zero so that a load will not MOS74 0326 F68F v72 MOS74 0330 F691 ;fail because of a new file breaking into MOS74 0326 F68F v72 MOS74 0331 F691 ;a previous one thus causing non-sequential MOS74 0326 F68F v72 MOS74 0332 F691 ;blocks and therefore a block? error. MOS74 0326 F68F v72 MOS74 0333 F691 MOS74 0326 F68F v72 MOS74 0334 F691 85 B4 STA BLOKNO ;If first block, no block error MOS74 0326 F68F v72 MOS74 0335 F693 85 B5 STA BLOKNO +&01 MOS74 0326 F68F v72 MOS74 0336 F695 MOS74 0326 F68F v72 MOS74 0337 F695 ;Check header CRC so that we only latch MOS74 0326 F68F v72 MOS74 0338 F695 ;onto non-corrupt file names MOS74 0326 F68F v72 MOS74 0339 F695 MOS74 0326 F68F v72 MOS74 0340 F695 A5 C1 LDA HDRCRC MOS74 0326 F68F v72 MOS74 0341 F697 D0 05 BNE SRCHXX MOS74 0326 F68F v72 MOS74 0342 F699 A2 B1 LDXIM INFO -&01 ;Make sure looking for MOS74 0326 F68F v72 MOS74 0343 F69B 20 77 FB JSR MOVFN ;file name found in subsequent blocks MOS74 0326 F68F v72 MOS74 0344 F69E SRCHXX ;Check if run off the end of SROM system MOS74 0326 F68F v72 MOS74 0345 F69E MOS74 0326 F68F v72 MOS74 0346 F69E AD 47 02 LDA SROMSW -- MOS74 0347 F6A1 F0 18 BEQ SRCHYY ;In CFS, carry on MOS74 0347 F6A1 v67 MOS74 0348 F6A3 70 16 BVS SRCHYY ;Not end of ROM => continue MOS74 0347 F6A1 v67 MOS74 0349 F6A5 FNF MOS74 0347 F6A1 v67 MOS74 0350 F6A5 00 BRK MOS74 0398 F6DC ^47 MOS74 0351 F6A6 D6 = SFSER1 MOS74 0398 F6DC ^47 MOS74 0352 F6A7 [ MOS125 = &FF MOS74 0398 F6DC ^47 MOS74 0354 F6A7 | MOS74 0398 F6DC ^47 MOS74 0355 F6A7 46 69 6C = "File not found" MOS74 0398 F6DC ^47 MOS74 0356 F6B5 OPTTAB MOS74 0398 F6DC ^47 MOS74 0357 F6B5 00 = &00 ;Messages off MOS74 0398 F6DC ^47 MOS74 0358 F6B6 88 = MSGS1 ;Short messages MOS74 0398 F6DC ^47 MOS74 0359 F6B7 CC = MSGS2 ;Long messages MOS74 0398 F6DC ^47 MOS74 0360 F6B8 00 = IGBIT MOS74 0398 F6DC ^47 MOS74 0361 F6B9 22 = RETBIT MOS74 0398 F6DC ^47 MOS74 0362 F6BA 11 = ABTBIT MOS74 0398 F6DC ^47 MOS74 0363 F6BB ] MOS74 0398 F6DC ^47 MOS74 0364 F6BB MOS74 0398 F6DC ^47 MOS74 0365 F6BB A0 FF SRCHYY LDYIM &FF ;For LOAD and RDBFER MOS74 0398 F6DC ^47 MOS74 0366 F6BD 8C DF 03 STY OLDFLG ;Fool PRTHDR to print MOS74 0398 F6DC ^47 MOS74 0367 F6C0 ;extra blank line after "Loading" message MOS74 0398 F6DC ^47 MOS74 0368 F6C0 60 RTS MOS74 0398 F6DC ^47 MOS74 0369 F6C1 MOS74 0398 F6DC ^47 MOS74 0370 F6C1 MOS74 0398 F6DC ^47 MOS74 0371 F6C1 ECLOSE ;close EXEC file MOS74 0398 F6DC ^47 MOS74 0372 F6C1 MOS74 0398 F6DC ^47 MOS74 0373 F6C1 A9 00 LDAIM ZERO MOS74 0398 F6DC ^47 MOS74 0374 F6C3 ; MOS74 0398 F6DC ^47 MOS74 0375 F6C3 EXEC ; EXEC MOS74 0398 F6DC ^47 MOS74 0376 F6C3 MOS74 0398 F6DC ^47 MOS74 0377 F6C3 ; XY -> filename MOS74 0398 F6DC ^47 MOS74 0378 F6C3 ; A = $00 MOS74 0398 F6DC ^47 MOS74 0379 F6C3 ; MOS74 0398 F6DC ^47 MOS74 0380 F6C3 ; does not corrupt Y if just closing file (used by SHUTES) MOS74 0398 F6DC ^47 MOS74 0381 F6C3 ; MOS74 0398 F6DC ^47 MOS74 0382 F6C3 08 PHP ;remember whether to just close exec file MOS74 0398 F6DC ^47 MOS74 0383 F6C4 84 E6 STY EXECY ;save Y MOS74 0398 F6DC ^47 MOS74 0384 F6C6 ; close any previous exec file MOS74 0398 F6DC ^47 MOS74 0385 F6C6 AC 56 02 LDY EXECH MOS74 0398 F6DC ^47 MOS74 0386 F6C9 8D 56 02 STA EXECH ;clear execing MOS74 0398 F6DC ^47 MOS74 0387 F6CC F0 03 BEQ EXEC2 ;[no current exec file, avoid closing all files] MOS74 0398 F6DC ^47 MOS74 0388 F6CE ; A=0 MOS74 0398 F6DC ^47 MOS74 0389 F6CE 20 CE FF JSR OSFIND ;close previous exec file (assumes X not corrupted) MOS74 0398 F6DC ^47 MOS74 0390 F6D1 EXEC2 MOS74 0398 F6DC ^47 MOS74 0391 F6D1 A4 E6 LDY EXECY ;restore Y MOS74 0398 F6DC ^47 MOS74 0392 F6D3 28 PLP MOS74 0398 F6DC ^47 MOS74 0393 F6D4 F0 0B BEQ EXEC0 ;[just stop execing] MOS74 0398 F6DC ^47 MOS74 0394 F6D6 ; try opening specified file MOS74 0398 F6DC ^47 MOS74 0395 F6D6 A9 40 LDAIM &40 ;open file for input MOS74 MOS74 MOS74 MOS74 Acorn macro assembler Page 135 MOS74 C.F.S. UTILITIES - MOS74 MOS74 MOS74 0398 F6DC ^47 MOS74 0396 F6D8 20 CE FF JSR OSFIND MOS74 0398 F6DC ^47 MOS74 0397 F6DB A8 TAY MOS74 0398 F6DC ^47 MOS74 0398 F6DC F0 C7 BEQ FNF ;[file not found] MOS74 0393 F6D4 v74 MOS74 0399 F6DE 8D 56 02 STA EXECH ;remember exec file handle MOS74 0393 F6D4 v74 MOS74 0400 F6E1 EXEC0 ;Z=1 MOS74 0393 F6D4 v74 MOS74 0401 F6E1 60 RTS -- MOS74 0402 F6E2 -- MOS74 0403 F6E2 -- MOS74 0404 F6E2 RDBFER -- MOS74 0405 F6E2 -- MOS74 0406 F6E2 -- MOS74 0407 F6E2 ;Read a block into input buffer. Used in GETBYTE -- MOS74 0408 F6E2 -- MOS74 0409 F6E2 A2 A6 LDXIM INFILE -&01 -- MOS74 0410 F6E4 20 77 FB JSR MOVFN ;Set file searching for -- MOS74 0411 F6E7 20 AF F7 JSR RDHEAD -- MOS74 0412 F6EA -- MOS74 0413 F6EA RDBFRS -- MOS74 0414 F6EA -- MOS74 0415 F6EA AD CA 03 LDA INFO +BKFLAG ;Check protection bit MOS74 0469 F73B ^2D MOS74 0416 F6ED 4A LSRA MOS74 0469 F73B ^2D MOS74 0417 F6EE 90 03 BCC RDBFLL ;Not protected -> continue MOS74 0469 F73B ^2D MOS74 0418 F6F0 4C 8A F2 JMP PROTER ;Protected -> error MOS74 0469 F73B ^2D MOS74 0419 F6F3 MOS74 0469 F73B ^2D MOS74 0420 F6F3 AD DD 03 RDBFLL LDA NEXTIN MOS74 0469 F73B ^2D MOS74 0421 F6F6 85 B4 STA BLOKNO MOS74 0469 F73B ^2D MOS74 0422 F6F8 AD DE 03 LDA NEXTIN +&01 MOS74 0469 F73B ^2D MOS74 0423 F6FB 85 B5 STA BLOKNO +&01 ;Set block no. to check MOS74 0469 F73B ^2D MOS74 0424 F6FD MOS74 0469 F73B ^2D MOS74 0425 F6FD A9 00 LDAIM INBUFR MOS74 0469 F73B ^2D MOS74 0426 F6FF 85 B0 STA BKADDR MOS74 0469 F73B ^2D MOS74 0427 F701 A9 0A LDAIM /(INBUFR ) MOS74 0469 F73B ^2D MOS74 0428 F703 85 B1 STA BKADDR +&01 MOS74 0469 F73B ^2D MOS74 0429 F705 A9 FF LDAIM &FF MOS74 0469 F73B ^2D MOS74 0430 F707 85 B2 STA BKADDR +&02 MOS74 0469 F73B ^2D MOS74 0431 F709 85 B3 STA BKADDR +&03 ;Input buffer is in IO proc. MOS74 0469 F73B ^2D MOS74 0432 F70B 20 03 F8 JSR READBK ;Read data into buffer MOS74 0469 F73B ^2D MOS74 0433 F70E 20 A8 F9 JSR LODHDR MOS74 0469 F73B ^2D MOS74 0434 F711 D0 25 BNE RDBERR MOS74 0469 F73B ^2D MOS74 0435 F713 MOS74 0469 F73B ^2D MOS74 0436 F713 ;Data read ok, inc. next expected block. MOS74 0469 F73B ^2D MOS74 0437 F713 MOS74 0469 F73B ^2D MOS74 0438 F713 AD FF 0A LDA INBUFR +&FF MOS74 0469 F73B ^2D MOS74 0439 F716 8D ED 02 STA FINBYT ;Store final byte of this buffer in safe place MOS74 0469 F73B ^2D MOS74 0440 F719 MOS74 0469 F73B ^2D MOS74 0441 F719 20 5D FB JSR NXTBLK ;Next block = current block + 1 MOS74 0469 F73B ^2D MOS74 0442 F71C ;NOTE - corrupts BLOKNO MOS74 0469 F73B ^2D MOS74 0443 F71C MOS74 0469 F73B ^2D MOS74 0444 F71C 8E DD 03 STX NEXTIN MOS74 0469 F73B ^2D MOS74 0445 F71F 8C DE 03 STY NEXTIN +&01 MOS74 0469 F73B ^2D MOS74 0446 F722 MOS74 0469 F73B ^2D MOS74 0447 F722 A2 02 LDXIM &02 MOS74 0469 F73B ^2D MOS74 0448 F724 MOS74 0469 F73B ^2D MOS74 0449 F724 ;Set block size and flag byte MOS74 0469 F73B ^2D MOS74 0450 F724 MOS74 0469 F73B ^2D MOS74 0451 F724 BD C8 03 RDBFL1 LDAAX INFO +BKSZEL MOS74 0469 F73B ^2D MOS74 0452 F727 9D EA 02 STAAX INBSZE MOS74 0469 F73B ^2D MOS74 0453 F72A CA DEX MOS74 0469 F73B ^2D MOS74 0454 F72B 10 F7 BPL RDBFL1 MOS74 0469 F73B ^2D MOS74 0455 F72D 2C EC 02 BIT BUFFLG MOS74 0469 F73B ^2D MOS74 0456 F730 10 03 BPL RDBFL8 MOS74 0469 F73B ^2D MOS74 0457 F732 20 DB F2 JSR NOOLN1 ;If last block, new line MOS74 0469 F73B ^2D MOS74 0458 F735 MOS74 0469 F73B ^2D MOS74 0459 F735 4C E6 FA RDBFL8 JMP CASMOF ;Motor off, exit MOS74 0469 F73B ^2D MOS74 0460 F738 MOS74 0469 F73B ^2D MOS74 0461 F738 ;From here down, dealing with errors MOS74 0469 F73B ^2D MOS74 0462 F738 MOS74 0469 F73B ^2D MOS74 0463 F738 RDBERR MOS74 0469 F73B ^2D MOS74 0464 F738 MOS74 0469 F73B ^2D MOS74 0465 F738 ;Retry - search for block number, and MOS74 0469 F73B ^2D MOS74 0466 F738 ;then go back to RDBFRS. MOS74 0469 F73B ^2D MOS74 0467 F738 MOS74 0469 F73B ^2D MOS74 0468 F738 20 68 F6 JSR SEARCH ;FTPTR already set by RDHEAD. MOS74 0469 F73B ^2D MOS74 0469 F73B D0 AD BNE RDBFRS ;Restart (always jump back) -- MOS74 0470 F73D -- MOS74 0471 F73D -- MOS74 0472 F73D -- MOS74 0473 F73D -- MOS74 0474 F73D -- MOS74 0475 F73D C9 2A RDHDLC CMPIM "*" MOS74 0570 F7B9 ^02 MOS74 0476 F73F F0 37 BEQ RDHDLA ;Char OK, go on to rest of block MOS74 0570 F7B9 ^02 MOS74 0477 F741 C9 23 CMPIM "#" ;Is this a short header ?? MOS74 0570 F7B9 ^02 MOS74 0478 F743 D0 0F BNE ROMER ;No -> illegal char -> error MOS74 0570 F7B9 ^02 MOS74 0479 F745 EE C6 03 INC INFO +BKNOLO ;Have "read" short block header, so MOS74 0570 F7B9 ^02 MOS74 0480 F748 D0 03 BNE RDHDX2 ;increment block number as if we have read whole header MOS74 0570 F7B9 ^02 MOS74 0481 F74A EE C7 03 INC INFO +BKNOHI MOS74 0570 F7B9 ^02 MOS74 0482 F74D A2 FF RDHDX2 LDXIM &FF ;Prepare for non-DCD exit MOS74 0570 F7B9 ^02 MOS74 0483 F74F 2C 49 D9 BIT FFBYT ;Set the V flag => not end of SFS MOS74 0570 F7B9 ^02 MOS74 0484 F752 D0 53 BNE RDHDX1 ;Assumed always +ve MOS74 0570 F7B9 ^02 MOS74 0485 F754 MOS74 0570 F7B9 ^02 MOS74 0486 F754 A9 F7 ROMER LDAIM NCTBIT MOS74 0570 F7B9 ^02 MOS74 0487 F756 MOS74 0570 F7B9 ^02 MOS74 0488 F756 ;Switch CAT bit off so messages not in a funny MOS74 0570 F7B9 ^02 MOS74 0489 F756 ;state if error occurs in *CAT MOS74 0570 F7B9 ^02 MOS74 0490 F756 MOS74 0570 F7B9 ^02 MOS74 0491 F756 20 3D F3 JSR ANDSTA MOS74 0570 F7B9 ^02 MOS74 0492 F759 00 BRK MOS74 0570 F7B9 ^02 MOS74 0493 F75A D7 = SFSERR MOS74 0570 F7B9 ^02 MOS74 0494 F75B 42 61 64 = "Bad ROM" MOS74 0570 F7B9 ^02 MOS74 0495 F762 00 = &00 MOS74 0570 F7B9 ^02 MOS74 0496 F763 MOS74 0570 F7B9 ^02 MOS74 0497 F763 RDHDL2 MOS74 0570 F7B9 ^02 MOS74 0498 F763 MOS74 0570 F7B9 ^02 MOS74 0499 F763 ;Here, set motor on and 6850 init etc. MOS74 0570 F7B9 ^02 MOS74 0500 F763 MOS74 0570 F7B9 ^02 MOS74 0501 F763 A0 FF LDYIM READFX ;Indicate read MOS74 0570 F7B9 ^02 MOS74 0502 F765 20 86 FB JSR MOTON ;Motor ON and drive select MOS74 0570 F7B9 ^02 MOS74 0503 F768 A9 01 LDAIM &01 MOS74 0570 F7B9 ^02 MOS74 0504 F76A 85 C2 STA ITYPE MOS74 0570 F7B9 ^02 MOS74 0505 F76C 20 44 FB JSR RXINIT ;Init 6850 and blip motor MOS74 0570 F7B9 ^02 MOS74 0506 F76F MOS74 0570 F7B9 ^02 MOS74 0507 F76F ;Wait for DCD and '* character indicating MOS74 0570 F7B9 ^02 MOS74 0508 F76F ;start of block. MOS74 0570 F7B9 ^02 MOS74 0509 F76F MOS74 0570 F7B9 ^02 MOS74 0510 F76F 20 89 F9 GETHLP JSR ESCAPE MOS74 0570 F7B9 ^02 MOS74 0511 F772 A9 03 LDAIM &03 MOS74 0570 F7B9 ^02 MOS74 0512 F774 C5 C2 CMP ITYPE MOS74 0570 F7B9 ^02 MOS74 0513 F776 D0 F7 BNE GETHLP MOS74 0570 F7B9 ^02 MOS74 0514 F778 MOS74 0570 F7B9 ^02 MOS74 0515 F778 [ MOS125 = &FF MOS74 0570 F7B9 ^02 MOS74 0517 F778 | MOS74 MOS74 MOS74 MOS74 Acorn macro assembler Page 136 MOS74 C.F.S. UTILITIES - MOS74 MOS74 MOS74 0570 F7B9 ^02 MOS74 0518 F778 RDHDLA MOS74 0570 F7B9 ^02 MOS74 0519 F778 ] MOS74 0570 F7B9 ^02 MOS74 0520 F778 20 70 FB JSR SETJB1 ;Set cheksum etc. MOS74 0570 F7B9 ^02 MOS74 0521 F77B MOS74 0570 F7B9 ^02 MOS74 0522 F77B 20 CB F7 RDHDL1 JSR CASIN ;Read and add to checksum MOS74 0570 F7B9 ^02 MOS74 0523 F77E 50 1A BVC RDHDEX ;Header interrupted by DCD MOS74 0570 F7B9 ^02 MOS74 0524 F780 99 B2 03 STAAY INFO ;Store in INFO MOS74 0570 F7B9 ^02 MOS74 0525 F783 F0 06 BEQ RDHDL3 ;End of file title (Z set in CASIN) MOS74 0570 F7B9 ^02 MOS74 0526 F785 C8 INY MOS74 0570 F7B9 ^02 MOS74 0527 F786 C0 0B CPYIM FTSIZE ;Attempting to read over f.t. end MOS74 0570 F7B9 ^02 MOS74 0528 F788 D0 F1 BNE RDHDL1 ;No, => continue MOS74 0570 F7B9 ^02 MOS74 0529 F78A 88 DEY MOS74 0570 F7B9 ^02 MOS74 0530 F78B MOS74 0570 F7B9 ^02 MOS74 0531 F78B A2 0C RDHDL3 LDXIM BKINFO ;Now read all info. MOS74 0570 F7B9 ^02 MOS74 0532 F78D 20 CB F7 RDHDL4 JSR CASIN MOS74 0570 F7B9 ^02 MOS74 0533 F790 50 08 BVC RDHDEX ;Header interrupted by DCD MOS74 0570 F7B9 ^02 MOS74 0534 F792 9D B2 03 STAAX INFO MOS74 0570 F7B9 ^02 MOS74 0535 F795 E8 INX MOS74 0570 F7B9 ^02 MOS74 0536 F796 E0 1F CPXIM BKLAST +&02 MOS74 0570 F7B9 ^02 MOS74 0537 F798 D0 F3 BNE RDHDL4 MOS74 0570 F7B9 ^02 MOS74 0538 F79A MOS74 0570 F7B9 ^02 MOS74 0539 F79A 98 RDHDEX TYA MOS74 0570 F7B9 ^02 MOS74 0540 F79B AA TAX ;Preserve Y for exit MOS74 0570 F7B9 ^02 MOS74 0541 F79C A9 00 LDAIM &00 MOS74 0570 F7B9 ^02 MOS74 0542 F79E 99 B2 03 STAAY INFO ;Terminate f.t. MOS74 0570 F7B9 ^02 MOS74 0543 F7A1 A5 BE LDA CHKSUM MOS74 0570 F7B9 ^02 MOS74 0544 F7A3 05 BF ORA CHKSUM +&01 MOS74 0570 F7B9 ^02 MOS74 0545 F7A5 85 C1 STA HDRCRC ;Store CRC indication MOS74 0570 F7B9 ^02 MOS74 0546 F7A7 20 6C FB RDHDX1 JSR SETJOB MOS74 0570 F7B9 ^02 MOS74 0547 F7AA 84 C2 STY ITYPE ;If header interrupted => block fin. MOS74 0570 F7B9 ^02 MOS74 0548 F7AC MOS74 0570 F7B9 ^02 MOS74 0549 F7AC 8A TXA MOS74 0570 F7B9 ^02 MOS74 0550 F7AD D0 1B BNE RDHDXX MOS74 0570 F7B9 ^02 MOS74 0551 F7AF MOS74 0570 F7B9 ^02 MOS74 0552 F7AF RDHEAD MOS74 0570 F7B9 ^02 MOS74 0553 F7AF MOS74 0570 F7B9 ^02 MOS74 0554 F7AF ;Read header info into INFO. Check file title MOS74 0570 F7B9 ^02 MOS74 0555 F7AF ;against FTPTR, and print header info. MOS74 0570 F7B9 ^02 MOS74 0556 F7AF MOS74 0570 F7B9 ^02 MOS74 0557 F7AF ;First, wait for DCD followed by "*" MOS74 0570 F7B9 ^02 MOS74 0558 F7AF MOS74 0570 F7B9 ^02 MOS74 0559 F7AF AD 47 02 LDA SROMSW MOS74 0570 F7B9 ^02 MOS74 0560 F7B2 F0 AF BEQ RDHDL2 ;SFS not enabled, carry on MOS74 0570 F7B9 ^02 MOS74 0561 F7B4 ;GoMMC tape patch has F77E NOP;NOP MOS74 0570 F7B9 ^02 MOS74 0562 F7B4 MOS74 0570 F7B9 ^02 MOS74 0563 F7B4 ;Here, SFS enabled, so read first char MOS74 0570 F7B9 ^02 MOS74 0564 F7B4 ;(assumed to be "*") and go on to read MOS74 0570 F7B9 ^02 MOS74 0565 F7B4 ;rest of block. MOS74 0570 F7B9 ^02 MOS74 0566 F7B4 MOS74 0570 F7B9 ^02 MOS74 0567 F7B4 RDHDLD MOS74 0570 F7B9 ^02 MOS74 0568 F7B4 20 8B EE JSR RDSPCH MOS74 0570 F7B9 ^02 MOS74 0569 F7B7 C9 2B CMPIM SFSEND ;Is "end of ROM" char ? MOS74 0570 F7B9 ^02 MOS74 0570 F7B9 D0 82 BNE RDHDLC MOS74 0550 F7AD v64 MOS74 0571 F7BB A9 08 LDAIM CATBIT MOS74 0550 F7AD v64 MOS74 0572 F7BD 25 E2 AND CFSTAT MOS74 0550 F7AD v64 MOS74 0573 F7BF F0 03 BEQ RDHDL5 ;If not in CAT, don't do new line MOS74 0550 F7AD v64 MOS74 0574 F7C1 MOS74 0550 F7AD v64 MOS74 0575 F7C1 20 DF F2 JSR NOOLIN ;New line between ROMs MOS74 0550 F7AD v64 MOS74 0576 F7C4 20 4E EE RDHDL5 JSR SRNEXT MOS74 0550 F7AD v64 MOS74 0577 F7C7 MOS74 0550 F7AD v64 MOS74 0578 F7C7 ;Carry clear => not at end of filing system, so MOS74 0550 F7AD v64 MOS74 0579 F7C7 ;read next character, assumed still to be start MOS74 0550 F7AD v64 MOS74 0580 F7C7 ;of header although in new rom. MOS74 0550 F7AD v64 MOS74 0581 F7C7 MOS74 0550 F7AD v64 MOS74 0582 F7C7 90 EB BCC RDHDLD MOS74 0550 F7AD v64 MOS74 0583 F7C9 MOS74 0550 F7AD v64 MOS74 0584 F7C9 ;Carry set => end of filing system, so MOS74 0550 F7AD v64 MOS74 0585 F7C9 ;indicate to outside world in V flag MOS74 0550 F7AD v64 MOS74 0586 F7C9 B8 CLV MOS74 0550 F7AD v64 MOS74 0587 F7CA [ MOS125 = &FF MOS74 0550 F7AD v64 MOS74 0588 F7CA | MOS74 0550 F7AD v64 MOS74 0589 F7CA RDHDXX MOS74 0550 F7AD v64 MOS74 0590 F7CA ] MOS74 0550 F7AD v64 MOS74 0591 F7CA 60 RTS -- MOS74 0592 F7CB -- MOS74 0593 F7CB ;Note assumed exit with Y = 0 -- MOS74 0594 F7CB ;for LOAD and RDBFRS -- MOS74 0595 F7CB -- MOS74 0596 F7CB -- MOS74 0597 F7CB -- MOS74 0598 F7CB -- MOS74 0599 F7CB -- MOS74 0600 F7CB CASIN -- MOS74 0601 F7CB AD 47 02 LDA SROMSW ;is SFS on ? -- MOS74 0602 F7CE F0 11 BEQ CASIN1 ;Nope, read from tape MOS74 0602 F7CE v6E MOS74 0603 F7D0 ;GoMMC tape patch has F79A NOP;NOP MOS74 0602 F7CE v6E MOS74 0604 F7D0 MOS74 0602 F7CE v6E MOS74 0605 F7D0 ;Force a read from ROM & set IRUPT flag MOS74 0602 F7CE v6E MOS74 0606 F7D0 MOS74 0602 F7CE v6E MOS74 0607 F7D0 8A TXA MOS74 0602 F7CE v6E MOS74 0608 F7D1 48 PHA MOS74 0602 F7CE v6E MOS74 0609 F7D2 98 TYA MOS74 0602 F7CE v6E MOS74 0610 F7D3 48 PHA MOS74 0602 F7CE v6E MOS74 0611 F7D4 20 8B EE JSR RDSPCH MOS74 0602 F7CE v6E MOS74 0612 F7D7 85 BD STA IBUF MOS74 0602 F7CE v6E MOS74 0613 F7D9 A9 FF LDAIM &FF MOS74 0602 F7CE v6E MOS74 0614 F7DB 85 C0 STA IFLAG ;=> irupt occurred, no DCD MOS74 0602 F7CE v6E MOS74 0615 F7DD 68 PLA MOS74 0602 F7CE v6E MOS74 0616 F7DE A8 TAY MOS74 0602 F7CE v6E MOS74 0617 F7DF 68 PLA MOS74 0602 F7CE v6E MOS74 0618 F7E0 AA TAX MOS74 0602 F7CE v6E MOS74 0619 F7E1 MOS74 0602 F7CE v6E MOS74 0620 F7E1 20 AB F8 CASIN1 JSR IWAIT -- MOS74 0621 F7E4 -- MOS74 0622 F7E4 ;Note A=IBUF after IWAIT -- MOS74 0623 F7E4 -- MOS74 0624 F7E4 [ DEBUG=0 -- MOS74 0630 F7E4 ] -- MOS74 0631 F7E4 -- MOS74 0632 F7E4 [ MOS125 = &FF -- MOS74 0662 F7E4 | -- MOS74 0663 F7E4 ;Can't move to MOS05 to branch to OCSREX, fallthrough from CASIN1! -- MOS74 0664 F7E4 08 ADDCRC PHP -- MOS74 0665 F7E5 48 PHA -- MOS74 0666 F7E6 -- MOS74 0667 F7E6 0021 CCITTL * &21 -- MOS74 0668 F7E6 0010 CCITTH * &10 -- MOS74 0669 F7E6 -- MOS74 0670 F7E6 45 BF EOR CHKSUM +&01 -- MOS74 0671 F7E8 38 SEC -- MOS74 0672 F7E9 66 BF ROR CHKSUM +&01 MOS74 MOS74 MOS74 MOS74 Acorn macro assembler Page 137 MOS74 C.F.S. UTILITIES - MOS74 MOS74 -- MOS74 0673 F7EB 06 BE CRC1 ASL CHKSUM MOS74 0683 F7FC ^6D MOS74 0674 F7ED 2A ROLA MOS74 0683 F7FC ^6D MOS74 0675 F7EE 90 0A BCC CRC2 MOS74 0683 F7FC ^6D MOS74 0676 F7F0 48 PHA MOS74 0683 F7FC ^6D MOS74 0677 F7F1 A5 BE LDA CHKSUM MOS74 0683 F7FC ^6D MOS74 0678 F7F3 49 21 EORIM CCITTL MOS74 0683 F7FC ^6D MOS74 0679 F7F5 85 BE STA CHKSUM MOS74 0683 F7FC ^6D MOS74 0680 F7F7 68 PLA MOS74 0683 F7FC ^6D MOS74 0681 F7F8 49 10 EORIM CCITTH MOS74 0683 F7FC ^6D MOS74 0682 F7FA 46 BF CRC2 LSR CHKSUM +&01 MOS74 0683 F7FC ^6D MOS74 0683 F7FC D0 ED BNE CRC1 -- MOS74 0684 F7FE 85 BF STA CHKSUM +&01 -- MOS74 0685 F800 68 PLA -- MOS74 0686 F801 28 PLP -- MOS74 0687 F802 60 RTS -- MOS74 0688 F803 ] -- MOS74 0689 F803 -- MOS74 0690 F803 -- MOS74 0691 F803 -- MOS74 0692 F803 -- MOS74 0693 F803 RDBLOK -- MOS74 0694 F803 -- MOS74 0695 F803 READBK -- MOS74 0696 F803 -- MOS74 0697 F803 ;Sets up BG job to read data into BKADDR -- MOS74 0698 F803 ;and read CRC. -- MOS74 0699 F803 -- MOS74 0700 F803 ;Note: must not corrupt Y ! -- MOS74 0701 F803 -- MOS74 0702 F803 A9 00 LDAIM &00 -- MOS74 0703 F805 85 BD CHKBIN STA IBUF ;Indicate read to memory -- MOS74 0704 F807 A2 00 LDXIM &00 -- MOS74 0705 F809 86 BC STX TEMP ;Pointer into data -- MOS74 0706 F80B ;If empty, data read finished, X=$00 -- MOS74 0707 F80B 50 0A BVC RDBKEM ;If V clear from header read MOS74 0707 F80B v75 MOS74 0708 F80D ;just ignore all data (since hdr. MOS74 0707 F80B v75 MOS74 0709 F80D ;interrupted by DCD). MOS74 0707 F80B v75 MOS74 0710 F80D MOS74 0707 F80B v75 MOS74 0711 F80D AD C8 03 LDA INFO +BKSZEL MOS74 0707 F80B v75 MOS74 0712 F810 0D C9 03 ORA INFO +BKSZEH MOS74 0707 F80B v75 MOS74 0713 F813 F0 02 BEQ RDBKEM ;Empty block => no BG job MOS74 0707 F80B v75 MOS74 0714 F815 MOS74 0707 F80B v75 MOS74 0715 F815 A2 04 LDXIM &04 MOS74 0707 F80B v75 MOS74 0716 F817 86 C2 RDBKEM STX ITYPE -- MOS74 0717 F819 -- MOS74 0718 F819 ;V not important from here on -- MOS74 0719 F819 -- MOS74 0720 F819 60 RTS -- MOS74 0721 F81A -- MOS74 0722 F81A -- MOS74 0723 F81A -- MOS74 0724 F81A -- MOS74 0725 F81A WRBLOK -- MOS74 0726 F81A -- MOS74 0727 F81A WBLOCK -- MOS74 0728 F81A -- MOS74 0729 F81A ;Write block pointed to by BKADDR. Expects header info -- MOS74 0730 F81A ;to be in INFO and file name in FILNAM. -- MOS74 0731 F81A -- MOS74 0732 F81A ;Assumes 6850 is in reset state, and SERPROC -- MOS74 0733 F81A ;is set with motor on. -- MOS74 0734 F81A -- MOS74 0735 F81A 08 PHP ;Save I'rupt state -- MOS74 0736 F81B A2 03 LDXIM &03 ;Set spare bytes -- MOS74 0737 F81D A9 00 LDAIM &00 -- MOS74 0738 F81F 9D CB 03 SETSPR STAAX INFO +BKSPAR MOS74 0740 F823 ^7A MOS74 0739 F822 CA DEX MOS74 0740 F823 ^7A MOS74 0740 F823 10 FA BPL SETSPR -- MOS74 0741 F825 -- MOS74 0742 F825 AD C6 03 LDA INFO +BKNOLO -- MOS74 0743 F828 0D C7 03 ORA INFO +BKNOHI -- MOS74 0744 F82B D0 05 BNE WRBKL5 ;Not first block, continue MOS74 0744 F82B v7A MOS74 0745 F82D 20 B9 F8 JSR LEADER MOS74 0744 F82B v7A MOS74 0746 F830 F0 03 BEQ WRBKL4 ;Always Z exit MOS74 0744 F82B v7A MOS74 0747 F832 MOS74 0744 F82B v7A MOS74 0748 F832 20 BD F8 WRBKL5 JSR PUTGAP ;Put out inter-block gap MOS74 0746 F830 v7C MOS74 0749 F835 MOS74 0746 F830 v7C MOS74 0750 F835 A9 2A WRBKL4 LDAIM "*" -- MOS74 0751 F837 85 BD STA IBUF ;Start of block char is output IMMEDIATELY -- MOS74 0752 F839 ;on TXINIT. -- MOS74 0753 F839 -- MOS74 0754 F839 20 6C FB JSR SETJOB -- MOS74 0755 F83C -- MOS74 0756 F83C 20 3E FB JSR TXINIT ;Get 6850 ready -- MOS74 0757 F83F 20 AB F8 JSR IWAIT ;Wait for * to go out -- MOS74 0758 F842 -- MOS74 0759 F842 88 DEY ;Set zero by SETJOB -- MOS74 0760 F843 C8 WRBKL1 INY MOS74 0767 F84D ^74 MOS74 0761 F844 B9 D2 03 LDAAY FILNAM ;Set Z flag if file terminator MOS74 0767 F84D ^74 MOS74 0762 F847 99 B2 03 STAAY INFO ;PRTHDR expects INFO to have f.t. in it MOS74 0767 F84D ^74 MOS74 0763 F84A 20 72 F0 JSR PUTCHK MOS74 0767 F84D ^74 MOS74 0764 F84D MOS74 0767 F84D ^74 MOS74 0765 F84D ;Note Z flag kept over PUTCHK MOS74 0767 F84D ^74 MOS74 0766 F84D MOS74 0767 F84D ^74 MOS74 0767 F84D D0 F4 BNE WRBKL1 ;File title out. -- MOS74 0768 F84F -- MOS74 0769 F84F A2 0C LDXIM BKINFO -- MOS74 0770 F851 BD B2 03 WRBKL2 LDAAX INFO ;Rest of header to tape MOS74 0774 F85A ^75 MOS74 0771 F854 20 72 F0 JSR PUTCHK MOS74 0774 F85A ^75 MOS74 0772 F857 E8 INX MOS74 0774 F85A ^75 MOS74 0773 F858 E0 1D CPXIM BKLAST MOS74 0774 F85A ^75 MOS74 0774 F85A D0 F5 BNE WRBKL2 -- MOS74 0775 F85C -- MOS74 0776 F85C 20 A2 F8 JSR PUTCRC -- MOS74 0777 F85F -- MOS74 0778 F85F AD C8 03 LDA INFO +BKSZEL -- MOS74 0779 F862 0D C9 03 ORA INFO +BKSZEH -- MOS74 0780 F865 F0 1B BEQ WRBKEM ;Empty block MOS74 0780 F865 v64 MOS74 0781 F867 MOS74 0780 F865 v64 MOS74 0782 F867 [ MOS125 = &FF MOS74 0780 F865 v64 MOS74 0784 F867 ] MOS74 0780 F865 v64 MOS74 0785 F867 20 70 FB JSR SETJB1 MOS74 0780 F865 v64 MOS74 0786 F86A WRBKL3 MOS74 0780 F865 v64 MOS74 0787 F86A [ MOS125 = &FF MOS74 0780 F865 v64 MOS74 0799 F86A | MOS74 0780 F865 v64 MOS74 0800 F86A [ TUBESW=0 MOS74 0780 F865 v64 MOS74 0801 F86A 20 C6 FB JSR TUBCHK ;Check tube present and top two bytes of address MOS74 0780 F865 v64 MOS74 0802 F86D F0 05 BEQ WRBKL6 ;Yes, continue. (Note TAX done in TUBCHK) MOS74 0780 F865 v64 MOS74 0803 F86F AD E5 FE LDA TREG3 ;No, get from tube MOS74 0780 F865 v64 MOS74 0804 F872 90 02 BCC WRBKL7 ;skip IO read (always; TUBCHK returns CC if Tube) MOS74 0780 F865 v64 MOS74 0805 F874 MOS74 MOS74 MOS74 MOS74 Acorn macro assembler Page 138 MOS74 C.F.S. UTILITIES - MOS74 MOS74 MOS74 0780 F865 v64 MOS74 0806 F874 WRBKL6 MOS74 0780 F865 v64 MOS74 0807 F874 B1 B0 LDAIY BKADDR ;Load byte from IO proc. MOS74 0780 F865 v64 MOS74 0808 F876 WRBKL7 MOS74 0780 F865 v64 MOS74 0809 F876 | MOS74 0780 F865 v64 MOS74 0811 F876 ] MOS74 0780 F865 v64 MOS74 0812 F876 ] MOS74 0780 F865 v64 MOS74 0813 F876 MOS74 0780 F865 v64 MOS74 0814 F876 20 72 F0 JSR PUTCHK ;Output data MOS74 0780 F865 v64 MOS74 0815 F879 C8 INY MOS74 0780 F865 v64 MOS74 0816 F87A CC C8 03 CPY INFO +BKSZEL MOS74 0780 F865 v64 MOS74 0817 F87D D0 EB BNE WRBKL3 MOS74 0780 F865 v64 MOS74 0818 F87F MOS74 0780 F865 v64 MOS74 0819 F87F 20 A2 F8 JSR PUTCRC MOS74 0780 F865 v64 MOS74 0820 F882 20 AB F8 WRBKEM JSR IWAIT ;Wait for irupt => char on tape -- MOS74 0821 F885 20 AB F8 JSR IWAIT -- MOS74 0822 F888 20 3A FB JSR CRESET ;Reset for interblock gap -- MOS74 0823 F88B A9 01 LDAIM &01 -- MOS74 0824 F88D 20 BF F8 JSR PAUSE ;1/10 sec delay to clear heads -- MOS74 0825 F890 28 PLP ;Restore I'rupt status -- MOS74 0826 F891 -- MOS74 0827 F891 20 E0 F8 JSR SAVHDR ;Finally, print info -- MOS74 0828 F894 2C CA 03 BIT INFO +BKFLAG -- MOS74 0829 F897 10 08 BPL WRBKEX ;Not last block MOS74 0829 F897 v77 MOS74 0830 F899 08 PHP MOS74 0829 F897 v77 MOS74 0831 F89A 20 B9 F8 JSR TAIL MOS74 0829 F897 v77 MOS74 0832 F89D 20 D8 F2 JSR FINOP MOS74 0829 F897 v77 MOS74 0833 F8A0 28 PLP MOS74 0829 F897 v77 MOS74 0834 F8A1 MOS74 0829 F897 v77 MOS74 0835 F8A1 ;Exit MI if last block, PL otherwise MOS74 0829 F897 v77 MOS74 0836 F8A1 60 WRBKEX RTS -- MOS74 0837 F8A2 -- MOS74 0838 F8A2 -- MOS74 0839 F8A2 -- MOS74 0840 F8A2 -- MOS74 0841 F8A2 -- MOS74 0842 F8A2 -- MOS74 0843 F8A2 [ MOS125 = &FF -- MOS74 0850 F8A2 ] -- MOS74 0851 F8A2 -- MOS74 0852 F8A2 -- MOS74 0853 F8A2 -- MOS74 0854 F8A2 -- MOS74 0855 F8A2 A5 BF PUTCRC LDA CHKSUM +&01 -- MOS74 0856 F8A4 20 A9 F8 JSR PUTCAS -- MOS74 0857 F8A7 A5 BE LDA CHKSUM -- MOS74 0858 F8A9 -- MOS74 0859 F8A9 -- MOS74 0860 F8A9 PUTCAS -- MOS74 0861 F8A9 -- MOS74 0862 F8A9 ;Put byte to cassette -- MOS74 0863 F8A9 -- MOS74 0864 F8A9 85 BD STA IBUF -- MOS74 0865 F8AB -- MOS74 0866 F8AB 20 89 F9 IWAIT JSR ESCAPE MOS74 0868 F8B0 ^79 MOS74 0867 F8AE 24 C0 BIT IFLAG MOS74 0868 F8B0 ^79 MOS74 0868 F8B0 10 F9 BPL IWAIT -- MOS74 0869 F8B2 -- MOS74 0870 F8B2 A9 00 LDAIM &00 -- MOS74 0871 F8B4 85 C0 STA IFLAG ;Zero IFLAG -- MOS74 0872 F8B6 A5 BD LDA IBUF ;Restore A -- MOS74 0873 F8B8 60 RTS ;Note V preserved -- MOS74 0874 F8B9 -- MOS74 0875 F8B9 -- MOS74 0876 F8B9 -- MOS74 0877 F8B9 LEADER -- MOS74 0878 F8B9 -- MOS74 0879 F8B9 TAIL -- MOS74 0880 F8B9 -- MOS74 0881 F8B9 ;Assumes RESET done by WRBLOK -- MOS74 0882 F8B9 -- MOS74 0883 F8B9 A9 32 LDAIM &32 -- MOS74 0884 F8BB D0 02 BNE PAUSE ;5 secs hitone altogether. MOS74 0884 F8BB v7D MOS74 0885 F8BD MOS74 0884 F8BB v7D MOS74 0886 F8BD MOS74 0884 F8BB v7D MOS74 0887 F8BD MOS74 0884 F8BB v7D MOS74 0888 F8BD PUTGAP MOS74 0884 F8BB v7D MOS74 0889 F8BD MOS74 0884 F8BB v7D MOS74 0890 F8BD ;Note is assumed indivisible by PUTBYT MOS74 0884 F8BB v7D MOS74 0891 F8BD MOS74 0884 F8BB v7D MOS74 0892 F8BD A5 C7 LDA GAPTIM MOS74 0884 F8BB v7D MOS74 0893 F8BF MOS74 0884 F8BB v7D MOS74 0894 F8BF PAUSE MOS74 0884 F8BB v7D MOS74 0895 F8BF MOS74 0884 F8BB v7D MOS74 0896 F8BF ;Pause for A/10 secs (while putting out MOS74 0884 F8BB v7D MOS74 0897 F8BF ;leaders and gaps mainly). MOS74 0884 F8BB v7D MOS74 0898 F8BF MOS74 0884 F8BB v7D MOS74 0899 F8BF A2 05 LDXIM &05 -- MOS74 0900 F8C1 8D 40 02 PSLOP1 STA CYCLE MOS74 0905 F8CD ^72 MOS74 0901 F8C4 20 89 F9 PSLOOP JSR ESCAPE MOS74 0905 F8CD ^72 MOS74 0902 F8C7 2C 40 02 BIT CYCLE MOS74 0905 F8CD ^72 MOS74 0903 F8CA 10 F8 BPL PSLOOP MOS74 0905 F8CD ^72 MOS74 0904 F8CC CA DEX MOS74 0905 F8CD ^72 MOS74 0905 F8CD D0 F2 BNE PSLOP1 -- MOS74 0906 F8CF 60 RTS -- MOS74 0907 F8D0 -- MOS74 0908 F8D0 -- MOS74 0909 F8D0 -- MOS74 0910 F8D0 PRTHDR -- MOS74 0911 F8D0 -- MOS74 0912 F8D0 ;Print header details. -- MOS74 0913 F8D0 ;Keeps count of file size and prints -- MOS74 0914 F8D0 ;total file length when last block is indicated. -- MOS74 0915 F8D0 ;Expects block info to be in INFO. -- MOS74 0916 F8D0 -- MOS74 0917 F8D0 -- MOS74 0918 F8D0 AD C6 03 LDA INFO +BKNOLO -- MOS74 0919 F8D3 0D C7 03 ORA INFO +BKNOHI -- MOS74 0920 F8D6 F0 05 BEQ PRTHL8 ;If first block, is new file MOS74 0920 F8D6 v7A MOS74 0921 F8D8 2C DF 03 BIT OLDFLG ;If previous block = last block MOS74 0920 F8D6 v7A MOS74 0922 F8DB 10 03 BPL PRTHL3 ;then new line MOS74 0920 F8D6 v7A MOS74 0923 F8DD MOS74 0920 F8D6 v7A MOS74 0924 F8DD PRTHDL MOS74 0920 F8D6 v7A MOS74 0925 F8DD 20 DB F2 PRTHL8 JSR NOOLN1 ;New line if messages on and no error MOS74 0922 F8DB v7C MOS74 0926 F8E0 MOS74 0922 F8DB v7C MOS74 0927 F8E0 SAVHDR MOS74 0922 F8DB v7C MOS74 0928 F8E0 MOS74 0922 F8DB v7C MOS74 0929 F8E0 ;Entry from WRBLOK MOS74 0922 F8DB v7C MOS74 0930 F8E0 MOS74 0922 F8DB v7C MOS74 0931 F8E0 [ MOS125 = &7F MOS74 0922 F8DB v7C MOS74 0932 F8E0 ;Set FSIZE here for correct OSFILE block whether messages on/off MOS74 0922 F8DB v7C MOS74 0933 F8E0 PRTHL3 MOS74 MOS74 MOS74 MOS74 Acorn macro assembler Page 139 MOS74 C.F.S. UTILITIES - MOS74 MOS74 MOS74 0922 F8DB v7C MOS74 0934 F8E0 AD C8 03 LDA INFO +BKSZEL -- MOS74 0935 F8E3 85 CC STA FSIZE -- MOS74 0936 F8E5 AD C6 03 LDA INFO +BKNOLO -- MOS74 0937 F8E8 18 CLC -- MOS74 0938 F8E9 6D C9 03 ADC INFO +BKSZEH -- MOS74 0939 F8EC 85 CD STA FSIZE + 1 -- MOS74 0940 F8EE A0 00 LDYIM &00 -- MOS74 0941 F8F0 | -- MOS74 0943 F8F0 ] -- MOS74 0944 F8F0 84 BA STY ERRSW -- MOS74 0945 F8F2 AD CA 03 LDA INFO +BKFLAG -- MOS74 0946 F8F5 8D DF 03 STA OLDFLG ;Set prev. flag -- MOS74 0947 F8F8 -- MOS74 0948 F8F8 -- MOS74 0949 F8F8 20 55 EA JSR MSGON -- MOS74 0950 F8FB F0 61 BEQ PRTHLX ;Messages off => exit MOS74 0950 F8FB v1E MOS74 0951 F8FD MOS74 0950 F8FB v1E MOS74 0952 F8FD [ MOS125 = &FF MOS74 0950 F8FB v1E MOS74 0955 F8FD | MOS74 0950 F8FB v1E MOS74 0956 F8FD 20 EC FF JSR WRCR MOS74 0950 F8FB v1E MOS74 0957 F900 ] MOS74 0950 F8FB v1E MOS74 0958 F900 MOS74 0950 F8FB v1E MOS74 0959 F900 ; Note assumed here Y is preserved over MOS74 0950 F8FB v1E MOS74 0960 F900 ;calls to MSGON and OSWRCH. MOS74 0950 F8FB v1E MOS74 0961 F900 MOS74 0950 F8FB v1E MOS74 0962 F900 B9 B2 03 PRTHL1 LDAAY INFO MOS74 0950 F8FB v1E MOS74 0963 F903 F0 10 BEQ PRTHL2 ;Zero terminator for filename MOS74 0950 F8FB v1E MOS74 0964 F905 MOS74 0950 F8FB v1E MOS74 0965 F905 C9 20 CMPIM &20 MOS74 0950 F8FB v1E MOS74 0966 F907 90 04 BCC PRTHLD ;A<$20 => control char => invalid MOS74 0950 F8FB v1E MOS74 0967 F909 C9 7F CMPIM &7F MOS74 0950 F8FB v1E MOS74 0968 F90B 90 02 BCC PRTHLC ;$20<=A<$7F => Valid MOS74 0950 F8FB v1E MOS74 0969 F90D MOS74 0950 F8FB v1E MOS74 0970 F90D A9 3F PRTHLD LDAIM "?" ;Otherwise, print ?? MOS74 0950 F8FB v1E MOS74 0971 F90F 20 EE FF PRTHLC JSR OSWRCH ;Write file title MOS74 0950 F8FB v1E MOS74 0972 F912 C8 INY MOS74 0950 F8FB v1E MOS74 0973 F913 D0 EB BNE PRTHL1 MOS74 0950 F8FB v1E MOS74 0974 F915 MOS74 0950 F8FB v1E MOS74 0975 F915 AD 47 02 PRTHL2 LDA SROMSW MOS74 0950 F8FB v1E MOS74 0976 F918 F0 04 BEQ PRTHLF ;In CFS -> continue MOS74 0950 F8FB v1E MOS74 0977 F91A 24 BB BIT USFLGS MOS74 0950 F8FB v1E MOS74 0978 F91C 50 40 BVC PRTHLX ;SFS short msgs => file name only MOS74 0950 F8FB v1E MOS74 0979 F91E MOS74 0950 F8FB v1E MOS74 0980 F91E 20 85 F9 PRTHLF JSR PRTSP MOS74 0950 F8FB v1E MOS74 0981 F921 C8 INY MOS74 0950 F8FB v1E MOS74 0982 F922 C0 0B CPYIM FTSIZE MOS74 0950 F8FB v1E MOS74 0983 F924 90 EF BCC PRTHL2 MOS74 0950 F8FB v1E MOS74 0984 F926 MOS74 0950 F8FB v1E MOS74 0985 F926 AD C6 03 LDA INFO +BKNOLO MOS74 0950 F8FB v1E MOS74 0986 F929 AA TAX ;Store for final length MOS74 0950 F8FB v1E MOS74 0987 F92A 20 6F F9 JSR WHEX ;Write block no. lo MOS74 0950 F8FB v1E MOS74 0988 F92D MOS74 0950 F8FB v1E MOS74 0989 F92D 2C CA 03 BIT INFO +BKFLAG MOS74 0950 F8FB v1E MOS74 0990 F930 10 2C BPL PRTHLX ;Not last block -> finish MOS74 0950 F8FB v1E MOS74 0991 F932 MOS74 0950 F8FB v1E MOS74 0992 F932 ;Here, is last block -> print total length MOS74 0950 F8FB v1E MOS74 0993 F932 MOS74 0950 F8FB v1E MOS74 0994 F932 [ MOS125 = &7F MOS74 0950 F8FB v1E MOS74 0995 F932 A5 CD LDA FSIZE + 1 MOS74 0950 F8FB v1E MOS74 0996 F934 20 6A F9 JSR WSPHEX MOS74 0950 F8FB v1E MOS74 0997 F937 A5 CC LDA FSIZE MOS74 0950 F8FB v1E MOS74 0998 F939 | MOS74 0950 F8FB v1E MOS74 1010 F939 ] MOS74 0950 F8FB v1E MOS74 1011 F939 20 6F F9 JSR WHEX MOS74 0950 F8FB v1E MOS74 1012 F93C MOS74 0950 F8FB v1E MOS74 1013 F93C 24 BB BIT USFLGS MOS74 0950 F8FB v1E MOS74 1014 F93E 50 1E BVC PRTHLX ;=> Short messages => exit MOS74 0950 F8FB v1E MOS74 1015 F940 MOS74 0950 F8FB v1E MOS74 1016 F940 ;Here doing long messages MOS74 0950 F8FB v1E MOS74 1017 F940 MOS74 0950 F8FB v1E MOS74 1018 F940 A2 04 LDXIM &04 MOS74 0950 F8FB v1E MOS74 1019 F942 20 85 F9 PRTHLV JSR PRTSP MOS74 0950 F8FB v1E MOS74 1020 F945 CA DEX MOS74 0950 F8FB v1E MOS74 1021 F946 D0 FA BNE PRTHLV MOS74 0950 F8FB v1E MOS74 1022 F948 MOS74 0950 F8FB v1E MOS74 1023 F948 A2 0F LDXIM BKLOAD +&03 MOS74 0950 F8FB v1E MOS74 1024 F94A 20 52 F9 JSR PRTHLT MOS74 0950 F8FB v1E MOS74 1025 F94D 20 85 F9 JSR PRTSP MOS74 0950 F8FB v1E MOS74 1026 F950 A2 13 LDXIM BKEXEC +&03 MOS74 0950 F8FB v1E MOS74 1027 F952 MOS74 0950 F8FB v1E MOS74 1028 F952 A0 04 PRTHLT LDYIM &04 MOS74 0950 F8FB v1E MOS74 1029 F954 BD B2 03 PRTHLU LDAAX INFO MOS74 0950 F8FB v1E MOS74 1030 F957 20 6F F9 JSR WHEX MOS74 0950 F8FB v1E MOS74 1031 F95A CA DEX MOS74 0950 F8FB v1E MOS74 1032 F95B 88 DEY MOS74 0950 F8FB v1E MOS74 1033 F95C D0 F6 BNE PRTHLU MOS74 0950 F8FB v1E MOS74 1034 F95E MOS74 0950 F8FB v1E MOS74 1035 F95E [ MOS125 = &FF MOS74 0950 F8FB v1E MOS74 1037 F95E ] MOS74 0950 F8FB v1E MOS74 1038 F95E 60 PRTHLX RTS -- MOS74 1039 F95F -- MOS74 1040 F95F -- MOS74 1041 F95F -- MOS74 1042 F95F -- MOS74 1043 F95F [ MOS125 = &FF -- MOS74 1065 F95F ] -- MOS74 1066 F95F -- MOS74 1067 F95F -- MOS74 1068 F95F LNK MOS76 -- MOS76 0001 F95F -- MOS76 0002 F95F TTL C.F.S. - I/O Utilities -> MOS76 -- MOS76 0003 F95F OPT MOS76 MOS76 MOS76 MOS76 MOS76 Acorn macro assembler Page 140 MOS76 C.F.S. - I/O Utilities -> MOS76 MOS76 -- MOS76 0004 F95F -- MOS76 0005 F95F -- MOS76 0006 F95F ;****** UTILITIES II ****** -- MOS76 0007 F95F -- MOS76 0008 F95F ADDBKA -- MOS76 0009 F95F -- MOS76 0010 F95F ;Increment block pointer by 256 bytes, assuming that -- MOS76 0011 F95F ;block received is 256 bytes long. Note BKADDR is 4 bytes -- MOS76 0012 F95F -- MOS76 0013 F95F E6 B1 INC BKADDR +&01 -- MOS76 0014 F961 D0 06 BNE ADDBK1 MOS76 0014 F961 v79 MOS76 0015 F963 E6 B2 INC BKADDR +&02 MOS76 0014 F961 v79 MOS76 0016 F965 D0 02 BNE ADDBK1 MOS76 0014 F961 v79 MOS76 0017 F967 E6 B3 INC BKADDR +&03 MOS76 0014 F961 v79 MOS76 0018 F969 60 ADDBK1 RTS -- MOS76 0019 F96A -- MOS76 0020 F96A -- MOS76 0021 F96A -- MOS76 0022 F96A -- MOS76 0023 F96A 48 WSPHEX PHA -- MOS76 0024 F96B 20 85 F9 JSR PRTSP -- MOS76 0025 F96E 68 PLA -- MOS76 0026 F96F 48 WHEX PHA -- MOS76 0027 F970 4A LSRA -- MOS76 0028 F971 4A LSRA -- MOS76 0029 F972 4A LSRA -- MOS76 0030 F973 4A LSRA -- MOS76 0031 F974 20 78 F9 JSR WDIGIT -- MOS76 0032 F977 68 PLA -- MOS76 0033 F978 [ MOS125 = &FF -- MOS76 0037 F978 | -- MOS76 0038 F978 29 0F WDIGIT ANDIM &0F -- MOS76 0039 F97A 09 30 ORAIM "0" -- MOS76 0040 F97C ] -- MOS76 0041 F97C C9 3A CMPIM &3A -- MOS76 0042 F97E 90 02 BCC HXDSKP MOS76 0042 F97E v7D MOS76 0043 F980 69 06 ADCIM &06 MOS76 0042 F97E v7D MOS76 0044 F982 4C EE FF HXDSKP JMP OSWRCH MOS76 0050 F987 ^79 MOS76 0045 F985 MOS76 0050 F987 ^79 MOS76 0046 F985 MOS76 0050 F987 ^79 MOS76 0047 F985 MOS76 0050 F987 ^79 MOS76 0048 F985 MOS76 0050 F987 ^79 MOS76 0049 F985 A9 20 PRTSP LDAIM SPACE MOS76 0050 F987 ^79 MOS76 0050 F987 D0 F9 BNE HXDSKP -- MOS76 0051 F989 -- MOS76 0052 F989 -- MOS76 0053 F989 ESCAPE -- MOS76 0054 F989 -- MOS76 0055 F989 ;Checks ESCAPE happened. If so, does error -- MOS76 0056 F989 ;break with appropriate message after -- MOS76 0057 F989 ;acknowldging the ESCAPE. -- MOS76 0058 F989 -- MOS76 0059 F989 ;Also switches off various status bits -- MOS76 0060 F989 ;Motor switched OFF -- MOS76 0061 F989 -- MOS76 0062 F989 ;Note, no test is done if inside WRCH or RDCH -- MOS76 0063 F989 ;so that ESCAPE cannot occur inside EXEC/SPOOL -- MOS76 0064 F989 -- MOS76 0065 F989 08 PHP -- MOS76 0066 F98A 24 EB BIT ESSEMA -- MOS76 0067 F98C 30 04 BMI ESCLL0 ;Inside WRCH or RDCH -> no ESCAPE MOS76 0067 F98C v7B MOS76 0068 F98E 24 FF BIT ESCADD MOS76 0067 F98C v7B MOS76 0069 F990 30 02 BMI ESCERR MOS76 0067 F98C v7B MOS76 0070 F992 ESCLL0 MOS76 0067 F98C v7B MOS76 0071 F992 28 PLP MOS76 0069 F990 v7D MOS76 0072 F993 60 RTS MOS76 0069 F990 v7D MOS76 0073 F994 MOS76 0069 F990 v7D MOS76 0074 F994 ESCERR MOS76 0069 F990 v7D MOS76 0075 F994 MOS76 0069 F990 v7D MOS76 0076 F994 20 3B F3 JSR CATOFF ;Switch CAT bit off -- MOS76 0077 F997 20 E6 FA JSR CASMOF ;Motor OFF/release -- MOS76 0078 F99A -- MOS76 0079 F99A A9 7E LDAIM &7E -- MOS76 0080 F99C 20 F4 FF JSR OSBYTE ;Acknowledge ESC to MOS -- MOS76 0081 F99F -- MOS76 0082 F99F 00 BRK ;Then error -- MOS76 0083 F9A0 11 45 73 = &11,"Escape",0 -- MOS76 0084 F9A8 -- MOS76 0085 F9A8 -- MOS76 0086 F9A8 -- MOS76 0087 F9A8 -- MOS76 0088 F9A8 -- MOS76 0089 F9A8 98 LODHDR TYA -- MOS76 0090 F9A9 F0 0D BEQ LODHD1 ;Print message depending on Y MOS76 0090 F9A9 v72 MOS76 0091 F9AB 20 3A FA JSR MSGOUT MOS76 0090 F9A9 v72 MOS76 0092 F9AE 0D 4C 6F = MCR,"Loading",MCR,0 MOS76 0090 F9A9 v72 MOS76 0093 F9B8 MOS76 0090 F9A9 v72 MOS76 0094 F9B8 MOS76 0090 F9A9 v72 MOS76 0095 F9B8 MOS76 0090 F9A9 v72 MOS76 0096 F9B8 LODHD1 MOS76 0090 F9A9 v72 MOS76 0097 F9B8 MOS76 0090 F9A9 v72 MOS76 0098 F9B8 85 BA STA ERRSW ;A always zero at this point -- MOS76 0099 F9BA ;Set ERRSW so always extra line after "Loading" -- MOS76 0100 F9BA ;and before file name. -- MOS76 0101 F9BA -- MOS76 0102 F9BA -- MOS76 0103 F9BA A2 FF LDXIM &FF ;Set "abort if nesc." flag -- MOS76 0104 F9BC A5 C1 LDA HDRCRC -- MOS76 0105 F9BE D0 0D BNE HDRCHK ;Header CRC error takes precedence over MOS76 0105 F9BE v72 MOS76 0106 F9C0 ;file and block errors, since a header error may MOS76 0105 F9BE v72 MOS76 0107 F9C0 ;spuriously cause either or both of these. MOS76 0105 F9BE v72 MOS76 0108 F9C0 MOS76 0105 F9BE v72 MOS76 0109 F9C0 20 66 FA JSR CMPFT MOS76 0105 F9BE v72 MOS76 0110 F9C3 MOS76 0105 F9BE v72 MOS76 0111 F9C3 08 PHP ;Store EQ bit from CMPFT MOS76 0105 F9BE v72 MOS76 0112 F9C4 A2 FF LDXIM &FF ;Set "abort if nesc." flag MOS76 0105 F9BE v72 MOS76 0113 F9C6 A0 8D LDYIM FILEER MOS76 0105 F9BE v72 MOS76 0114 F9C8 A9 FA LDAIM /(FILEER ) ;Set error pointers MOS76 0105 F9BE v72 MOS76 0115 F9CA 28 PLP MOS76 0105 F9BE v72 MOS76 0116 F9CB MOS76 0105 F9BE v72 MOS76 0117 F9CB D0 1C BNE TAPER0 ;Files don't match MOS76 0117 F9CB v63 MOS76 0118 F9CD MOS76 0117 F9CB v63 MOS76 0119 F9CD CATERR ;Entry from catalogue here MOS76 0117 F9CB v63 MOS76 0120 F9CD HDRCHK MOS76 0117 F9CB v63 MOS76 0121 F9CD A0 82 LDYIM DATAER ;Set lo byte of error pointer MOS76 0117 F9CB v63 MOS76 0122 F9CF A5 C1 LDA HDRCRC ;Was header CRC ok ? MOS76 0117 F9CB v63 MOS76 0123 F9D1 F0 04 BEQ CHKBKN ;Yes, check block no. MOS76 0117 F9CB v63 MOS76 0124 F9D3 A9 FA LDAIM /(DATAER ) ;No, do error MOS76 0117 F9CB v63 MOS76 0125 F9D5 D0 12 BNE TAPER0 MOS76 0117 F9CB v63 MOS76 0126 F9D7 MOS76 0117 F9CB v63 MOS76 0127 F9D7 MOS76 MOS76 MOS76 MOS76 Acorn macro assembler Page 141 MOS76 C.F.S. - I/O Utilities -> MOS76 MOS76 MOS76 0117 F9CB v63 MOS76 0128 F9D7 AD C6 03 CHKBKN LDA INFO +BKNOLO ;Is expected block ?? MOS76 0117 F9CB v63 MOS76 0129 F9DA C5 B4 CMP BLOKNO MOS76 0117 F9CB v63 MOS76 0130 F9DC D0 07 BNE BLKERR MOS76 0117 F9CB v63 MOS76 0131 F9DE AD C7 03 LDA INFO +BKNOHI MOS76 0117 F9CB v63 MOS76 0132 F9E1 C5 B5 CMP BLOKNO +&01 MOS76 0117 F9CB v63 MOS76 0133 F9E3 F0 13 BEQ CHEKSM ;No error -> go on MOS76 0117 F9CB v63 MOS76 0134 F9E5 MOS76 0117 F9CB v63 MOS76 0135 F9E5 A0 98 BLKERR LDYIM BLOKER MOS76 0117 F9CB v63 MOS76 0136 F9E7 A9 FA LDAIM /(BLOKER ) MOS76 0117 F9CB v63 MOS76 0137 F9E9 MOS76 0117 F9CB v63 MOS76 0138 F9E9 48 TAPER0 PHA ;Store error ptr. MOS76 0133 F9E3 v6C MOS76 0139 F9EA 98 TYA MOS76 0133 F9E3 v6C MOS76 0140 F9EB 48 PHA MOS76 0133 F9E3 v6C MOS76 0141 F9EC 8A TXA ;Store "abort if nesc." flag MOS76 0133 F9E3 v6C MOS76 0142 F9ED 48 PHA MOS76 0133 F9E3 v6C MOS76 0143 F9EE 20 DD F8 JSR PRTHDL ;Print header ON NEW LINE MOS76 0133 F9E3 v6C MOS76 0144 F9F1 68 PLA MOS76 0133 F9E3 v6C MOS76 0145 F9F2 AA TAX MOS76 0133 F9E3 v6C MOS76 0146 F9F3 68 PLA MOS76 0133 F9E3 v6C MOS76 0147 F9F4 A8 TAY MOS76 0133 F9E3 v6C MOS76 0148 F9F5 68 PLA MOS76 0133 F9E3 v6C MOS76 0149 F9F6 D0 14 BNE TAPERR MOS76 0149 F9F6 v6B MOS76 0150 F9F8 MOS76 0149 F9F6 v6B MOS76 0151 F9F8 8A CHEKSM TXA MOS76 0149 F9F6 v6B MOS76 0152 F9F9 48 PHA ;Store X over possible IRUPT call MOS76 0149 F9F6 v6B MOS76 0153 F9FA 20 D0 F8 JSR PRTHDR ; Print header info. MOS76 0149 F9F6 v6B MOS76 0154 F9FD MOS76 0149 F9F6 v6B MOS76 0155 F9FD 20 CA FA JSR CHEKLP ;Wait for end of BG job MOS76 0149 F9F6 v6B MOS76 0156 FA00 ;In SFS, CHEKLP reads next SFS block MOS76 0149 F9F6 v6B MOS76 0157 FA00 MOS76 0149 F9F6 v6B MOS76 0158 FA00 ;Note X & Y corrupted by IRUPT, which MOS76 0149 F9F6 v6B MOS76 0159 FA00 ;is only called when SROM system active. MOS76 0149 F9F6 v6B MOS76 0160 FA00 ;Y is restored at ERREXT. MOS76 0149 F9F6 v6B MOS76 0161 FA00 ; MOS76 0149 F9F6 v6B MOS76 0162 FA00 68 PLA MOS76 0149 F9F6 v6B MOS76 0163 FA01 AA TAX ;Restore "abort if nesc." flag MOS76 0149 F9F6 v6B MOS76 0164 FA02 MOS76 0149 F9F6 v6B MOS76 0165 FA02 A5 BE LDA CHKSUM MOS76 0149 F9F6 v6B MOS76 0166 FA04 05 BF ORA CHKSUM +&01 MOS76 0149 F9F6 v6B MOS76 0167 FA06 F0 79 BEQ ERREXX ;No errors, tape ok, exit MOS76 0167 FA06 v06 MOS76 0168 FA08 MOS76 0167 FA06 v06 MOS76 0169 FA08 A0 82 LDYIM DATAER ;Set message ptr. MOS76 0167 FA06 v06 MOS76 0170 FA0A A9 FA LDAIM /(DATAER ) MOS76 0167 FA06 v06 MOS76 0171 FA0C MOS76 0167 FA06 v06 MOS76 0172 FA0C C6 BA TAPERR DEC ERRSW MOS76 0167 FA06 v06 MOS76 0173 FA0E 48 PHA ;Store hi byte of error pointer MOS76 0167 FA06 v06 MOS76 0174 FA0F MOS76 0167 FA06 v06 MOS76 0175 FA0F 24 EB BIT ESSEMA MOS76 0167 FA06 v06 MOS76 0176 FA11 30 0D BMI ERRABT ;During EXEC/SPOOL can ABORT ONLY ! MOS76 0167 FA06 v06 MOS76 0177 FA13 MOS76 0167 FA06 v06 MOS76 0178 FA13 8A TXA ;If X = 0 => print only, X = $FF abort if nesc. MOS76 0167 FA06 v06 MOS76 0179 FA14 2D 47 02 AND SROMSW ;If not cataloging, and SROM => abort MOS76 0167 FA06 v06 MOS76 0180 FA17 D0 07 BNE ERRABT MOS76 0167 FA06 v06 MOS76 0181 FA19 8A TXA ;Otherwise, check if "abort on error" option set MOS76 0167 FA06 v06 MOS76 0182 FA1A ;If so, do BRK MOS76 0167 FA06 v06 MOS76 0183 FA1A MOS76 0167 FA06 v06 MOS76 0184 FA1A 29 11 ANDIM ABTBIT MOS76 0167 FA06 v06 MOS76 0185 FA1C 25 BB AND USFLGS MOS76 0167 FA06 v06 MOS76 0186 FA1E F0 10 BEQ PRTERR ;Abort not set => print MOS76 0167 FA06 v06 MOS76 0187 FA20 MOS76 0167 FA06 v06 MOS76 0188 FA20 68 ERRABT PLA MOS76 0167 FA06 v06 MOS76 0189 FA21 85 B9 STA FTPTR +&01 ;Set error pointer MOS76 0167 FA06 v06 MOS76 0190 FA23 84 B8 STY FTPTR MOS76 0167 FA06 v06 MOS76 0191 FA25 20 C1 F6 JSR ECLOSE ;close EXEC file MOS76 0167 FA06 v06 MOS76 0192 FA28 46 EB LSR ESSEMA ;Switch off critical region MOS76 0167 FA06 v06 MOS76 0193 FA2A 20 DC FA JSR BEEPOF ;Motor off/BEEP MOS76 0167 FA06 v06 MOS76 0194 FA2D 6C B8 00 JMI FTPTR ;Abort = break with error msg. MOS76 0167 FA06 v06 MOS76 0195 FA30 MOS76 0167 FA06 v06 MOS76 0196 FA30 68 PRTERR PLA ;Restore hi byte of pointer MOS76 0167 FA06 v06 MOS76 0197 FA31 MOS76 0167 FA06 v06 MOS76 0198 FA31 ;Now must add ONE to pointer to get past BRK MOS76 0167 FA06 v06 MOS76 0199 FA31 ;at front of message. Note MSGOUT does an INC MOS76 0167 FA06 v06 MOS76 0200 FA31 ;before printing, so don't have to add 2. MOS76 0167 FA06 v06 MOS76 0201 FA31 MOS76 0167 FA06 v06 MOS76 0202 FA31 C8 INY ;Inc lo byte past BRK instruction MOS76 0167 FA06 v06 MOS76 0203 FA32 D0 03 BNE PRTEON MOS76 0167 FA06 v06 MOS76 0204 FA34 18 CLC MOS76 0167 FA06 v06 MOS76 0205 FA35 69 01 ADCIM &01 MOS76 0167 FA06 v06 MOS76 0206 FA37 48 PRTEON PHA ;Set stack for MSGOUT MOS76 0167 FA06 v06 MOS76 0207 FA38 98 TYA MOS76 0167 FA06 v06 MOS76 0208 FA39 48 PHA MOS76 0167 FA06 v06 MOS76 0209 FA3A ; Print message and enter code MOS76 0167 FA06 v06 MOS76 0210 FA3A ; directly AFTER message MOS76 0167 FA06 v06 MOS76 0211 FA3A ; MOS76 0167 FA06 v06 MOS76 0212 FA3A MSGOUT MOS76 0167 FA06 v06 MOS76 0213 FA3A MOS76 0167 FA06 v06 MOS76 0214 FA3A ;Enter here for messages printed if MSGON MOS76 0167 FA06 v06 MOS76 0215 FA3A ;Note, X must be preserved MOS76 0167 FA06 v06 MOS76 0216 FA3A MOS76 0167 FA06 v06 MOS76 0217 FA3A 20 55 EA JSR MSGON MOS76 0167 FA06 v06 MOS76 0218 FA3D A8 TAY ;Store for STROUT MOS76 0167 FA06 v06 MOS76 0219 FA3E MOS76 0167 FA06 v06 MOS76 0220 FA3E STROUT MOS76 0167 FA06 v06 MOS76 0221 FA3E MOS76 0167 FA06 v06 MOS76 0222 FA3E MOS76 0167 FA06 v06 MOS76 0223 FA3E 68 PLA MOS76 0167 FA06 v06 MOS76 0224 FA3F 85 B8 STA FTPTR MOS76 0167 FA06 v06 MOS76 0225 FA41 68 PLA MOS76 0167 FA06 v06 MOS76 0226 FA42 85 B9 STA FTPTR +&01 MOS76 0167 FA06 v06 MOS76 0227 FA44 98 TYA MOS76 0167 FA06 v06 MOS76 0228 FA45 08 PHP ;Z bit => print MOS76 0167 FA06 v06 MOS76 0229 FA46 E6 B8 VSTRLP INC FTPTR MOS76 0167 FA06 v06 MOS76 0230 FA48 D0 02 BNE VSTRL1 MOS76 0167 FA06 v06 MOS76 0231 FA4A E6 B9 INC FTPTR +&01 MOS76 0167 FA06 v06 MOS76 0232 FA4C A0 00 VSTRL1 LDYIM &00 MOS76 0167 FA06 v06 MOS76 0233 FA4E B1 B8 LDAIY FTPTR MOS76 0167 FA06 v06 MOS76 0234 FA50 F0 0A BEQ VSTREX MOS76 0167 FA06 v06 MOS76 0235 FA52 28 PLP MOS76 0167 FA06 v06 MOS76 0236 FA53 08 PHP MOS76 0167 FA06 v06 MOS76 0237 FA54 F0 F0 BEQ VSTRLP ;If Z set => don't print MOS76 0167 FA06 v06 MOS76 0238 FA56 20 E3 FF JSR OSASCI MOS76 0167 FA06 v06 MOS76 0239 FA59 4C 46 FA JMP VSTRLP MOS76 0167 FA06 v06 MOS76 0240 FA5C 28 VSTREX PLP ;Restore stack MOS76 0167 FA06 v06 MOS76 0241 FA5D E6 B8 INC FTPTR MOS76 0167 FA06 v06 MOS76 0242 FA5F D0 02 BNE VSTREZ MOS76 0167 FA06 v06 MOS76 0243 FA61 E6 B9 INC FTPTR +&01 MOS76 0167 FA06 v06 MOS76 0244 FA63 MOS76 0167 FA06 v06 MOS76 0245 FA63 ;Exit always with Z CLEAR MOS76 0167 FA06 v06 MOS76 0246 FA63 MOS76 0167 FA06 v06 MOS76 0247 FA63 6C B8 00 VSTREZ JMI FTPTR MOS76 0167 FA06 v06 MOS76 0248 FA66 MOS76 MOS76 MOS76 MOS76 Acorn macro assembler Page 142 MOS76 C.F.S. - I/O Utilities -> MOS76 MOS76 MOS76 0167 FA06 v06 MOS76 0249 FA66 MOS76 0167 FA06 v06 MOS76 0250 FA66 CMPFT MOS76 0167 FA06 v06 MOS76 0251 FA66 A2 FF LDXIM &FF MOS76 0167 FA06 v06 MOS76 0252 FA68 CMPFT2 MOS76 0167 FA06 v06 MOS76 0253 FA68 E8 INX MOS76 0167 FA06 v06 MOS76 0254 FA69 CMPFT1 ;match filename, equating cases MOS76 0167 FA06 v06 MOS76 0255 FA69 BD D2 03 LDAAX FILNAM MOS76 0167 FA06 v06 MOS76 0256 FA6C D0 07 BNE CMPFT3 ;[not at end of filename] MOS76 0167 FA06 v06 MOS76 0257 FA6E ; MOS76 0167 FA06 v06 MOS76 0258 FA6E ; at end of filename, either: MOS76 0167 FA06 v06 MOS76 0259 FA6E ; X=0 => match on filename "" (null filename) MOS76 0167 FA06 v06 MOS76 0260 FA6E ; X<>0 => INFO(X)=0 => match, <>0 => no match MOS76 0167 FA06 v06 MOS76 0261 FA6E ; MOS76 0167 FA06 v06 MOS76 0262 FA6E 8A TXA MOS76 0167 FA06 v06 MOS76 0263 FA6F F0 03 BEQ CMPFT0 ;[match on filename "", return EQ status] MOS76 0167 FA06 v06 MOS76 0264 FA71 BD B2 03 LDAAX INFO MOS76 0167 FA06 v06 MOS76 0265 FA74 CMPFT0 ;EQ => match, NE => no match MOS76 0167 FA06 v06 MOS76 0266 FA74 60 RTS MOS76 0167 FA06 v06 MOS76 0267 FA75 MOS76 0167 FA06 v06 MOS76 0268 FA75 CMPFT3 ;not at end of filename MOS76 0167 FA06 v06 MOS76 0269 FA75 20 45 E5 JSR CAPS MOS76 0167 FA06 v06 MOS76 0270 FA78 5D B2 03 EORAX INFO MOS76 0167 FA06 v06 MOS76 0271 FA7B B0 02 BCS NALPHA MOS76 0167 FA06 v06 MOS76 0272 FA7D ; filename character is a letter MOS76 0167 FA06 v06 MOS76 0273 FA7D 29 DF ANDIM &DF ;equate cases MOS76 0167 FA06 v06 MOS76 0274 FA7F NALPHA MOS76 0167 FA06 v06 MOS76 0275 FA7F F0 E7 BEQ CMPFT2 MOS76 0167 FA06 v06 MOS76 0276 FA81 ; filenames not equal MOS76 0167 FA06 v06 MOS76 0277 FA81 ; return NE status MOS76 0167 FA06 v06 MOS76 0278 FA81 ERREXX ;Called from around CSON1 MOS76 0167 FA06 v06 MOS76 0279 FA81 60 RTS -- MOS76 0280 FA82 -- MOS76 0281 FA82 -- MOS76 0282 FA82 -- MOS76 0283 FA82 00 DATAER BRK -- MOS76 0284 FA83 D8 = CFSERJ -- MOS76 0285 FA84 0D 44 61 = MCR,"Data?",0 -- MOS76 0286 FA8B -- MOS76 0287 FA8B D0 15 BNE REWIND ;Z always CLEAR after MSGOUT MOS76 0287 FA8B v6A MOS76 0288 FA8D 00 FILEER BRK MOS76 0287 FA8B v6A MOS76 0289 FA8E DB = CFSERF MOS76 0287 FA8B v6A MOS76 0290 FA8F 0D 46 69 = MCR,"File?",0 MOS76 0287 FA8B v6A MOS76 0291 FA96 MOS76 0287 FA8B v6A MOS76 0292 FA96 D0 0A BNE REWIND ;Z always CLEAR after MSGOUT MOS76 0287 FA8B v6A MOS76 0293 FA98 00 BLOKER BRK MOS76 0287 FA8B v6A MOS76 0294 FA99 DA = CFSERH MOS76 0287 FA8B v6A MOS76 0295 FA9A 0D 42 6C = MCR,"Block?",0 MOS76 0287 FA8B v6A MOS76 0296 FAA2 MOS76 0287 FA8B v6A MOS76 0297 FAA2 MOS76 0287 FA8B v6A MOS76 0298 FAA2 A5 BA REWIND LDA ERRSW -- MOS76 0299 FAA4 F0 21 BEQ ERROEX ;If no error, leave MOS76 0299 FAA4 v5E MOS76 0300 FAA6 8A TXA MOS76 0299 FAA4 v5E MOS76 0301 FAA7 F0 1E BEQ ERROEX ;If only printing, no retry MOS76 0299 FAA4 v5E MOS76 0302 FAA9 A9 22 LDAIM RETBIT ;Otherwise, see if RETRY set MOS76 0299 FAA4 v5E MOS76 0303 FAAB 24 BB BIT USFLGS MOS76 0299 FAA4 v5E MOS76 0304 FAAD F0 18 BEQ ERROEX MOS76 0299 FAA4 v5E MOS76 0305 FAAF 20 3A FB JSR CRESET MOS76 0299 FAA4 v5E MOS76 0306 FAB2 A8 TAY ;Assume A is non-zero from RESET MOS76 0299 FAA4 v5E MOS76 0307 FAB3 20 3E FA JSR STROUT MOS76 0299 FAA4 v5E MOS76 0308 FAB6 0D 07 52 = MCR,BEL,"Rewind tape",MCR,MCR,0 MOS76 0299 FAA4 v5E MOS76 0309 FAC6 MOS76 0299 FAA4 v5E MOS76 0310 FAC6 MOS76 0299 FAA4 v5E MOS76 0311 FAC6 ;Note NZ set by VSTRIN here MOS76 0299 FAA4 v5E MOS76 0312 FAC6 60 CSON1 RTS MOS76 0299 FAA4 v5E MOS76 0313 FAC7 MOS76 0299 FAA4 v5E MOS76 0314 FAC7 MOS76 0299 FAA4 v5E MOS76 0315 FAC7 20 DF F2 ERROEX JSR NOOLIN ;New line if msgs on MOS76 0321 FACC ^78 MOS76 0316 FACA MOS76 0321 FACC ^78 MOS76 0317 FACA ;Wait for BG job to finish since if IGNORE set, must MOS76 0321 FACC ^78 MOS76 0318 FACA ;allow LOADs etc. to complete. MOS76 0321 FACC ^78 MOS76 0319 FACA MOS76 0321 FACC ^78 MOS76 0320 FACA A5 C2 CHEKLP LDA ITYPE MOS76 0329 FAD4 ^74 MOS76 0321 FACC F0 F8 BEQ CSON1 ;If BG job finished exit with EQ status MOS76 0329 FAD4 ^74 MOS76 0322 FACE MOS76 0329 FAD4 ^74 MOS76 0323 FACE ;Note: loop must check ITYPE first, coz may be no MOS76 0329 FAD4 ^74 MOS76 0324 FACE ;BG job in the case of zero length file. Therefore MOS76 0329 FAD4 ^74 MOS76 0325 FACE ;don't want to read next SROM byte. MOS76 0329 FAD4 ^74 MOS76 0326 FACE MOS76 0329 FAD4 ^74 MOS76 0327 FACE 20 89 F9 JSR ESCAPE MOS76 0329 FAD4 ^74 MOS76 0328 FAD1 AD 47 02 LDA SROMSW MOS76 0329 FAD4 ^74 MOS76 0329 FAD4 F0 F4 BEQ CHEKLP ;If no speech, wait for end -- MOS76 0330 FAD6 ;GoMMC tape patch has FAE0 NOP;NOP -- MOS76 0331 FAD6 20 BE F5 JSR IRUPT ;Otherwise, get next byte -- MOS76 0332 FAD9 4C CA FA JMP CHEKLP ;And loop -- MOS76 0333 FADC -- MOS76 0334 FADC -- MOS76 0335 FADC -- MOS76 0336 FADC ;CHIP CONTROL -- MOS76 0337 FADC -- MOS76 0338 FADC 20 55 EA BEEPOF JSR MSGON -- MOS76 0339 FADF F0 05 BEQ CASMOF MOS76 0339 FADF v7A MOS76 0340 FAE1 A9 07 LDAIM &07 MOS76 0339 FADF v7A MOS76 0341 FAE3 20 EE FF JSR OSWRCH ;Cannot use MSGOUT, coz called from inside it MOS76 0339 FADF v7A MOS76 0342 FAE6 A9 80 CASMOF LDAIM TUBERL ;Tube release number -- MOS76 0343 FAE8 20 B0 FB JSR TBINIT ;Release tube -- MOS76 0344 FAEB -- MOS76 0345 FAEB ;NOTE - TBINIT checks BKADDR. However, either at this point -- MOS76 0346 FAEB ;the tube has been claimed, in which case BKADDR is still a -- MOS76 0347 FAEB ;tube address and the release will go through; or the tube -- MOS76 0348 FAEB ;has not been claimed, in which case it don't matter if the -- MOS76 0349 FAEB ;release don't happen. NOTE also that a claim is done in -- MOS76 0350 FAEB ;TBINIT before the release, so that spurious claims may -- MOS76 0351 FAEB ;result depending on the values in BKADDR. These will, however -- MOS76 0352 FAEB ;be immediately released again. -- MOS76 0353 FAEB -- MOS76 0354 FAEB A2 00 LDXIM &00 -- MOS76 0355 FAED 20 8B FB JSR CMOTOR ;Motor off: drive set in MOTOR. -- MOS76 0356 FAF0 ; -- MOS76 0357 FAF0 RELEAS -- MOS76 0358 FAF0 ; called by CFS on exit from any cassette operation -- MOS76 0359 FAF0 ; N.B. RS423 might not have been claimed beforehand -- MOS76 0360 FAF0 ; -- MOS76 0361 FAF0 08 PHP -- MOS76 0362 FAF1 78 SEI ;must disable interrupts -- MOS76 0363 FAF2 ; -- MOS76 0364 FAF2 ; restore MOS 6850 and serproc byte -- MOS76 0365 FAF2 ; -- MOS76 0366 FAF2 AD 82 02 LDA SPREGA -- MOS76 0367 FAF5 8D 10 FE STA SERPRC -- MOS76 0368 FAF8 ; -- MOS76 0369 FAF8 A9 00 LDAIM ZERO MOS76 MOS76 MOS76 MOS76 Acorn macro assembler Page 143 MOS76 C.F.S. - I/O Utilities -> MOS76 MOS76 -- MOS76 0370 FAFA 85 EA STA RSTUT -- MOS76 0371 FAFC F0 01 BEQ RELX ;[ALWAYS jump] MOS76 0371 FAFC v7E MOS76 0372 FAFE ; MOS76 0371 FAFC v7E MOS76 0373 FAFE MC6850 MOS76 0371 FAFC v7E MOS76 0374 FAFE 08 PHP MOS76 0371 FAFC v7E MOS76 0375 FAFF ; MOS76 0371 FAFC v7E MOS76 0376 FAFF RELX MOS76 0371 FAFC v7E MOS76 0377 FAFF ; CORRUPTS A MOS76 0371 FAFC v7E MOS76 0378 FAFF ; setup MC6850 MOS76 0371 FAFC v7E MOS76 0379 FAFF ; disable Rx/Tx interrupts MOS76 0371 FAFC v7E MOS76 0380 FAFF ; divide by 64, 7 data bits + 1 stop bit, even parity MOS76 0371 FAFC v7E MOS76 0381 FAFF ; or 8 bits, one stop bit, no parity!! MOS76 0371 FAFC v7E MOS76 0382 FAFF ; MOS76 0371 FAFC v7E MOS76 0383 FAFF 20 3A FB JSR CRESET ;master reset -- MOS76 0384 FB02 ; -- MOS76 0385 FB02 ; reset data format bits -- MOS76 0386 FB02 ; -- MOS76 0387 FB02 AD 50 02 LDA RSCTFL -- MOS76 0388 FB05 ; -- MOS76 0389 FB05 4C 1C E2 JMP STARSC ;share code with 'RS423' -- MOS76 0390 FB08 -- MOS76 0391 FB08 -- MOS76 0392 FB08 RSWT1 -- MOS76 0393 FB08 28 PLP MOS76 0432 FB2F ^57 MOS76 0394 FB09 24 FF BIT ESCFLG MOS76 0432 FB2F ^57 MOS76 0395 FB0B 10 18 BPL CLAIM ;[no escape, ALWAYS jump] MOS76 0432 FB2F ^57 MOS76 0396 FB0D ; MOS76 0432 FB2F ^57 MOS76 0397 FB0D ; escape condition MOS76 0432 FB2F ^57 MOS76 0398 FB0D ; MOS76 0432 FB2F ^57 MOS76 0399 FB0D 60 RTS MOS76 0432 FB2F ^57 MOS76 0400 FB0E MOS76 0432 FB2F ^57 MOS76 0401 FB0E MOS76 0432 FB2F ^57 MOS76 0402 FB0E A5 E3 SETSDF LDA OPTS ;Set options for sequential access MOS76 0432 FB2F ^57 MOS76 0403 FB10 0A ASLA ;=> bottom nybble of OPTS MOS76 0432 FB2F ^57 MOS76 0404 FB11 0A ASLA MOS76 0432 FB2F ^57 MOS76 0405 FB12 0A ASLA MOS76 0432 FB2F ^57 MOS76 0406 FB13 0A ASLA MOS76 0432 FB2F ^57 MOS76 0407 FB14 85 BB STA USFLGS MOS76 0432 FB2F ^57 MOS76 0408 FB16 AD D1 03 LDA SEQGAP ;Set (variable) PUTBYTE gap time MOS76 0432 FB2F ^57 MOS76 0409 FB19 D0 08 BNE GAPOUT ;[ALWAYS JUMP] MOS76 0432 FB2F ^57 MOS76 0410 FB1B ; MOS76 0432 FB2F ^57 MOS76 0411 FB1B A5 E3 SETDEF LDA OPTS MOS76 0432 FB2F ^57 MOS76 0412 FB1D 29 F0 ANDIM &F0 ;Chop out seq. opts MOS76 0432 FB2F ^57 MOS76 0413 FB1F 85 BB STA USFLGS ;Set options for load/save operation MOS76 0432 FB2F ^57 MOS76 0414 FB21 [ GLYN =0 ;If special system for glyn MOS76 0432 FB2F ^57 MOS76 0416 FB21 | MOS76 0432 FB2F ^57 MOS76 0417 FB21 A9 06 LDAIM GAP ;Set SAVE gap -> unchangeable MOS76 0432 FB2F ^57 MOS76 0418 FB23 ] MOS76 0432 FB2F ^57 MOS76 0419 FB23 85 C7 GAPOUT STA GAPTIM MOS76 0432 FB2F ^57 MOS76 0420 FB25 ; MOS76 0432 FB2F ^57 MOS76 0421 FB25 ; fall thru into CLAIM MOS76 0432 FB2F ^57 MOS76 0422 FB25 ; MOS76 0432 FB2F ^57 MOS76 0423 FB25 CLAIM MOS76 0432 FB2F ^57 MOS76 0424 FB25 ; Claim RS423 h/w interface MOS76 0432 FB2F ^57 MOS76 0425 FB25 ; Called by CFS MOS76 0432 FB2F ^57 MOS76 0426 FB25 58 CLI MOS76 0432 FB2F ^57 MOS76 0427 FB26 08 PHP MOS76 0432 FB2F ^57 MOS76 0428 FB27 78 SEI MOS76 0432 FB2F ^57 MOS76 0429 FB28 2C 4F 02 BIT RSFLAG MOS76 0432 FB2F ^57 MOS76 0430 FB2B 10 DB BPL RSWT1 ;[RS423 busy] MOS76 0432 FB2F ^57 MOS76 0431 FB2D A5 EA LDA RSTUT MOS76 0432 FB2F ^57 MOS76 0432 FB2F 30 D7 BMI RSWT1 ;[RS423 dormant, but still timing out] -- MOS76 0433 FB31 ; RS423 dormant and timed out OR claimed => RS423 available -- MOS76 0434 FB31 ; RSTUT>=0 -- MOS76 0435 FB31 ; headline: 'CFS Claims RS423' -- MOS76 0436 FB31 A9 01 LDAIM &01 ;allow for many call claims -- MOS76 0437 FB33 85 EA STA RSTUT ;RSTUT := 1 -- MOS76 0438 FB35 -- MOS76 0439 FB35 [ &00=0 -- MOS76 0440 FB35 20 3A FB JSR CRESET -- MOS76 0441 FB38 28 PLP -- MOS76 0442 FB39 60 RTS -- MOS76 0443 FB3A | -- MOS76 0446 FB3A ] -- MOS76 0447 FB3A -- MOS76 0448 FB3A -- MOS76 0449 FB3A A9 03 CRESET LDAIM &03 -- MOS76 0450 FB3C D0 1B BNE SETCHP MOS76 0450 FB3C v64 MOS76 0451 FB3E MOS76 0450 FB3C v64 MOS76 0452 FB3E MOS76 0450 FB3C v64 MOS76 0453 FB3E TXINIT MOS76 0450 FB3C v64 MOS76 0454 FB3E A9 30 LDAIM TXSTAT MOS76 0450 FB3C v64 MOS76 0455 FB40 85 CA STA TXFLAG MOS76 0450 FB3C v64 MOS76 0456 FB42 D0 13 BNE CHPINT MOS76 0450 FB3C v64 MOS76 0457 FB44 MOS76 0450 FB3C v64 MOS76 0458 FB44 A9 05 RXINIT LDAIM SEROFF MOS76 0450 FB3C v64 MOS76 0459 FB46 MOS76 0450 FB3C v64 MOS76 0460 FB46 ;Switch motor off without going through OS MOS76 0450 FB3C v64 MOS76 0461 FB46 ;coz don't want user to be bothered with each MOS76 0450 FB3C v64 MOS76 0462 FB46 ;motor blip MOS76 0450 FB3C v64 MOS76 0463 FB46 MOS76 0450 FB3C v64 MOS76 0464 FB46 8D 10 FE STA SERPRC MOS76 0450 FB3C v64 MOS76 0465 FB49 MOS76 0450 FB3C v64 MOS76 0466 FB49 A2 FF LDXIM &FF ;250 * 2.5 usecs = 1 millisec MOS76 0450 FB3C v64 MOS76 0467 FB4B CA RXINL1 DEX MOS76 0450 FB3C v64 MOS76 0468 FB4C D0 FD BNE RXINL1 MOS76 0450 FB3C v64 MOS76 0469 FB4E 86 CA STX TXFLAG MOS76 0450 FB3C v64 MOS76 0470 FB50 MOS76 0450 FB3C v64 MOS76 0471 FB50 A9 85 LDAIM SERON MOS76 0450 FB3C v64 MOS76 0472 FB52 8D 10 FE STA SERPRC ;Motor on again MOS76 0450 FB3C v64 MOS76 0473 FB55 MOS76 0450 FB3C v64 MOS76 0474 FB55 A9 D0 LDAIM RXSTAT MOS76 0450 FB3C v64 MOS76 0475 FB57 05 C6 CHPINT ORA SPEED ;Put in bottom bit, set in INIT from MOS MOS76 0450 FB3C v64 MOS76 0476 FB59 8D 08 FE SETCHP STA STATUS -- MOS76 0477 FB5C 60 RTS -- MOS76 0478 FB5D -- MOS76 0479 FB5D -- MOS76 0480 FB5D AE C6 03 NXTBLK LDX INFO +BKNOLO -- MOS76 0481 FB60 AC C7 03 LDY INFO +BKNOHI -- MOS76 0482 FB63 E8 INX -- MOS76 0483 FB64 86 B4 STX BLOKNO -- MOS76 0484 FB66 D0 01 BNE NXTBLX MOS76 0484 FB66 v7E MOS76 0485 FB68 C8 INY MOS76 0484 FB66 v7E MOS76 0486 FB69 84 B5 NXTBLX STY BLOKNO +&01 -- MOS76 0487 FB6B 60 RTS -- MOS76 0488 FB6C -- MOS76 0489 FB6C A0 00 SETJOB LDYIM &00 -- MOS76 0490 FB6E 84 C0 STY IFLAG -- MOS76 0491 FB70 [ MOS125 = &FF -- MOS76 0493 FB70 | -- MOS76 0494 FB70 A0 00 SETJB1 LDYIM &00 MOS76 MOS76 MOS76 MOS76 Acorn macro assembler Page 144 MOS76 C.F.S. - I/O Utilities -> MOS76 MOS76 -- MOS76 0495 FB72 84 BE STY CHKSUM -- MOS76 0496 FB74 ] -- MOS76 0497 FB74 84 BF STY CHKSUM +&01 -- MOS76 0498 FB76 60 RTS -- MOS76 0499 FB77 -- MOS76 0500 FB77 -- MOS76 0501 FB77 A0 FF MOVFN LDYIM &FF -- MOS76 0502 FB79 C8 MOVFNL INY MOS76 0506 FB81 ^76 MOS76 0503 FB7A E8 INX MOS76 0506 FB81 ^76 MOS76 0504 FB7B BD 00 03 LDAAX VARPGE MOS76 0506 FB81 ^76 MOS76 0505 FB7E 99 D2 03 STAAY FILNAM MOS76 0506 FB81 ^76 MOS76 0506 FB81 D0 F6 BNE MOVFNL -- MOS76 0507 FB83 60 RTS -- MOS76 0508 FB84 -- MOS76 0509 FB84 -- MOS76 0510 FB84 A0 00 MOTONW LDYIM WRITFX ;Motor on for output -- MOS76 0511 FB86 58 MOTON CLI ;Ensure can talk to tape -- MOS76 0512 FB87 A2 01 LDXIM &01 ;Motor on -- MOS76 0513 FB89 84 C3 STY CURDRV ;Store current drive -- MOS76 0514 FB8B A9 89 CMOTOR LDAIM FXMOTR ;=> motor function -- MOS76 0515 FB8D -- MOS76 0516 FB8D ;Load drive number into Y, so switching motor -- MOS76 0517 FB8D ;off is always done with the drive most recently -- MOS76 0518 FB8D ;switched on (seems logical). -- MOS76 0519 FB8D -- MOS76 0520 FB8D A4 C3 LDY CURDRV -- MOS76 0521 FB8F 4C F4 FF JMP OSBYTE -- MOS76 0522 FB92 -- MOS76 0523 FB92 CHKHND -- MOS76 0524 FB92 -- MOS76 0525 FB92 ;Check handle in Y is open -- MOS76 0526 FB92 ;and corresponds to mask in A -- MOS76 0527 FB92 -- MOS76 0528 FB92 [ MOS125 = &FF -- MOS76 0542 FB92 | -- MOS76 0543 FB92 ;squash and bugfix: Y=0 not accepted by RFS when OUTHND open in CFS -- MOS76 0544 FB92 25 E2 AND CFSTAT -- MOS76 0545 FB94 C0 02 CPYIM OUTHND -- MOS76 0546 FB96 D0 02 BNE CHKHN1 MOS76 0546 FB96 v7D MOS76 0547 FB98 88 DEY MOS76 0546 FB96 v7D MOS76 0548 FB99 4A LSRA MOS76 0546 FB96 v7D MOS76 0549 FB9A CHKHN1 MOS76 0546 FB96 v7D MOS76 0550 FB9A 4A LSRA -- MOS76 0551 FB9B 90 07 BCC HNDERR MOS76 0551 FB9B v78 MOS76 0552 FB9D 88 DEY MOS76 0551 FB9B v78 MOS76 0553 FB9E 98 TYA MOS76 0551 FB9B v78 MOS76 0554 FB9F 4D 47 02 EOR SROMSW MOS76 0551 FB9B v78 MOS76 0555 FBA2 F0 4D BEQ CHKHXX MOS76 0555 FBA2 v32 MOS76 0556 FBA4 ] MOS76 0555 FBA2 v32 MOS76 0557 FBA4 MOS76 0555 FBA2 v32 MOS76 0558 FBA4 MOS76 0555 FBA2 v32 MOS76 0559 FBA4 00 HNDERR BRK MOS76 0555 FBA2 v32 MOS76 0560 FBA5 DE = CFSERB MOS76 0555 FBA2 v32 MOS76 0561 FBA6 43 68 61 = "Channel",0 MOS76 0555 FBA2 v32 MOS76 0562 FBAE MOS76 0555 FBA2 v32 MOS76 0563 FBAE MOS76 0555 FBA2 v32 MOS76 0564 FBAE MOS76 0555 FBA2 v32 MOS76 0565 FBAE TWINIT MOS76 0555 FBA2 v32 MOS76 0566 FBAE A9 01 LDAIM TUBEW ;Write init. for tube MOS76 0555 FBA2 v32 MOS76 0567 FBB0 TBINIT MOS76 0555 FBA2 v32 MOS76 0568 FBB0 ;Check the address at BKADDR is accross tube MOS76 0555 FBA2 v32 MOS76 0569 FBB0 ;and that tube is present. If so, claim tube, and call MOS76 0555 FBA2 v32 MOS76 0570 FBB0 ;address routine with value origionally in A on entry. MOS76 0555 FBA2 v32 MOS76 0571 FBB0 MOS76 0555 FBA2 v32 MOS76 0572 FBB0 20 C6 FB JSR TUBCHK ;Check address + tube present. MOS76 0555 FBA2 v32 MOS76 0573 FBB3 F0 3C BEQ TINIT0 ;Don't tube. (NOTE TAX done in TUBCHK) MOS76 0555 FBA2 v32 MOS76 0574 FBB5 8A TXA ;Restore tube reason code MOS76 0555 FBA2 v32 MOS76 0575 FBB6 A2 B0 LDXIM BKADDR MOS76 0555 FBA2 v32 MOS76 0576 FBB8 A0 00 LDYIM /(BKADDR ) ;Address for tube routine MOS76 0555 FBA2 v32 MOS76 0577 FBBA 48 TBINT1 PHA ;Entry from RUN with non-BKADDR address MOS76 0555 FBA2 v32 MOS76 0578 FBBB A9 C0 LDAIM TUBECL ;"Claim" reason code MOS76 0555 FBA2 v32 MOS76 0579 FBBD 20 06 04 TUBELP JSR TBADDR ;Attempt claim MOS76 0555 FBA2 v32 MOS76 0580 FBC0 90 FB BCC TUBELP ;Continue to try and claim MOS76 0555 FBA2 v32 MOS76 0581 FBC2 68 PLA ;Restore address reason code MOS76 0555 FBA2 v32 MOS76 0582 FBC3 4C 06 04 JMP TBADDR MOS76 0555 FBA2 v32 MOS76 0583 FBC6 MOS76 0555 FBA2 v32 MOS76 0584 FBC6 MOS76 0555 FBA2 v32 MOS76 0585 FBC6 MOS76 0555 FBA2 v32 MOS76 0586 FBC6 AA TUBCHK TAX ;Store A MOS76 0555 FBA2 v32 MOS76 0587 FBC7 A5 B2 LDA BKADDR +&02 MOS76 0555 FBA2 v32 MOS76 0588 FBC9 25 B3 AND BKADDR +&03 MOS76 0555 FBA2 v32 MOS76 0589 FBCB C9 FF CMPIM &FF ;If $FF, address is IO proc., so exit MOS76 0555 FBA2 v32 MOS76 0590 FBCD F0 05 BEQ TUBCHX MOS76 0555 FBA2 v32 MOS76 0591 FBCF AD 7A 02 LDA TUBE MOS76 0555 FBA2 v32 MOS76 0592 FBD2 29 80 ANDIM &80 ;Returns NZ if tube present, EQ if not MOS76 0555 FBA2 v32 MOS76 0593 FBD4 60 TUBCHX RTS MOS76 0555 FBA2 v32 MOS76 0594 FBD5 MOS76 0555 FBA2 v32 MOS76 0595 FBD5 MOS76 0555 FBA2 v32 MOS76 0596 FBD5 MOS76 0555 FBA2 v32 MOS76 0597 FBD5 BUGFIX MOS76 0555 FBA2 v32 MOS76 0598 FBD5 MOS76 0555 FBA2 v32 MOS76 0599 FBD5 ;When the 6850 counter divide bits are reset, it MOS76 0555 FBA2 v32 MOS76 0600 FBD5 ;is possible for the SERPROC to get out of synch. MOS76 0555 FBA2 v32 MOS76 0601 FBD5 ;for a few bits. This has the effect of corrupting MOS76 0555 FBA2 v32 MOS76 0602 FBD5 ;the first character of the first block of a SAVE, MOS76 0555 FBA2 v32 MOS76 0603 FBD5 ;or the first character of ANY block during sequential MOS76 0555 FBA2 v32 MOS76 0604 FBD5 ;access (since the 6850 is reset for every block MOS76 0555 FBA2 v32 MOS76 0605 FBD5 ;during putbytes). MOS76 0555 FBA2 v32 MOS76 0606 FBD5 ; The cure is to write a dummy byte to tape at the MOS76 0555 FBA2 v32 MOS76 0607 FBD5 ;start of a SAVE, and at the start of every block MOS76 0555 FBA2 v32 MOS76 0608 FBD5 ;during putbytes. This must be done by polling, MOS76 0555 FBA2 v32 MOS76 0609 FBD5 ;since there must be a period of high-tone after MOS76 0555 FBA2 v32 MOS76 0610 FBD5 ;the dummy byte, which is difficult to accomplish MOS76 0555 FBA2 v32 MOS76 0611 FBD5 ;if the 6850 is interrupting all the time. MOS76 0555 FBA2 v32 MOS76 0612 FBD5 ; BUGFIX is thus called after the SERPROC is set MOS76 0555 FBA2 v32 MOS76 0613 FBD5 ;and before the 6850 is set to interrupt during MOS76 0555 FBA2 v32 MOS76 0614 FBD5 ;a block write operation. MOS76 0555 FBA2 v32 MOS76 0615 FBD5 MOS76 0555 FBA2 v32 MOS76 0616 FBD5 A9 85 LDAIM SERON MOS76 0555 FBA2 v32 MOS76 0617 FBD7 8D 10 FE STA SERPRC ;Set SERPROC on MOS76 0555 FBA2 v32 MOS76 0618 FBDA 20 3A FB JSR CRESET ;Reset 6850 to be on safe side MOS76 0555 FBA2 v32 MOS76 0619 FBDD A9 10 LDAIM &10 MOS76 0555 FBA2 v32 MOS76 0620 FBDF 20 57 FB JSR CHPINT ;Set 6850 at appropriate clock rate MOS76 0555 FBA2 v32 MOS76 0621 FBE2 MOS76 0555 FBA2 v32 MOS76 0622 FBE2 20 89 F9 BUGLP JSR ESCAPE MOS76 0555 FBA2 v32 MOS76 0623 FBE5 AD 08 FE LDA STATUS MOS76 0555 FBA2 v32 MOS76 0624 FBE8 29 02 ANDIM &02 ;Ready to TX ? MOS76 0555 FBA2 v32 MOS76 0625 FBEA F0 F6 BEQ BUGLP ;Nope -> loop MOS76 0555 FBA2 v32 MOS76 0626 FBEC A9 AA LDAIM &AA MOS76 0555 FBA2 v32 MOS76 0627 FBEE 8D 09 FE STA PORT ;Shove out the dummy byte MOS76 0555 FBA2 v32 MOS76 0628 FBF1 CHKHXX MOS76 MOS76 MOS76 MOS76 Acorn macro assembler Page 145 MOS76 C.F.S. - I/O Utilities -> MOS76 MOS76 MOS76 0555 FBA2 v32 MOS76 0629 FBF1 TINIT0 MOS76 0555 FBA2 v32 MOS76 0630 FBF1 60 RTS -- MOS76 0631 FBF2 -- MOS76 0632 FBF2 [ MOS125 = &FF -- MOS76 0633 FBF2 | -- MOS76 0634 FBF2 ;FSC jump table moved to end of main section. -- MOS76 0635 FBF2 ;This displaces the free space into the middle -- MOS76 0636 FBF2 ;of the ROM where it can be used for any purpose -- MOS76 0637 FBF2 ;(an opcode or branch address at &FBFF would cause -- MOS76 0638 FBF2 ;a dummy read cycle in FRED.) -- MOS76 0639 FBF2 -- MOS76 0640 FBF2 JMPTAB -- MOS76 0641 FBF2 92 = CFSOPT-&01 -- MOS76 0642 FBF3 4E = CFSEOF-&01 -- MOS76 0643 FBF4 EB = RUN-&01 ;"*." -- MOS76 0644 FBF5 72 = MBDCMD-&01 ;"*" = Bad command -- MOS76 0645 FBF6 EB = RUN-&01 ;"*RUN " -- MOS76 0646 FBF7 2A = CAT-&01 -- MOS76 0647 FBF8 EE = SHUTES-&01 ;die -- MOS76 0648 FBF9 0007 NOTAB * .-JMPTAB -- MOS76 0649 FBF9 F5 = /(CFSOPT-&01) -- MOS76 0650 FBFA F6 = /(CFSEOF-&01) -- MOS76 0651 FBFB F2 = /(RUN-&01) -- MOS76 0652 FBFC E3 = /(MBDCMD-&01) -- MOS76 0653 FBFD F2 = /(RUN-&01) -- MOS76 0654 FBFE F3 = /(CAT-&01) -- MOS76 0655 FBFF E2 = /(SHUTES-&01) -- MOS76 0656 FC00 -- MOS76 0657 FC00 ;MOS 1.25: Adjust padding in MOS38 to hit &FC00 here -- MOS76 0658 FC00 ] -- MOS76 0659 FC00 -- MOS76 0660 FC00 END -- MOS76 0661 FC00 -- MOS76 0662 FC00 [ $Tutu -- MOS76 0664 FC00 ] -- MOS76 0665 FC00 -- MOS76 0666 FC00 ; pad with zero bytes to ensure ROM CRCs consistent -- MOS76 0667 FC00 00 00 00 % &100 -- MOS76 0668 FD00 -- MOS76 0669 FD00 [ . > &FC00+&100 -- MOS76 0671 FD00 ] -- MOS76 0672 FD00 -- MOS76 0673 FD00 < 1 -- MOS76 0674 FD00 -- MOS76 0675 FD00 LNK MOS99 -- MOS99 0001 FD00 ; MOS99 -- MOS99 0002 FD00 TTL MOS99 Operating system ROM entry points and hardware vectors -- MOS99 0003 FD00 OPT MOS99 MOS99 MOS99 MOS99 MOS99 Acorn macro assembler Page 146 MOS99 MOS99 Operating system ROM entry points and hardware vectors MOS99 -- MOS99 0004 FD00 -- MOS99 0005 FD00 ;(c) 1981 ACORN Computers Limited -- MOS99 0006 FD00 ;BBC Microcomputer Machine Operating System (MOS) -- MOS99 0007 FD00 -- MOS99 0008 FD00 ;Change record: -- MOS99 0009 FD00 -- MOS99 0010 FD00 ;Author(s): -- MOS99 0011 FD00 ;PB Paul Bond -- MOS99 0012 FD00 -- MOS99 0013 FD00 ORG &FC00 -- MOS99 0014 FC00 -- MOS99 0015 FC00 28 43 29 = "(C) 1981 Acorn Computers Ltd." -- MOS99 0016 FC1D 54 68 61 = "Thanks are due to the following contributors to the development of the BBC Computer " -- MOS99 0017 FC71 28 61 6D = "(among others too numerous to mention):- " -- MOS99 0018 FC9A 44 61 76 = "David Allen," -- MOS99 0019 FCA6 42 6F 62 = "Bob Austin," -- MOS99 0020 FCB1 52 61 6D = "Ram Banerjee," -- MOS99 0021 FCBE 50 61 75 = "Paul Bond," -- MOS99 0022 FCC8 41 6C 6C = "Allen Boothroyd," -- MOS99 0023 FCD8 43 61 6D = "Cambridge," -- MOS99 0024 FCE2 43 6C 65 = "Cleartone," -- MOS99 0025 FCEC 4A 6F 68 = "John Coll," -- MOS99 0026 FCF6 4A 6F 68 = "John Cox," -- MOS99 0027 FCFF 41 6E 64 = "Andy Cripps," -- MOS99 0028 FD0B 43 68 72 = "Chris Curry," -- MOS99 0029 FD17 36 35 30 = "6502 designers," -- MOS99 0030 FD26 4A 65 72 = "Jeremy Dion," -- MOS99 0031 FD32 54 69 6D = "Tim Dobson," -- MOS99 0032 FD3D 4A 6F 65 = "Joe Dunn," -- MOS99 0033 FD46 50 61 75 = "Paul Farrell," -- MOS99 0034 FD53 46 65 72 = "Ferranti," -- MOS99 0035 FD5C 53 74 65 = "Steve Furber," -- MOS99 0036 FD69 4A 6F 6E = "Jon Gibbons," -- MOS99 0037 FD75 41 6E 64 = "Andrew Gordon," -- MOS99 0038 FD83 4C 61 77 = "Lawrence Hardwick," -- MOS99 0039 FD95 44 79 6C = "Dylan Harris," -- MOS99 0040 FDA2 48 65 72 = "Hermann Hauser," -- MOS99 0041 FDB1 48 69 74 = "Hitachi," -- MOS99 0042 FDB9 41 6E 64 = "Andy Hopper," -- MOS99 0043 FDC5 49 43 4C = "ICL," -- MOS99 0044 FDC9 4D 61 72 = "Martin Jackson," -- MOS99 0045 FDD8 42 72 69 = "Brian Jones," -- MOS99 0046 FDE4 43 68 72 = "Chris Jordan," -- MOS99 0047 FDF1 44 61 76 = "David King," -- MOS99 0048 FDFC 44 61 76 = "David Kitson," -- MOS99 0049 FE09 50 61 75 = "Paul Kriwaczek," -- MOS99 0050 FE18 43 6F 6D = "Computer Laboratory," -- MOS99 0051 FE2C 50 65 74 = "Peter Miller," -- MOS99 0052 FE39 41 72 74 = "Arthur Norman," -- MOS99 0053 FE47 47 6C 79 = "Glyn Phillips," -- MOS99 0054 FE55 4D 69 6B = "Mike Prees," -- MOS99 0055 FE60 4A 6F 68 = "John Radcliffe," -- MOS99 0056 FE6F 57 69 6C = "Wilberforce Road," -- MOS99 0057 FE80 50 65 74 = "Peter Robinson," -- MOS99 0058 FE8F 52 69 63 = "Richard Russell," -- MOS99 0059 FE9F 4B 69 6D = "Kim Spence-Jones," -- MOS99 0060 FEB0 47 72 61 = "Graham Tebby," -- MOS99 0061 FEBD 4A 6F 6E = "Jon Thackray," -- MOS99 0062 FECA 43 68 72 = "Chris Turner," -- MOS99 0063 FED7 41 64 72 = "Adrian Warner," -- MOS99 0064 FEE5 52 6F 67 = "Roger Wilson," -- MOS99 0065 FEF2 41 6C 61 = "Alan Wright." -- MOS99 0066 FEFE ; -- MOS99 0067 FEFE ; test ROM indirection -- MOS99 0068 FEFE 5F = MRESET -- MOS99 0069 FEFF D9 = /(MRESET ) -- MOS99 0070 FF00 -- MOS99 0071 FF00 ; ORG $FF00 -- MOS99 0072 FF00 ; Page $FF contains code which has to be located at a fixed -- MOS99 0073 FF00 ; place in memory. Two main types of code come into this -- MOS99 0074 FF00 ; category: -- MOS99 0075 FF00 ; (a) Code to call a routine located in a paged ROM -- MOS99 0076 FF00 ; (b) Fixed OS calls -- MOS99 0077 FF00 -- MOS99 0078 FF00 ; Calls to the operating system are normally made by calling -- MOS99 0079 FF00 ; JMIs located at the top of the address space of the m/c. -- MOS99 0080 FF00 ; The indirection vectors are located in page 2 starting at -- MOS99 0081 FF00 ; $0200. To redirect an OS call which indirects thru location -- MOS99 0082 FF00 ; $0200+2*x: -- MOS99 0083 FF00 ; (a) Set up a 3-byte tuple at location ROMVEC+3*x to refer -- MOS99 0084 FF00 ; to the paged ROM entry point -- MOS99 0085 FF00 ; (b) Set the OS indirection at location $0200+2*x to value -- MOS99 0086 FF00 ; $FF00+3*x -- MOS99 0087 FF00 ; A JMI $0200+2*x will then result in the routine in paged ROM -- MOS99 0088 FF00 ; being called. The routine is entered with A, X, Y and P -- MOS99 0089 FF00 ; unaltered since the point of call. Similarly, no registers -- MOS99 0090 FF00 ; are corrupted on return from the routine. -- MOS99 0091 FF00 ; -- MOS99 0092 FF00 ; Locations $FF00 onwards contain JSRs to the same location (OSROM); -- MOS99 0093 FF00 ; thus when OSROM is entered the top entry on the stack determines -- MOS99 0094 FF00 ; which JSR OSROM was called, enabling the OS call made to be -- MOS99 0095 FF00 ; identified (by convention paged ROM routed indirections thru -- MOS99 0096 FF00 ; $0200+2*x jump to location $FF00+3*x). -- MOS99 0097 FF00 -- MOS99 0098 FF00 ROMUSR -- MOS99 0099 FF00 20 92 FF JSR OSROM -- MOS99 0100 FF03 -- MOS99 0101 FF03 ROMBRK -- MOS99 0102 FF03 20 92 FF JSR OSROM -- MOS99 0103 FF06 -- MOS99 0104 FF06 ROMIRA -- MOS99 0105 FF06 20 92 FF JSR OSROM -- MOS99 0106 FF09 -- MOS99 0107 FF09 ROMIRB -- MOS99 0108 FF09 20 92 FF JSR OSROM -- MOS99 0109 FF0C -- MOS99 0110 FF0C ROMCOM -- MOS99 0111 FF0C 20 92 FF JSR OSROM -- MOS99 0112 FF0F -- MOS99 0113 FF0F ROMBYT -- MOS99 0114 FF0F 20 92 FF JSR OSROM -- MOS99 0115 FF12 -- MOS99 0116 FF12 ROMWRD -- MOS99 0117 FF12 20 92 FF JSR OSROM -- MOS99 0118 FF15 -- MOS99 0119 FF15 ROMWRC -- MOS99 0120 FF15 20 92 FF JSR OSROM -- MOS99 0121 FF18 -- MOS99 0122 FF18 ROMRDC -- MOS99 0123 FF18 20 92 FF JSR OSROM -- MOS99 0124 FF1B MOS99 MOS99 MOS99 MOS99 Acorn macro assembler Page 147 MOS99 MOS99 Operating system ROM entry points and hardware vectors MOS99 -- MOS99 0125 FF1B ROMFIL -- MOS99 0126 FF1B 20 92 FF JSR OSROM -- MOS99 0127 FF1E -- MOS99 0128 FF1E ROMARG -- MOS99 0129 FF1E 20 92 FF JSR OSROM -- MOS99 0130 FF21 -- MOS99 0131 FF21 ROMBGT -- MOS99 0132 FF21 20 92 FF JSR OSROM -- MOS99 0133 FF24 -- MOS99 0134 FF24 ROMBPT -- MOS99 0135 FF24 20 92 FF JSR OSROM -- MOS99 0136 FF27 -- MOS99 0137 FF27 ROMGPB -- MOS99 0138 FF27 20 92 FF JSR OSROM -- MOS99 0139 FF2A -- MOS99 0140 FF2A ROMFND -- MOS99 0141 FF2A 20 92 FF JSR OSROM -- MOS99 0142 FF2D -- MOS99 0143 FF2D ROMFSC -- MOS99 0144 FF2D 20 92 FF JSR OSROM -- MOS99 0145 FF30 -- MOS99 0146 FF30 ROMEVT -- MOS99 0147 FF30 20 92 FF JSR OSROM -- MOS99 0148 FF33 -- MOS99 0149 FF33 ROMUPT -- MOS99 0150 FF33 20 92 FF JSR OSROM -- MOS99 0151 FF36 -- MOS99 0152 FF36 ROMNET -- MOS99 0153 FF36 20 92 FF JSR OSROM -- MOS99 0154 FF39 -- MOS99 0155 FF39 ROMVDU -- MOS99 0156 FF39 20 92 FF JSR OSROM -- MOS99 0157 FF3C -- MOS99 0158 FF3C ROMKEY -- MOS99 0159 FF3C 20 92 FF JSR OSROM -- MOS99 0160 FF3F -- MOS99 0161 FF3F ROMINS -- MOS99 0162 FF3F 20 92 FF JSR OSROM -- MOS99 0163 FF42 -- MOS99 0164 FF42 ROMREM -- MOS99 0165 FF42 20 92 FF JSR OSROM -- MOS99 0166 FF45 -- MOS99 0167 FF45 ROMCNP -- MOS99 0168 FF45 20 92 FF JSR OSROM -- MOS99 0169 FF48 -- MOS99 0170 FF48 20 92 FF JSR OSROM -- MOS99 0171 FF4B -- MOS99 0172 FF4B 20 92 FF JSR OSROM -- MOS99 0173 FF4E -- MOS99 0174 FF4E 20 92 FF JSR OSROM -- MOS99 0175 FF51 -- MOS99 0176 FF51 [ MOS125 = &FF -- MOS99 0276 FF51 ] -- MOS99 0277 FF51 -- MOS99 0278 FF51 [ MOS125 = &7F -- MOS99 0279 FF51 [ STARGO = &00 -- MOS99 0280 FF51 00 % 1 ;1 byte padding -- MOS99 0281 FF52 -- MOS99 0282 FF52 ARGSW -- MOS99 0283 FF52 C9 01 CMPIM &01 -- MOS99 0284 FF54 D0 0D BNE UPARGS MOS99 0284 FF54 v72 MOS99 0285 FF56 C0 00 CPYIM &00 MOS99 0284 FF54 v72 MOS99 0286 FF58 D0 09 BNE UPARGS MOS99 0284 FF54 v72 MOS99 0287 FF5A AC D1 02 LDY TAILHI ;OSARGS A=1, Y=0 return command line tail MOS99 0284 FF54 v72 MOS99 0288 FF5D F0 04 BEQ UPARGS ;return *GO/CFS pointer if valid MOS99 0284 FF54 v72 MOS99 0289 FF5F 88 DEY MOS99 0284 FF54 v72 MOS99 0290 FF60 4C 9E DF JMP RETAIL MOS99 0284 FF54 v72 MOS99 0291 FF63 UPARGS ;call upstream OSARGS MOS99 0284 FF54 v72 MOS99 0292 FF63 6C 14 02 JMI ARGVEC -- MOS99 0293 FF66 | -- MOS99 0295 FF66 ] -- MOS99 0296 FF66 FXBPUT ;FX entry, C=1 -- MOS99 0297 FF66 8A TXA ;A = character -- MOS99 0298 FF67 B0 6B BCS OSBPUT ;[ALWAYS jump] MOS99 0298 FF67 v14 MOS99 0299 FF69 ] MOS99 0298 FF67 v14 MOS99 0300 FF69 MOS99 0298 FF67 v14 MOS99 0301 FF69 [ MOS125 = &00 MOS99 0298 FF67 v14 MOS99 0303 FF69 ] MOS99 0298 FF67 v14 MOS99 0304 FF69 MOS99 0298 FF67 v14 MOS99 0305 FF69 [ MOS125 = &FF MOS99 0298 FF67 v14 MOS99 0306 FF69 | MOS99 0298 FF67 v14 MOS99 0307 FF69 48 FUDGE PHA MOS99 0298 FF67 v14 MOS99 0308 FF6A 48 PHA MOS99 0298 FF67 v14 MOS99 0309 FF6B 08 PHP MOS99 0298 FF67 v14 MOS99 0310 FF6C 48 PHA MOS99 0298 FF67 v14 MOS99 0311 FF6D 8A TXA MOS99 0298 FF67 v14 MOS99 0312 FF6E 48 PHA MOS99 0298 FF67 v14 MOS99 0313 FF6F 98 TYA MOS99 0298 FF67 v14 MOS99 0314 FF70 48 PHA MOS99 0298 FF67 v14 MOS99 0315 FF71 BA TSX ;y x a p a a 88 FF el eh cl ch MOS99 0298 FF67 v14 MOS99 0316 FF72 BC 09 01 LDYAX &0109 ;get vector offset+2 MOS99 0298 FF67 v14 MOS99 0317 FF75 B9 9D 0D LDAAY ROMVEC-&02+&00 MOS99 0298 FF67 v14 MOS99 0318 FF78 9D 05 01 STAAX &0105 ;copy LSB vector over placeholder MOS99 0298 FF67 v14 MOS99 0319 FF7B B9 9E 0D LDAAY ROMVEC-&02+&01 MOS99 0298 FF67 v14 MOS99 0320 FF7E 9D 06 01 STAAX &0106 ;copy MSB vector over placeholder MOS99 0298 FF67 v14 MOS99 0321 FF81 A5 F4 LDA ROMID ;copy ROM slot over MSB vector offset MOS99 0298 FF67 v14 MOS99 0322 FF83 9D 0A 01 STAAX &010A ;y x a p vl vh 88 FF el r cl ch MOS99 0298 FF67 v14 MOS99 0323 FF86 68 PLA ;Y in A ready to restore MOS99 0298 FF67 v14 MOS99 0324 FF87 BE 9F 0D LDXAY ROMVEC-&02+&02 ;get vector ROM slot MOS99 0298 FF67 v14 MOS99 0325 FF8A A8 TAY ;restore Y MOS99 0298 FF67 v14 MOS99 0326 FF8B 68 PLA ;X in A ready to restore MOS99 0298 FF67 v14 MOS99 0327 FF8C 20 DB DB JSR STXROM ;set destination ROM slot MOS99 0298 FF67 v14 MOS99 0328 FF8F AA TAX ;restore X MOS99 0298 FF67 v14 MOS99 0329 FF90 68 PLA ;restore A MOS99 0298 FF67 v14 MOS99 0330 FF91 40 RTI ;restore P and jump to vector MOS99 0298 FF67 v14 MOS99 0331 FF92 MOS99 0298 FF67 v14 MOS99 0332 FF92 20 69 FF OSROM JSR FUDGE ;push restore address on stack, RTS returns below MOS99 0298 FF67 v14 MOS99 0333 FF95 ;routine to restore ROM slot from indirection MOS99 0298 FF67 v14 MOS99 0334 FF95 08 PHP MOS99 0298 FF67 v14 MOS99 0335 FF96 48 PHA MOS99 0298 FF67 v14 MOS99 0336 FF97 8A TXA MOS99 0298 FF67 v14 MOS99 0337 FF98 48 PHA MOS99 0298 FF67 v14 MOS99 0338 FF99 BA TSX ;x a p el r cl ch MOS99 0298 FF67 v14 MOS99 0339 FF9A BD 05 01 LDAAX &0105 MOS99 0298 FF67 v14 MOS99 0340 FF9D 85 F4 STA ROMID MOS99 0298 FF67 v14 MOS99 0341 FF9F 8D 30 FE STA ROM ;restore ROM slot MOS99 0298 FF67 v14 MOS99 0342 FFA2 BD 03 01 LDAAX &0103 MOS99 0298 FF67 v14 MOS99 0343 FFA5 9D 04 01 STAAX &0104 MOS99 0298 FF67 v14 MOS99 0344 FFA8 9D 05 01 STAAX &0105 ;copy status over vec offset and ROM slot MOS99 0298 FF67 v14 MOS99 0345 FFAB 68 PLA MOS99 0298 FF67 v14 MOS99 0346 FFAC AA TAX ;restore X MOS99 MOS99 MOS99 MOS99 Acorn macro assembler Page 148 MOS99 MOS99 Operating system ROM entry points and hardware vectors MOS99 MOS99 0298 FF67 v14 MOS99 0347 FFAD 68 PLA ;restore A MOS99 0298 FF67 v14 MOS99 0348 FFAE 28 PLP MOS99 0298 FF67 v14 MOS99 0349 FFAF 28 PLP MOS99 0298 FF67 v14 MOS99 0350 FFB0 28 PLP ;restore status (and discard 2 copies) MOS99 0298 FF67 v14 MOS99 0351 FFB1 VINUSE ;target of vectors in use by a client waiting for a server MOS99 0298 FF67 v14 MOS99 0352 FFB1 EA NOP MOS99 0298 FF67 v14 MOS99 0353 FFB2 DEFEVT ;default EVENT routine MOS99 0298 FF67 v14 MOS99 0354 FFB2 DEFUPT ;default user print routine (simulate printer busy) MOS99 0298 FF67 v14 MOS99 0355 FFB2 DEFNET ;default net routine (simulate printer busy) MOS99 0298 FF67 v14 MOS99 0356 FFB2 RTS MOS99 0298 FF67 v14 MOS99 0357 FFB2 60 RTS MOS99 0298 FF67 v14 MOS99 0358 FFB3 ] MOS99 0298 FF67 v14 MOS99 0359 FFB3 MOS99 0298 FF67 v14 MOS99 0360 FFB3 [ MOS125 = &7F MOS99 0298 FF67 v14 MOS99 0361 FFB3 ;FXBPUT gives up its place to OSWRSC MOS99 0298 FF67 v14 MOS99 0362 FFB3 ;to keep VINUSE and RTS in the same place MOS99 0298 FF67 v14 MOS99 0363 FFB3 | MOS99 0298 FF67 v14 MOS99 0367 FFB3 ] MOS99 0298 FF67 v14 MOS99 0368 FFB3 MOS99 0298 FF67 v14 MOS99 0369 FFB3 [ MOS125 = &FF MOS99 0298 FF67 v14 MOS99 0381 FFB3 ] MOS99 0298 FF67 v14 MOS99 0382 FFB3 MOS99 0298 FF67 v14 MOS99 0383 FFB3 [ MOS125 = &7F MOS99 0298 FF67 v14 MOS99 0384 FFB3 4C 1C D1 OSWRSC JMP WRSC MOS99 0298 FF67 v14 MOS99 0385 FFB6 ] MOS99 0298 FF67 v14 MOS99 0386 FFB6 MOS99 0298 FF67 v14 MOS99 0387 FFB6 ; security copy of indirection data MOS99 0298 FF67 v14 MOS99 0388 FFB6 36 = VLEN MOS99 0298 FF67 v14 MOS99 0389 FFB7 D2 = IPAGE2 MOS99 0298 FF67 v14 MOS99 0390 FFB8 D8 = /(IPAGE2 ) MOS99 0298 FF67 v14 MOS99 0391 FFB9 ; MOS99 0298 FF67 v14 MOS99 0392 FFB9 4C D0 DB JMP RPROM ;read byte from paged ROM MOS99 0298 FF67 v14 MOS99 0393 FFBC 4C C0 C4 JMP VDU ;raw VDU WRCH (corrupts A, X and Y) MOS99 0298 FF67 v14 MOS99 0394 FFBF 4C F6 E4 JMP EVENT ;signal event MOS99 0298 FF67 v14 MOS99 0395 FFC2 4C 97 EA JMP GSINTS ;used by paged ROMs MOS99 0298 FF67 v14 MOS99 0396 FFC5 4C A8 EA JMP GSREAD ;used by paged ROMs MOS99 0298 FF67 v14 MOS99 0397 FFC8 4C 71 DE JMP RDCH ;used by tube MOS99 0298 FF67 v14 MOS99 0398 FFCB 4C 00 E1 JMP WRCH ;used by tube MOS99 0298 FF67 v14 MOS99 0399 FFCE 6C 1C 02 OSFIND JMI FNDVEC MOS99 0298 FF67 v14 MOS99 0400 FFD1 MOS99 0298 FF67 v14 MOS99 0401 FFD1 6C 1A 02 OSBGPB JMI GPBVEC MOS99 0298 FF67 v14 MOS99 0402 FFD4 6C 18 02 OSBPUT JMI BPTVEC -- MOS99 0403 FFD7 6C 16 02 OSBGET JMI BGTVEC -- MOS99 0404 FFDA [ MOS125 = &7F -- MOS99 0405 FFDA [ STARGO = &00 -- MOS99 0406 FFDA 4C 52 FF OSARGS JMP ARGSW -- MOS99 0407 FFDD | -- MOS99 0409 FFDD ] -- MOS99 0410 FFDD | -- MOS99 0412 FFDD ] -- MOS99 0413 FFDD 6C 12 02 OSFILE JMI FILVEC -- MOS99 0414 FFE0 6C 10 02 OSRDCH JMI RDCVEC -- MOS99 0415 FFE3 C9 0D OSASCI CMPIM MCR -- MOS99 0416 FFE5 D0 07 BNE OSWRCH MOS99 0416 FFE5 v78 MOS99 0417 FFE7 A9 0A OSNEWL LDAIM MLF MOS99 0416 FFE5 v78 MOS99 0418 FFE9 20 EE FF JSR OSWRCH MOS99 0416 FFE5 v78 MOS99 0419 FFEC [ MOS125 = &FF MOS99 0416 FFE5 v78 MOS99 0420 FFEC | MOS99 0416 FFE5 v78 MOS99 0421 FFEC WRCR MOS99 0416 FFE5 v78 MOS99 0422 FFEC ] MOS99 0416 FFE5 v78 MOS99 0423 FFEC A9 0D LDAIM MCR MOS99 0416 FFE5 v78 MOS99 0424 FFEE 6C 0E 02 OSWRCH JMI WRCVEC -- MOS99 0425 FFF1 6C 0C 02 OSWORD JMI WORVEC -- MOS99 0426 FFF4 6C 0A 02 OSBYTE JMI BYTVEC -- MOS99 0427 FFF7 6C 08 02 OSCLI JMI COMVEC -- MOS99 0428 FFFA -- MOS99 0429 FFFA ; hardware vectors -- MOS99 0430 FFFA 00 = NMI ;non-maskable interrupt -- MOS99 0431 FFFB 0D = /(NMI ) -- MOS99 0432 FFFC 5F = MRESET ;hardware reset -- MOS99 0433 FFFD D9 = /(MRESET ) -- MOS99 0434 FFFE E1 = IRQ ;interrupt -- MOS99 0435 FFFF DB = /(IRQ ) -- MOS99 0436 0000 ENDROM ;end of ROM -- MOS99 0437 0000 -- MOS99 0438 0000 [ ENDROM=0 -- MOS99 0439 0000 | -- MOS99 0441 0000 ] -- MOS99 0442 0000 -- MOS99 0443 0000 TTL BBC Microcomputer Machine Operating System (MOS) -- MOS99 0444 0000 -- MOS99 0445 0000 OPT OPPON -- MOS99 0446 0000 -- MOS99 0447 0000 END Assembly finished, no errors Action : *spool This Perl script creates the slack columns from the raw listing. Copy the text between the cut lines. Paste it into a new file, slack.pl, and remove the first 30 characters from each line. Then call it with perl slack.pl stargo.asm.txt >stargo-slack.txt -------->8--- #!/usr/bin/perl $base=0xc000; @slack = (0x80) x 0x4001; open(ASM,'<'.shift(@ARGV))or die; while(){ y/ -~//cd; if(/^Action :\s*asm\s+([A-Z0-9._-]+)/i) { $file=sprintf("%-7s",$1); } elsif(/^[0-9A-F]{4} [0-9A-F]{4} ...... LNK\s+([A-Z0-9._-]+)\s*$/) { $file=sprintf("%-7s",$1); # Link filename not held over as LNK lines do not assemble instructions. } elsif(/^([0-9A-F]{4}) ([0-9A-F]{4}) .. .. .. /) { $line=$1; $pc=hex($2); $label[$pc-$base] = $file.' '.$line.' '.$2 if $pc >= $base; } if(/^([0-9A-F]{4}) ([0-9A-F]{4}) [13579BDF]0 ([0-9A-F]{2}) ...... B/){ $line=$1; $pc=hex($2); $op=hex($3); if($op & 0x80) { $dest = $pc + 2 - 0x100 + $op; $slack = $op - 0x80; for($i = $pc + 2 - $base + $op - 0xFF; $i <= $pc - $base; ++$i) { if($slack[$i] > $slack) { $slack[$i] = $slack; $source[$i] = $pc-$base; } } } else { $dest = $pc + 2 + $op; $slack = 0x7f - $op; for($i = $pc + 2 - $base; $i <= $pc + 2 - $base + $op; ++$i) { if($slack[$i] > $slack) { $slack[$i] = $slack; $source[$i] = $pc-$base; } } } } } undef $file; undef $link; seek(ASM,0,0); while(){ y/ -~//cd; if(/^Action :\s*asm\s+([A-Z0-9._-]+)/i) { $link=sprintf("%-7s",$1); } elsif(/^[0-9A-F]{4} [0-9A-F]{4} ...... LNK\s+([A-Z0-9._-]+)\s*$/) { $link=sprintf("%-7s",$1); } elsif(/^[0-9A-F]{4} [0-9A-F]{4} ...... END\s*$/) { $link=sprintf("%-7s",""); } if(/^([0-9A-F]{4}) ([0-9A-F]{4})(.*)$/) { $line=$1; $pc=hex($2); $source=$3; if($pc>=$base && $slack[$pc-$base] < 0x80) { printf("%-17s %s%02X %-7s %s\n", (($pc>=$base && defined($source[$pc-$base]) && defined($label[$source[$pc-$base]])) ? $label[$source[$pc-$base]] : ''), (($source[$pc-$base] < $pc-$base) ? 'v' : '^'), $slack[$pc-$base], $file, $_); } else { printf(" -- %-7s %s\n", $file, $_); } } else { printf(" %-7s %s\n", $file, $_); } if(defined($link)) { $file=$link; undef $link; } } -------->8--- End of stargo-slack.txt