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Fitting 256 KB paged RAM and ROM to the BBC Micro

Greg Cook, 19/Sep/2008

Under construction. This page describes how to add 128 KB of paged RAM plus 128 KB of paged ROM to the BBC model A or B.


This project is intended for those who are competent at PCB reworking. You will need a pair of crimpers or pliers, plus common soldering tools such as a wire stripper, a pair of side cutters, electronics solder, a damp sponge, a soldering iron and a desoldering pump. In the description below, the verb ‘solder’ implies cleaning the iron, stripping, tinning, desoldering where necessary as well as soldering proper.

While handling the ICs or doing work on the BBC Micro wear an antistatic wristband connected via a 4.4 megohm resistor to an earthed metal object such as a water pipe.

Some ICs will need to be set aside temporarily; you will need a 5 x 10 cm piece of antistatic foam (no longer sold at Maplin) to push them into until they are needed.

To program the custom EPROM you will need an EPROM programmer, or to make use of a commercial programming service. Alternatively, the upgrade will work with existing pre-programmed EPROMs.

Parts list

The upgrade consists of the following parts. Here is a list drawn up according to the Maplin Electronics Spring/Summer 2005 catalogue:

Table 1: Parts list with Maplin catalogue numbers and pricing (Spring/Summer 2005)
Catalogue no.DescriptionQuantityUnit price (£)Price (£)
N40BAUT621024PC-70LL 128Kx8 SRAM(*)12.992.99
AW34MM27C1001-10F1 128Kx8 EPROM12.992.99
FZ65V0.6in 32 pin socket (Turned)20.791.58
FZ63T0.6in 28 pin socket (Turned)20.791.58
HB59PPCB latch housing 2-way10.190.19
YW25C10off 0.1in Socket Terminals10.590.59
BL07H7/0.2mm Wire 10m Red10.990.99
(BL21X)(DIL Socket 28-pin (Stamped))(**)(2)(0.14)(0.28)

(*) Not found on Maplin Electronics Web site, try your local store. Alternative source is Farnell 3345932, @ £3.83 ea + VAT (19/Sep/2005) or 1488952, @ £1.66 ea + VAT (19/Sep/2008; found by Michael Firth).

(**) In this build, the headers PL1 and PL2 were stamped pin sockets, for fear that turned pins would bend the contacts on the BBC motherboard. It turns out that this type of socket is mechanically unsuitable for dry work. The pins are thin enough that they let the header come out of the mobo socket whenever the ROM is changed, and when it is pushed back in the pins may bend easily under the moulding without resistance to warn you.

[Stamped pin IC socket with bent pins]

Therefore turned pin sockets are a better option for this project, at the slightly increased risk of the motherboard sockets not accepting ROMs again. Turned pins are close to the dimensions of genuine IC legs.


  1. Take one of the 32 pin sockets. Lay it upside down with its legs in the air, and the half-moon notch to your right. Pin 1 will be at the near right, with the numbering going leftward to 16 and rightward along the the far row to 32.
  2. This socket is the seat for U1. Solder or wirewrap insulated wires between some of the contacts, as close to the moulding as possible:
    1. Pin 28 (CE2) to pin 32 (VCC).
    2. Pin 32 (VCC) to pin 1 (NC).
  3. Take the other 32 pin socket. Orient it in the same way as the other socket.
  4. This socket is the seat for U2. Solder or wirewrap the following connections, again ensuring the legs will mate with the lower socket:
    1. Pin 28 (CE2) to pin 30 (P).
    2. Pin 30 (P) to pin 32 (VCC).
    3. Pin 32 (VCC) to pin 1 (VPP).
  5. Cut three 15 cm insulated wires and solder or wirewrap them between the two 32 pin sockets:
    1. Pin 3 of U1 (A14) to pin 29 of U2.
    2. Pin 31 of U1 (A15) to pin 3 of U2.
    3. Pin 2 of U1 (A16) to pin 2 of U2.
  6. Cut four 45 cm insulated wires. Apply temporary labels to one end of each wire, identifying it as A14, A15, A16 or /WE. Solder or wirewrap the other end as follows:
    1. A14 to pin 3 of U1.
    2. A15 to pin 31 of U1.
    3. A16 to pin 2 of U1.
    4. /WE to pin 29 of U1.
  7. Take the two 28 pin sockets. Orient them in the same way as the 32 pin sockets. The pins are numbered going clockwise, from 1 at near right to 28 at far right.
  8. Pull pins 1 and 27 out of the moulding or crop the legs off if securely attached.
  9. Insert the legs of the 32 pin sockets into the receptacles of the 28 pin sockets. The left edges of the sockets must be in line, so that pin 4 of each 32 pin socket mates with pin 2 of the 28 pin socket.
  10. You should now have two socket assemblies; the one with the flying leads is PL1 and the other is PL2.


  1. Turn off the BBC Micro and unplug it.
  2. Remove the four screws on the BBC Micro marked 'FIX'. Be sure that you do not remove the screws for the keyboard or power supply. Lift off the lid.
  3. Disconnect the keyboard ribbon cable(s) from the motherboard.
  4. Undo the nuts holding the keyboard to the case. Take off the locking and fibre washers.
  5. Unplug the speaker cable, and place the keyboard aside.
  6. Remove any ROMs fitted in IC88 (third from the right) and IC101 (rightmost). Push these into the prepared antistatic foam.
  7. If IC52 (fourth from the right) contains a ROM other than BASIC, remove the ROM.
  8. If IC100 (second from the right) contains a ROM other than DFS, remove the ROM also.
  9. Insert the BASIC ROM in IC52 and the DFS ROM (if present) in IC100.
  10. Insert PL1 into IC101. Inspect the far side of the sockets to ensure the overhanging legs do not touch any components.
  11. Insert PL2 into IC88. Similarly, check the overhanging legs for short circuits.
  12. For each of the flying leads, run it flat along the motherboard to its destination, avoiding laying the wire on top of components. Allow some slack so that the lead is not taut, then some more for the solder joint. Cut the wire at this point, then solder it to its destination as follows:
    1. A14 to the unoccupied + pad of D5 between IC98 and IC99.
    2. A15 to the unoccupied + pad of D4 next to IC99.
    3. A16 to the West pad (closest to the PSU) of S12 next to the keyboard connector. A low profile joint is needed to leave room for the keyboard plug.
    4. /WE to pin 8 of IC77 at the top left of the motherboard.
    If some of these points are impractical or disconnected, alternatives exist as follows:
    1. A14 to pin 12 of IC76 at the bottom left of the motherboard.
    2. A15 to pin 11 of IC76.
    3. A16 to pin 14 of IC76.
    4. /WE to pin 24 of IC73 at the top centre of the motherboard.
  13. Cut a 10 cm insulated wire and crimp one end into the receptacle of the PCB socket.
  14. Solder the other end of the wire to IC21 pin 14.
  15. Melt or glue over one of the socket holes in the PCB plug shell.
  16. Insert the receptacle into the shell, to service the other socket hole.
  17. Carefully insert the UT621024 IC into the socket U1.
  18. (Optional) To use an existing third ROM instead of a custom EPROM, carry out step 2 of Final installation below.
  19. Reverse steps 1 to 5, to refit the keyboard and case, and turn on the computer.

Intermediate testing

To confirm successful installation the RAM should be tested. At this point the BBC Micro can be used as normal, except we have traded one of the 4 physical ROM sockets for 4 pages of RAM. The motherboard will look something like this:

[Motherboard] [Close-up of ROM sockets]

The following program will perform a simple test. Type it in, then save it on disc (and also on cassette if possible, for use later on). Press CTRL-BREAK, then enter CHAIN "MEMTST". Warning: Do not use MEMTST while a GoMMC board is installed.

   20 REM Greg Cook 10/May/2005
   30 REM WARNING - Do not use while GoMMC is installed
   40 X%=RND(-TIME)
   50 addr=&70
   60 mos_current_rom=&F4
   70 :
   80 DIM code% 128, buf% 511
   90 buf%=(buf%+255) AND NOT 255
  100 :
  110 FOR pass%=0 TO 2 STEP 2
  120 P%=code%
  130 [OPT pass%
  140 .write LDY #0:STY addr:STA addr+1
  150 .write_loop DEY:TXA
  160 EOR addr+1:EOR buf%,Y
  170 PHP:SEI:STX &FE30
  180 STA (addr),Y
  190 LDA mos_current_rom:STA &FE30:PLP
  200 CPY #0:BNE write_loop
  210 RTS
  220 :
  230 .read LDY #0:STY addr:STA addr+1
  240 .read_loop TXA
  250 EOR addr+1:EOR buf%,Y
  260 PHP:SEI:STX &FE30
  270 CMP (addr),Y:BNE read_unlock_exit
  280 LDA mos_current_rom:STA &FE30:PLP
  290 INY:BNE read_loop
  300 CLC:RTS
  310 .read_unlock_exit
  320 \A=expected value, X=rom (discard), y=offset (store in addr)
  330 \Return A=actual value, X=expected value, y=clobbered
  340 TAX:LDA (addr),Y
  350 STY addr
  360 LDY mos_current_rom:STY &FE30:PLP
  370 SEC:RTS
  380 ]
  390 NEXT
  400 :
  410 FOR X%=0 TO 255 STEP 4:buf%!X%=RND:NEXT
  420 FOR Y%=0 TO 1
  430 PRINT"Pass ";Y%'"Writing"
  440 FOR X%=15 TO 0 STEP -1
  450 PRINT"Page ";:IF X%<10 PRINT" ";:IF 0 ELSE PRINT ;X%;
  460 IF X%?&2A1=0 FOR A%=&BF TO &80 STEP -1:CALLwrite:NEXT:
        PRINT" . done":NEXTELSEPRINT" - in use, not writing":NEXT
  470 :
  480 PRINT"Decay wait...";
  500 PRINT'"Reading"
  510 FOR X%=0 TO 15
  520 PRINT"Page ";:IF X%<10 PRINT" ";:IF 0 ELSE PRINT ;X%;
  530 IF X%?&2A1<>0 PRINT" - in use, not testing":NEXT:NEXT:END
  540 FORA%=&80 TO &BF
  550 Z%=USR(read)
  560 IF Z% AND &1000000 PRINT" X Test failed at ";
        ~(!addr AND&FFFF);": ";~Z%AND&FF;"<>";
  570 NEXT:IF A%<&100 PRINT" . RAM test okay"
  580 NEXT
  590 FOR X%=0 TO 255 STEP 4:buf%!X%=NOT buf%!X%:NEXT
  600 NEXT

If everything is working correctly, MEMTST should report RAM test okay for pages 3, 7, 11 and 15. The appearance of RAM test failed for other pages is normal, as it means some of the paged ROM slots are unoccupied.

Socket redirection

Paged ROM space on the BBC Micro consists of a 16K window in main memory, which can be mapped to one of sixteen logical ‘ROM slots.’ On Models A and B there are four physical sockets, that each supply 16 KB of paged ROM content. By taking the unused outputs of the ROMSEL latch as extra address lines, we can increase this to 64 KB per socket. (The Model B+ has 6 sockets that accept 32 KB ROMs without modification.) The mapping is as laid out in the table below:

Table 2: Correspondence of logical paged ROM slots to physical ROM sockets
IC 52IC 88IC 100IC 101
ROM 12ROM 13ROM 14ROM 15

Our RAM and ROM chips each carry 128 KB, and to make full use of them we need more address space per socket. We do this by repurposing QA, the low bit of the ROMSEL latch. It now goes to provide a third extended address line, and its previous duty of selecting the ROM is suspended. Input A of IC20, the quad decoder is tied to +5V, so that only IC88 and IC101 receive a /CS low signal. The result is as follows:

Table 3: Correspondence of logical paged ROM slots to physical ROM sockets, with socket redirection enabled
IC 52IC 88IC 100IC 101
n/aROM 12ROM 13n/aROM 14ROM 15

As can be seen, the other two sockets are no longer serviceable. To allow the GoMMC board or an original ROM release to be fitted later, socket redirection is achieved by a flying lead so as to be reversible.

Preparing the EPROM

U2 can accept 28 or 32 pin ROMs. Any size of device can be used; up to 64 KB of it will be mapped to paged ROM space, or up to 128 KB if socket redirection is enabled. Because of this, 128 KB devices will be mapped in non-ascending order:

[Map of 128 KB ROM to paged ROM space]

The contents of smaller devices will be duplicated until they fill the 128 KB address space.

ROM priority

As stated in the User Guide, ROMs in a higher numbered slot will be given priority of ROM calls, *commands, language selection on startup, and so on. The MOS will ignore a ROM that is an identical copy of one in a higher slot.

For devices up to 64 KB, it is simply a matter of placing low priority ROM images first (in the low addresses) and higher priority ROM images, such as filing systems, last (in the high addresses). Place each image on a 16 KB boundary.

For 128 KB devices, it is more complicated since the first four ROM slots (those with even numbers) may become unavailable if socket redirection is disabled. The filing system usually insists on having highest priority; therefore it goes at the end of the ROM, in slot 13. BASIC could go in slot 9, so as always to be available. But if another occasionally-used language is placed in slot 12, halfway through the ROM, it will take control on power-up instead of BASIC, which appears at a higher chip address.

Personally, I have found it more flexible to place BASIC at the end of the ROM. It claims no *commands, and adds minimal delay to service calls as it has no service entry. It means that languages can be placed anywhere else in the ROM.

If the device is larger than required, only the last (highest) addresses need to be programmed.

Testing the arrangement

A conflict between ROM images has the potential to hang the BBC Micro on startup. *commands can be claimed by the wrong ROM (note that changing the order does not always resolve hijacked *commands, since they are offered to all ROMs via service call 4, then to the current filing system via OSFSC 3.)

If you have a BBC Micro emulator available, it is wise to test the arrangement of paged ROMs before programming the custom EPROM.

Programming the EPROM

  1. Prepare a directory of the ROM images you wish to include.
  2. Pad short images with &FF bytes until they are 16 KB in length.
  3. For 128 KB EPROMs only:
    1. Choose 4 images that are optional and 4 that are essential. BASIC and the Filing System are typically essential.
    2. Sort the images in ascending priority order within each group of 4.
    3. If the last N essential images are not ‘languages’ (programming languages or applications such as word processors), ensure that the last N optional ROMs are also not ‘languages’. It may be necessary to lose N optional languages, but the slots can be occupied instead by ROMFS images, service ROMs or toolsets.
    4. Copy the optional images in ascending priority order, then the essential images in ascending priority order, into a master file.
  4. For shorter ROMs:
    1. Copy the images in ascending priority order, into a master file.
  5. Program the EPROM from the binary master file, according to the programmer instructions.

Final installation

  1. Repeat steps 1 to 5 of Installation above.
  2. Insert the EPROM carefully into socket U2. The device must be aligned with the bottom (south) edge of the socket, i.e. the half moon notches will face the same direction, but may not necessarily be on top of one another.
  3. Remove from IC52 and IC101 any ROMs whose images have been duplicated in U2.
  4. If IC52 and IC101 are empty, enable socket redirection as follows:
    1. Unmake link S22 north, and ‘park’ the jumper on the north pin of S22.
    2. Fit the flying lead going from pin 14 of IC21, to the centre pin of S22.
  5. Reverse steps 1 to 5 of Installation above.

Final testing

The computer should look something like this:

[SW corner of motherboard] [NW corner of motherboard] [/WE connection] [Close-up of /WE connection] [SE corner of motherboard] [Close-up of ROM sockets] [Overview of motherboard] [Motherboard and keyboard]

Press CTRL-BREAK and enter *BASIC followed by CHAIN "MEMTST". If BASIC is the only ROM installed (in U2) then socket redirection can be enabled, and MEMTST can be loaded from cassette or serial link, or typed in again. The successful result is that pages 2, 3, 6, 7, 10, 11, 14 and 15 will indicate RAM test okay. Again, disregard the failure reports for other pages. When the sockets are not redirected then the result should be as described in Intermediate testing above.

Enter *HELP. Check that the applications are listed in the desired order, the highest priority entries coming first. Some ROMs do not give a *HELP entry. Some utilities are able to list all ROMs, so try entering *ROMS.

[Auto BeebAid display of ROM slots]

Using paged RAM

Paged ROM utilities in RAM and copy protection

This upgrade has been designed to provide paged RAM in the two highest slots, so that firmware that needs top priority service can be installed there.

The syntax to load ROM images into paged RAM varies. *HELP SRLOAD may give clues. Under Opus EDOS simply enter *OPT 9,<slot number> followed by *LOAD IMAGE 8000. After installation press CTRL-BREAK so the MOS will recognise the ROM.

To protect against piracy many commercial ROM titles attempt to overwrite themselves to see if they are installed in genuine read-only memory. The RAM installed in this upgrade is unconditionally writeable, and such titles loaded there will either deliberately malfunction or refuse to run.


The ADE Plus 1.0 assembler and other utility ROMs search for paged RAM and allocate it as a printer buffer. It may also be possible to configure ADE to use it as workspace for assembling code.


There exists on the World Wide Web a version of BAS128 that will run on a Model B+, or on a Model B by overwriting most of the display. It loads from cassette or disc, runs in main memory and uses paged RAM to store the BASIC program, variables and stack. With this memory upgrade 64 KB are available to the user. Note that BAS128 maintains a virtual address space starting from &10000, and memory blocks allocated by DIM are not recognised by the MOS or accessible to *LOAD, *SAVE, or machine code programs.

>REM To invoke BAS128 on a Model B+

>REM To invoke BAS128 on a Model B (from the serial port)
>MODE 7: VDU 28,32,24,39,24: */BasObj

>REM The memory space can be tested with the following BAS128 program:
   10 L%=&FDFF
   20 DIM F% L%, A% -1
   40 N%=TIME
   50 X%=RND(-N%)
   60 FORX%=0 TO L% STEP 4:F%!X%=RND:NEXT
   70 X%=RND(-N%)
   90 PRINT "BAS128 test okay"
     10000     100C5     100C5     20000     100C5     1FEC5
BAS128 test okay


‘Language?’ error

When the BBC Micro reports this error and hangs, it means one or more of the following:

No ‘Language?’ error, hangs on BREAK

The data contained in paged RAM is, of course, retained until the machine is powered down. In the event that a ROM image hangs the machine when BREAK is pressed, turn the computer off for 30 seconds so that the image decays.

Alternatively, there may be a conflict in the custom EPROM.

MEMTST reports RAM test failed

In most cases, this is normal. Pages 0, 1, 4, 5, 8, 9, 12 and 13 will ordinarily fail the RAM test. When socket redirection is disabled, RAM will neither be found in pages 2, 6, 10 or 14.

Note this chart gives rough estimates, and a firm diagnosis will require more thorough testing.

Circuit diagram

[Memory upgrade circuit diagram]


Every effort has been made to ensure accuracy, however there may be occasional errors or omissions. Pricing, availability and specification of components are subject to change without notice. The code and documentation included in this document (including, but not limited to parts lists, instructions, program listings, tables, diagrams and digital images) are supplied without warranty, not even the implied warranties of merchantability or fitness for a particular purpose. In no event shall the author or his suppliers be liable for any loss, damage, injury or death, of any nature and howsoever caused, arising from the use of, or failure, inability or unwillingness to use, this software or documentation.

Greg Cook, [email address] Last updated 2011-01-05

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